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ULTRA-HIGH CONCURRENCY VMA RACE TEST
32 ALLOCATION THREADS + 1 DEFRAG THREAD
1ms allocations | 1-3s defrags | NO MUTEX
Press Ctrl+C to stop
==================
WARNING: ThreadSanitizer: data race (pid=2471)
  Read of size 8 at 0x0055555a02d0 by thread T4:
    #0 std::vector<AllocItem, std::allocator<AllocItem> >::size() const /usr/include/c++/12/bits/stl_vector.h:988 (vma_race_tsan+0x24208)
    #1 defrag_thread() /home/turo/vma/test_vma_race.cpp:326 (vma_race_tsan+0x24208)
    #2 void std::__invoke_impl<void, void (*)()>(std::__invoke_other, void (*&&)()) /usr/include/c++/12/bits/invoke.h:61 (vma_race_tsan+0x24a10)

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Invalid read of size 4
   at 0x15F880: PIT_CheckThing (p_map.c:296)
   by 0x161B5D: P_BlockThingsIterator (p_maputl.c:531)
   by 0x160743: P_CheckPosition (p_map.c:540)
   by 0x16081E: P_TryMove (p_map.c:576)
   by 0x162ADE: P_XYMovement.part.0 (p_mobj.c:214)
   by 0x162FF7: P_XYMovement (p_mobj.c:170)
   by 0x162FF7: P_MobjThinker (p_mobj.c:585)
   by 0x1711BA: P_RunThinkers (p_tick.c:113)
   by 0x171242: P_Ticker (p_tick.c:151)

turol

toplev --no-multiplex -S --drilldown --show-sample -- <command removed>
RUN #1 of 1: Frontend_Bound MUX Retiring Bad_Speculation Backend_Bound
29690
# 4.4-full-perf on Intel(R) Core(TM) i7-8750H CPU @ 2.20GHz [cfl/skylake]
FE             Frontend_Bound  % Slots                      22.6  <==
	This category represents fraction of slots where the
	processor's Frontend undersupplies its Backend...
	Sampling events:  frontend_retired.latency_ge_4:pp
Run toplev --describe Frontend_Bound^ to get more information on bottleneck
Add --run-sample to find locations

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turol

// smaaBlendWeight.frag
#version 450

struct SMAAParameters
{
    float threshold;
    float depthThreshold;
    uint maxSearchSteps;
    uint maxSearchStepsDiag;
    uint cornerRounding;

turol

// smaaBlendWeight.frag
#version 450

struct SMAAParameters
{
    float threshold;
    float depthThreshold;
    uint maxSearchSteps;
    uint maxSearchStepsDiag;
    uint cornerRounding;

turol

; SPIR-V
; Version: 1.0
; Generator: Google Shaderc over Glslang; 1
; Bound: 25120
; Schema: 0
               OpCapability Shader
          %1 = OpExtInstImport "GLSL.std.450"
               OpMemoryModel Logical GLSL450
               OpEntryPoint Fragment %5663 "main" %3809 %3810 %3811 %3569 %4945 %4402
               OpExecutionMode %5663 OriginUpperLeft

turol

; SPIR-V
; Version: 1.0
; Generator: Google Shaderc over Glslang; 1
; Bound: 25140
; Schema: 0
               OpCapability Shader
          %1 = OpExtInstImport "GLSL.std.450"
               OpMemoryModel Logical GLSL450
               OpEntryPoint Fragment %5663 "main" %3809 %3810 %3811 %3569 %4945 %4402
               OpExecutionMode %5663 OriginUpperLeft

turol

; SPIR-V
; Version: 1.0
; Generator: Google Shaderc over Glslang; 1
; Bound: 25140
; Schema: 0
               OpCapability Shader
          %1 = OpExtInstImport "GLSL.std.450"
               OpMemoryModel Logical GLSL450
               OpEntryPoint Fragment %5663 "main" %3809 %3810 %3811 %3569 %4945 %4402
               OpExecutionMode %5663 OriginUpperLeft

turol

; SPIR-V
; Version: 1.0
; Generator: Google Shaderc over Glslang; 1
; Bound: 25120
; Schema: 0
               OpCapability Shader
          %1 = OpExtInstImport "GLSL.std.450"
               OpMemoryModel Logical GLSL450
               OpEntryPoint Fragment %5663 "main" %3809 %3810 %3811 %3569 %4945 %4402
               OpExecutionMode %5663 OriginUpperLeft