mult.py

from nmigen import *
from nmigen.build import *
from nmigen.vendor.lattice_ecp5 import *
from nmigen_boards.resources import *

class MyPlatform(LatticeECP5Platform):
    package     = "BG554"
    speed       = "8"
    default_clk = "clk100"
    default_rst = "rst"
    device      = "LFE5UM5G-45F"

    resources   = [
        Resource("rst", 0, PinsN("AB1", dir="i"), Attrs(IO_TYPE="LVCMOS33")),
        Resource("clk100", 0, Pins("K23", dir="i"), Clock(100e6), Attrs(IO_TYPE="LVCMOS33")),

        *LEDResources(pins="T23",
            attrs=Attrs(IO_TYPE="LVCMOS33", DRIVE="4")),
    ]

    connectors  = [
    ]

class MultTest(Elaboratable):

    def elaborate(self, platform):
        m = Module()

        a = Signal(72, reset=1)
        b = Signal(72, reset=2)
        p = Signal(144, reset=0)

        # rgb_led = platform.request("rgb_led", 0)
        # led0 = rgb_led.r
        led0 = platform.request("led", 0)

        timer = Signal(range(144), reset=143)
        with m.If(timer == 0):
            m.d.sync += [
                timer.eq(timer.reset)
            ]

        with m.Else():
            m.d.sync += timer.eq(timer - 1)

        m.d.comb += [
            led0.eq(p.bit_select(timer, 1))
        ]

        mult72 = Instance("mult72",
            i_A=a,
            i_B=b,
            i_CLK0=ClockSignal(),
            i_RST0=Const(0, 1),
            i_CE0=Const(1, 1),
            o_P=p)
        m.submodules += mult72

        return m

if __name__ == "__main__":
    platform = MyPlatform()

    with open("mult72.v") as f:
        v = f.read()
        platform.add_file("mult72.v", v)

    platform.build(MultTest(), do_program=False, verbose=True)