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Enable 4K / Ultrawide on Radeon HD6570 - HDMI TMDS overlocking
From 6b5a119c8a15f87bbbed809840873d24d5ae57f5 Mon Sep 17 00:00:00 2001
From: James Hendry <jameshendry05@gmail.com>
Date: Mon, 3 Apr 2023 10:10:57 +0100
Subject: [PATCH 1/2] Apply patch to enable overclocking of HDMI TMDS Speed
https://www.elstel.org/software/hunt-for-4K-UHD-2160p.html.en
---
drivers/gpu/drm/radeon/radeon.h | 1 +
drivers/gpu/drm/radeon/radeon_connectors.c | 21 +++++++++++++++------
drivers/gpu/drm/radeon/radeon_drv.c | 4 ++++
drivers/gpu/drm/radeon/radeon_encoders.c | 3 +++
4 files changed, 23 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 2e7161acd443..395274270e47 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -121,6 +121,7 @@ extern int radeon_uvd;
extern int radeon_vce;
extern int radeon_si_support;
extern int radeon_cik_support;
+extern int radeon_hdmimhz;
/*
* Copy from radeon_drv.h so we don't have to include both and have conflicting
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c
index f7431d224604..0fcef68664a0 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -42,6 +42,7 @@ void radeon_connector_hotplug(struct drm_connector *connector)
struct drm_device *dev = connector->dev;
struct radeon_device *rdev = dev->dev_private;
struct radeon_connector *radeon_connector = to_radeon_connector(connector);
+ int mode_valid = MODE_OK;
/* bail if the connector does not have hpd pin, e.g.,
* VGA, TV, etc.
@@ -1465,7 +1466,7 @@ static enum drm_mode_status radeon_dvi_mode_valid(struct drm_connector *connecto
struct drm_device *dev = connector->dev;
struct radeon_device *rdev = dev->dev_private;
struct radeon_connector *radeon_connector = to_radeon_connector(connector);
-
+ int mode_valid = MODE_OK;
/* XXX check mode bandwidth */
/* clocks over 135 MHz have heat issues with DVI on RV100 */
@@ -1482,19 +1483,27 @@ static enum drm_mode_status radeon_dvi_mode_valid(struct drm_connector *connecto
else if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
/* HDMI 1.3+ supports max clock of 340 Mhz */
if (mode->clock > 340000)
- return MODE_CLOCK_HIGH;
+ mode_valid = MODE_CLOCK_HIGH;
+ //return MODE_CLOCK_HIGH;
else
return MODE_OK;
} else {
- return MODE_CLOCK_HIGH;
+ mode_valid = MODE_CLOCK_HIGH;
+ //return MODE_CLOCK_HIGH;
}
}
+ // OUR MODIFICATION:
+ if ( radeon_hdmimhz > 0 && ( mode->clock <= radeon_hdmihz * 1000) )
+ mode_valid = MODE_OK; // Permit mode if we explicity allow it.
+
/* check against the max pixel clock */
- if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
- return MODE_CLOCK_HIGH;
+ //if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
+ // return MODE_CLOCK_HIGH;
+ if ( mode_valid == MODE_OK && (mode->clock / 10) > rdev->clock.max_pixel_clock )
+ mode_valid = MODE_CLOCK_HIGH
- return MODE_OK;
+ return mode_valid;
}
static const struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = {
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index 6cbe1ab81aba..2c5f03738185 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -174,6 +174,7 @@ int radeon_backlight = -1;
int radeon_auxch = -1;
int radeon_uvd = 1;
int radeon_vce = 1;
+int radeon_hdmihz = 0;
MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
module_param_named(no_wb, radeon_no_wb, int, 0444);
@@ -268,6 +269,9 @@ module_param_named(uvd, radeon_uvd, int, 0444);
MODULE_PARM_DESC(vce, "vce enable/disable vce support (1 = enable, 0 = disable)");
module_param_named(vce, radeon_vce, int, 0444);
+MODULE_PARM_DESC(hdmihz, "Force a maximum HDMI pixel clock (in MHz); try 165/225/297/330 to overclock your TMDS for gaining a higher resolution");
+module_param_named(hdmihz, radeon_hdmimhz, int, 0444);
+
int radeon_si_support = 1;
MODULE_PARM_DESC(si_support, "SI support (1 = enabled (default), 0 = disabled)");
module_param_named(si_support, radeon_si_support, int, 0444);
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c
index fbc0a2182318..b355c9138a9a 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -370,6 +370,9 @@ bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
struct radeon_connector *radeon_connector;
struct radeon_connector_atom_dig *dig_connector;
+ if (radeon_hdmihz > 0)
+ return false;
+
connector = radeon_get_connector_for_encoder(encoder);
/* if we don't have an active device yet, just use one of
* the connectors tied to the encoder.
--
2.39.2
From 3865f91d36818122c8c751ec023499e365bfd013 Mon Sep 17 00:00:00 2001
From: James Hendry <jameshendry05@gmail.com>
Date: Mon, 3 Apr 2023 16:41:24 +0100
Subject: [PATCH 2/2] Make it work through DisplayPort and add a logging line
---
drivers/gpu/drm/drm_modes.c | 5 +++--
drivers/gpu/drm/radeon/radeon_connectors.c | 10 ++++++----
drivers/gpu/drm/radeon/radeon_drv.c | 6 +++---
drivers/gpu/drm/radeon/radeon_encoders.c | 2 +-
4 files changed, 13 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index 3c8034a8c27b..ed41a5f80bd8 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -1331,10 +1331,11 @@ void drm_mode_prune_invalid(struct drm_device *dev,
if (mode->status != MODE_OK) {
list_del(&mode->head);
if (mode->type & DRM_MODE_TYPE_USERDEF) {
- drm_warn(dev, "User-defined mode not supported: "
+ drm_warn(dev, "User-defined mode not supported: "
DRM_MODE_FMT "\n", DRM_MODE_ARG(mode));
+ drm_warn(dev, "Because %s for mode: %s\n", mode->name, drm_get_mode_status_name(mode->status));
}
- if (verbose) {
+ if (true) {
drm_mode_debug_printmodeline(mode);
DRM_DEBUG_KMS("Not using %s mode: %s\n",
mode->name,
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c
index 0fcef68664a0..0d2730a66610 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -1494,14 +1494,14 @@ static enum drm_mode_status radeon_dvi_mode_valid(struct drm_connector *connecto
}
// OUR MODIFICATION:
- if ( radeon_hdmimhz > 0 && ( mode->clock <= radeon_hdmihz * 1000) )
+ if ( radeon_hdmimhz > 0 && ( mode->clock <= radeon_hdmimhz * 1000) )
mode_valid = MODE_OK; // Permit mode if we explicity allow it.
/* check against the max pixel clock */
//if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
// return MODE_CLOCK_HIGH;
if ( mode_valid == MODE_OK && (mode->clock / 10) > rdev->clock.max_pixel_clock )
- mode_valid = MODE_CLOCK_HIGH
+ mode_valid = MODE_CLOCK_HIGH;
return mode_valid;
}
@@ -1789,8 +1789,10 @@ static enum drm_mode_status radeon_dp_mode_valid(struct drm_connector *connector
if (mode->clock > 340000)
return MODE_CLOCK_HIGH;
} else {
- if (mode->clock > 165000)
- return MODE_CLOCK_HIGH;
+ if (mode->clock > 165000) {
+ if (radeon_hdmimhz == 0 || (radeon_hdmimhz * 1000) < mode->clock)
+ return MODE_CLOCK_HIGH;
+ }
}
}
}
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index 2c5f03738185..b1789a7ff023 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -174,7 +174,7 @@ int radeon_backlight = -1;
int radeon_auxch = -1;
int radeon_uvd = 1;
int radeon_vce = 1;
-int radeon_hdmihz = 0;
+int radeon_hdmimhz = 0;
MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
module_param_named(no_wb, radeon_no_wb, int, 0444);
@@ -269,8 +269,8 @@ module_param_named(uvd, radeon_uvd, int, 0444);
MODULE_PARM_DESC(vce, "vce enable/disable vce support (1 = enable, 0 = disable)");
module_param_named(vce, radeon_vce, int, 0444);
-MODULE_PARM_DESC(hdmihz, "Force a maximum HDMI pixel clock (in MHz); try 165/225/297/330 to overclock your TMDS for gaining a higher resolution");
-module_param_named(hdmihz, radeon_hdmimhz, int, 0444);
+MODULE_PARM_DESC(hdmimhz, "Force a maximum HDMI pixel clock (in MHz); try 165/225/297/330 to overclock your TMDS for gaining a higher resolution");
+module_param_named(hdmimhz, radeon_hdmimhz, int, 0444);
int radeon_si_support = 1;
MODULE_PARM_DESC(si_support, "SI support (1 = enabled (default), 0 = disabled)");
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c
index b355c9138a9a..104e758607de 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -370,7 +370,7 @@ bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
struct radeon_connector *radeon_connector;
struct radeon_connector_atom_dig *dig_connector;
- if (radeon_hdmihz > 0)
+ if (radeon_hdmimhz > 0)
return false;
connector = radeon_get_connector_for_encoder(encoder);
--
2.39.2
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