Created
July 26, 2022 16:43
-
-
Save ungeskriptet/db0e06ac8cb14aa2208fcc18a5731b2e to your computer and use it in GitHub Desktop.
Motorola Moto G5 "cedric" downstream DTS
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
| /dts-v1/; | |
| / { | |
| #address-cells = <0x02>; | |
| #size-cells = <0x02>; | |
| model = "cedric"; | |
| compatible = "qcom,msm8937-cedric\0qcom,msm8937-moto\0qcom,msm8937"; | |
| qcom,msm-id = <0x126 0x00>; | |
| interrupt-parent = <0x01>; | |
| channel-id-map = "acg\0amxbr\0amxpr\0amxmx\0amxcl\0amxar\0amxla\0amxpe\0amxco\0tefbr\0tefmx\0tefar\0tefcl\0tefpe\0tefco\0perar\0entcl\0iusmx\0niibr\0niicl\0niimx\0niipe\0oibr\0timbr\0tigco\0retbr\0retar\0retla\0retcl\0tefla\0retla1st\0tefunl\0tigca\0tigca1st\0retmx\0attmx\0womcl\0avaco\0retpe\0openla\0opencl\0openmx\0altmx\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0reteu\0retgb\0retfr\0retes\0retie\0retde\0vfgb\0vfde\0vffr\0o2gb\0o2de\0orafr\0bouyfr\0eegb\0tescogb\0yoigo\0oraes\0retapac\0retmea\0vfit\0vfes\0vfeu\03gb\0tescoie\0altfr\03ie\0altpt\0timit\0retma\0windit\0vfhu\0vfro\0telhu\0playpl\0oraeu\0dteu\0teleu\0pluspl\0dtpl\0tefes\0altice\0vipeu\0veoneu\0openeu\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0retca\0bwaca\0tkpca\0vzw\0att\0tmo\0sprint\0repw\0aio\0cricket\0cc\0usc\0tracfone\0retus\0metropcs\0rcica\0wndca\0dmc\0bby\0amz\0acg\0lra\0comcast\0fi\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0retin\0retcn\0telstra\0vfau\0amzin\0jioin\0airin\0retid\0cmcc\0ctcn\0cucn\0retmm\0gt4gtw\0retth\0retru\0trueth\0smarthk\0mobilpk\0retsea\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined\0undefined"; | |
| qcom,board-id = <0x42 0x8500>; | |
| cpus { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| cpu-map { | |
| cluster0 { | |
| core0 { | |
| cpu = <0x02>; | |
| }; | |
| core1 { | |
| cpu = <0x03>; | |
| }; | |
| core2 { | |
| cpu = <0x04>; | |
| }; | |
| core3 { | |
| cpu = <0x05>; | |
| }; | |
| }; | |
| cluster1 { | |
| core0 { | |
| cpu = <0x06>; | |
| }; | |
| core1 { | |
| cpu = <0x07>; | |
| }; | |
| core2 { | |
| cpu = <0x08>; | |
| }; | |
| core3 { | |
| cpu = <0x09>; | |
| }; | |
| }; | |
| }; | |
| cpu@100 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53"; | |
| reg = <0x100>; | |
| enable-method = "psci"; | |
| qcom,acc = <0x0a>; | |
| qcom,limits-info = <0x0b>; | |
| next-level-cache = <0x0c>; | |
| linux,phandle = <0x06>; | |
| phandle = <0x06>; | |
| l2-cache { | |
| compatible = "arm,arch-cache"; | |
| cache-level = <0x02>; | |
| power-domain = <0x0d>; | |
| qcom,dump-size = <0x00>; | |
| linux,phandle = <0x0c>; | |
| phandle = <0x0c>; | |
| }; | |
| l1-icache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x8800>; | |
| linux,phandle = <0x1f>; | |
| phandle = <0x1f>; | |
| }; | |
| l1-dcache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x9000>; | |
| linux,phandle = <0x27>; | |
| phandle = <0x27>; | |
| }; | |
| }; | |
| cpu@101 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53"; | |
| reg = <0x101>; | |
| enable-method = "psci"; | |
| qcom,acc = <0x0e>; | |
| qcom,limits-info = <0x0f>; | |
| next-level-cache = <0x0c>; | |
| linux,phandle = <0x07>; | |
| phandle = <0x07>; | |
| l1-icache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x8800>; | |
| linux,phandle = <0x20>; | |
| phandle = <0x20>; | |
| }; | |
| l1-dcache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x9000>; | |
| linux,phandle = <0x28>; | |
| phandle = <0x28>; | |
| }; | |
| }; | |
| cpu@102 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53"; | |
| reg = <0x102>; | |
| enable-method = "psci"; | |
| qcom,acc = <0x10>; | |
| qcom,limits-info = <0x11>; | |
| next-level-cache = <0x0c>; | |
| linux,phandle = <0x08>; | |
| phandle = <0x08>; | |
| l1-icache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x8800>; | |
| linux,phandle = <0x21>; | |
| phandle = <0x21>; | |
| }; | |
| l1-dcache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x9000>; | |
| linux,phandle = <0x29>; | |
| phandle = <0x29>; | |
| }; | |
| }; | |
| cpu@103 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53"; | |
| reg = <0x103>; | |
| enable-method = "psci"; | |
| qcom,acc = <0x12>; | |
| qcom,limits-info = <0x13>; | |
| next-level-cache = <0x0c>; | |
| linux,phandle = <0x09>; | |
| phandle = <0x09>; | |
| l1-icache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x8800>; | |
| linux,phandle = <0x22>; | |
| phandle = <0x22>; | |
| }; | |
| l1-dcache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x9000>; | |
| linux,phandle = <0x2a>; | |
| phandle = <0x2a>; | |
| }; | |
| }; | |
| cpu@0 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53"; | |
| reg = <0x00>; | |
| enable-method = "psci"; | |
| qcom,acc = <0x14>; | |
| qcom,limits-info = <0x15>; | |
| next-level-cache = <0x16>; | |
| linux,phandle = <0x02>; | |
| phandle = <0x02>; | |
| l2-cache { | |
| compatible = "arm,arch-cache"; | |
| cache-level = <0x02>; | |
| power-domain = <0x17>; | |
| qcom,dump-size = <0x00>; | |
| linux,phandle = <0x16>; | |
| phandle = <0x16>; | |
| }; | |
| l1-icache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x8800>; | |
| linux,phandle = <0x1b>; | |
| phandle = <0x1b>; | |
| }; | |
| l1-dcache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x9000>; | |
| linux,phandle = <0x23>; | |
| phandle = <0x23>; | |
| }; | |
| }; | |
| cpu@1 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53"; | |
| reg = <0x01>; | |
| enable-method = "psci"; | |
| qcom,acc = <0x18>; | |
| qcom,limits-info = <0x15>; | |
| next-level-cache = <0x16>; | |
| linux,phandle = <0x03>; | |
| phandle = <0x03>; | |
| l1-icache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x8800>; | |
| linux,phandle = <0x1c>; | |
| phandle = <0x1c>; | |
| }; | |
| l1-dcache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x9000>; | |
| linux,phandle = <0x24>; | |
| phandle = <0x24>; | |
| }; | |
| }; | |
| cpu@2 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53"; | |
| reg = <0x02>; | |
| enable-method = "psci"; | |
| qcom,acc = <0x19>; | |
| qcom,limits-info = <0x15>; | |
| next-level-cache = <0x16>; | |
| linux,phandle = <0x04>; | |
| phandle = <0x04>; | |
| l1-icache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x8800>; | |
| linux,phandle = <0x1d>; | |
| phandle = <0x1d>; | |
| }; | |
| l1-dcache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x9000>; | |
| linux,phandle = <0x25>; | |
| phandle = <0x25>; | |
| }; | |
| }; | |
| cpu@3 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53"; | |
| reg = <0x03>; | |
| enable-method = "psci"; | |
| qcom,acc = <0x1a>; | |
| qcom,limits-info = <0x15>; | |
| next-level-cache = <0x16>; | |
| linux,phandle = <0x05>; | |
| phandle = <0x05>; | |
| l1-icache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x8800>; | |
| linux,phandle = <0x1e>; | |
| phandle = <0x1e>; | |
| }; | |
| l1-dcache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x9000>; | |
| linux,phandle = <0x26>; | |
| phandle = <0x26>; | |
| }; | |
| }; | |
| }; | |
| soc { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| ranges = <0x00 0x00 0x00 0xffffffff>; | |
| compatible = "simple-bus"; | |
| pinctrl@1000000 { | |
| compatible = "qcom,msm8937-pinctrl"; | |
| reg = <0x1000000 0x300000>; | |
| interrupts = <0x00 0xd0 0x00>; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| linux,phandle = <0xa7>; | |
| phandle = <0xa7>; | |
| pmx-uartconsole { | |
| uart_console_active { | |
| linux,phandle = <0xbf>; | |
| phandle = <0xbf>; | |
| mux { | |
| pins = "gpio4\0gpio5"; | |
| function = "blsp_uart2"; | |
| }; | |
| config { | |
| pins = "gpio4\0gpio5"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| uart_console_sleep { | |
| mux { | |
| pins = "gpio4\0gpio5"; | |
| function = "blsp_uart2"; | |
| }; | |
| config { | |
| pins = "gpio4\0gpio5"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| i2c_2 { | |
| i2c_2_active { | |
| linux,phandle = <0xc0>; | |
| phandle = <0xc0>; | |
| mux { | |
| pins = "gpio6\0gpio7"; | |
| function = "blsp_i2c2"; | |
| }; | |
| config { | |
| pins = "gpio6\0gpio7"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| i2c_2_sleep { | |
| linux,phandle = <0xc1>; | |
| phandle = <0xc1>; | |
| mux { | |
| pins = "gpio6\0gpio7"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio6\0gpio7"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| i2c_3 { | |
| i2c_3_active { | |
| linux,phandle = <0xcb>; | |
| phandle = <0xcb>; | |
| mux { | |
| pins = "gpio10\0gpio11"; | |
| function = "blsp_i2c3"; | |
| }; | |
| config { | |
| pins = "gpio10\0gpio11"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| i2c_3_sleep { | |
| linux,phandle = <0xcc>; | |
| phandle = <0xcc>; | |
| mux { | |
| pins = "gpio10\0gpio11"; | |
| function = "blsp_i2c3"; | |
| }; | |
| config { | |
| pins = "gpio10\0gpio11"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| i2c_5 { | |
| i2c_5_active { | |
| mux { | |
| pins = "gpio18\0gpio19"; | |
| function = "blsp_i2c5"; | |
| }; | |
| config { | |
| pins = "gpio18\0gpio19"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| i2c_5_sleep { | |
| mux { | |
| pins = "gpio18\0gpio19"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio18\0gpio19"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| pmx_rd_nfc_int { | |
| pins = "gpio17"; | |
| qcom,pin-func = <0x00>; | |
| qcom,num-grp-pins = <0x01>; | |
| label = "pmx_nfc_int"; | |
| active { | |
| drive-strength = <0x06>; | |
| bias-pull-up; | |
| }; | |
| suspend { | |
| drive-strength = <0x06>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| pmx_nfc_reset { | |
| pins = "gpio16"; | |
| qcom,pin-func = <0x00>; | |
| qcom,num-grp-pins = <0x01>; | |
| label = "pmx_nfc_disable"; | |
| active { | |
| drive-strength = <0x06>; | |
| bias-pull-up; | |
| }; | |
| suspend { | |
| drive-strength = <0x06>; | |
| bias-disable; | |
| }; | |
| }; | |
| tlmm_pmi_flash_led { | |
| rear_flash_led_enable { | |
| mux { | |
| pins = "gpio33"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio33"; | |
| drive-strength = <0x10>; | |
| output-high; | |
| }; | |
| }; | |
| rear_flash_led_disable { | |
| mux { | |
| pins = "gpio33"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio33"; | |
| drive-strength = <0x02>; | |
| output-low; | |
| }; | |
| }; | |
| front_flash_led_enable { | |
| mux { | |
| pins = "gpio50"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio50"; | |
| drive-strength = <0x10>; | |
| output-high; | |
| }; | |
| }; | |
| front_flash_led_disable { | |
| mux { | |
| pins = "gpio50"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio50"; | |
| drive-strength = <0x02>; | |
| output-low; | |
| }; | |
| }; | |
| }; | |
| spi3 { | |
| spi3_default { | |
| mux { | |
| pins = "gpio8\0gpio9\0gpio11"; | |
| function = "blsp_spi3"; | |
| }; | |
| config { | |
| pins = "gpio8\0gpio9\0gpio11"; | |
| drive-strength = <0x0c>; | |
| bias-disable = <0x00>; | |
| }; | |
| }; | |
| spi3_sleep { | |
| mux { | |
| pins = "gpio8\0gpio9\0gpio11"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio8\0gpio9\0gpio11"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| cs0_active { | |
| mux { | |
| pins = "gpio10"; | |
| function = "blsp_spi3"; | |
| }; | |
| config { | |
| pins = "gpio10"; | |
| drive-strength = <0x02>; | |
| bias-disable = <0x00>; | |
| }; | |
| }; | |
| cs0_sleep { | |
| mux { | |
| pins = "gpio10"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio10"; | |
| drive-strength = <0x02>; | |
| bias-disable = <0x00>; | |
| }; | |
| }; | |
| }; | |
| wcnss_pmux_5wire { | |
| wcnss_default { | |
| linux,phandle = <0xe2>; | |
| phandle = <0xe2>; | |
| wcss_wlan2 { | |
| pins = "gpio76"; | |
| function = "wcss_wlan2"; | |
| }; | |
| wcss_wlan1 { | |
| pins = "gpio77"; | |
| function = "wcss_wlan1"; | |
| }; | |
| wcss_wlan0 { | |
| pins = "gpio78"; | |
| function = "wcss_wlan0"; | |
| }; | |
| wcss_wlan { | |
| pins = "gpio79\0gpio80"; | |
| function = "wcss_wlan"; | |
| }; | |
| config { | |
| pins = "gpio76\0gpio77\0gpio78\0gpio79\0gpio80"; | |
| drive-strength = <0x06>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| wcnss_sleep { | |
| linux,phandle = <0xe3>; | |
| phandle = <0xe3>; | |
| wcss_wlan2 { | |
| pins = "gpio76"; | |
| function = "wcss_wlan2"; | |
| }; | |
| wcss_wlan1 { | |
| pins = "gpio77"; | |
| function = "wcss_wlan1"; | |
| }; | |
| wcss_wlan0 { | |
| pins = "gpio78"; | |
| function = "wcss_wlan0"; | |
| }; | |
| wcss_wlan { | |
| pins = "gpio79\0gpio80"; | |
| function = "wcss_wlan"; | |
| }; | |
| config { | |
| pins = "gpio76\0gpio77\0gpio78\0gpio79\0gpio80"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| wcnss_pmux_gpio { | |
| wcnss_gpio_default { | |
| linux,phandle = <0xe4>; | |
| phandle = <0xe4>; | |
| mux { | |
| pins = "gpio76\0gpio77\0gpio78\0gpio79\0gpio80"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio76\0gpio77\0gpio78\0gpio79\0gpio80"; | |
| drive-strength = <0x06>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| }; | |
| blsp2_uart1_active { | |
| linux,phandle = <0xdd>; | |
| phandle = <0xdd>; | |
| mux { | |
| pins = "gpio16\0gpio17\0gpio18\0gpio19"; | |
| function = "blsp_uart5"; | |
| }; | |
| config { | |
| pins = "gpio16\0gpio17\0gpio18\0gpio19"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| blsp2_uart1_sleep { | |
| linux,phandle = <0xdc>; | |
| phandle = <0xdc>; | |
| mux { | |
| pins = "gpio16\0gpio17\0gpio18\0gpio19"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio16\0gpio17\0gpio18\0gpio19"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| pmx_adv7533_int { | |
| adv7533_int_active { | |
| mux { | |
| pins = "gpio129"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio129"; | |
| drive-strength = <0x10>; | |
| bias-disable; | |
| }; | |
| }; | |
| adv7533_int_suspend { | |
| mux { | |
| pins = "gpio129"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio129"; | |
| drive-strength = <0x10>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| pmx_mdss { | |
| mdss_dsi_active { | |
| linux,phandle = <0x169>; | |
| phandle = <0x169>; | |
| mux { | |
| pins = "gpio60"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio60"; | |
| drive-strength = <0x08>; | |
| bias-disable = <0x00>; | |
| }; | |
| }; | |
| mdss_dsi_suspend { | |
| linux,phandle = <0x16a>; | |
| phandle = <0x16a>; | |
| mux { | |
| pins = "gpio60"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio60"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| input-enable; | |
| }; | |
| }; | |
| }; | |
| pmx_mdss_te { | |
| mdss_te_active { | |
| mux { | |
| pins = "gpio24"; | |
| function = "mdp_vsync"; | |
| }; | |
| config { | |
| pins = "gpio24"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| mdss_te_suspend { | |
| mux { | |
| pins = "gpio24"; | |
| function = "mdp_vsync"; | |
| }; | |
| config { | |
| pins = "gpio24"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| usbc_int_default { | |
| mux { | |
| pins = "gpio97\0gpio131"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio97\0gpio131"; | |
| drive-strength = <0x02>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| tlmm_gpio_key { | |
| gpio_key_active { | |
| linux,phandle = <0x17a>; | |
| phandle = <0x17a>; | |
| mux { | |
| pins = "gpio91"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio91"; | |
| drive-strength = <0x02>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| gpio_key_suspend { | |
| linux,phandle = <0x17b>; | |
| phandle = <0x17b>; | |
| mux { | |
| pins = "gpio91"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio91"; | |
| drive-strength = <0x02>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| }; | |
| pmx_ts_int_active { | |
| ts_int_active { | |
| mux { | |
| pins = "gpio65"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio65"; | |
| drive-strength = <0x08>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| }; | |
| pmx_ts_int_suspend { | |
| ts_int_suspend { | |
| mux { | |
| pins = "gpio65"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio65"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| pmx_ts_reset_active { | |
| ts_reset_active { | |
| mux { | |
| pins = "gpio64"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio64"; | |
| drive-strength = <0x08>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| }; | |
| pmx_ts_reset_suspend { | |
| ts_reset_suspend { | |
| mux { | |
| pins = "gpio64"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio64"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| pmx_ts_release { | |
| ts_release { | |
| mux { | |
| pins = "gpio65\0gpio64"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio65\0gpio64"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| pmx_qdsd_clk { | |
| clk_sdcard { | |
| linux,phandle = <0x35>; | |
| phandle = <0x35>; | |
| config { | |
| pins = "qdsd_clk"; | |
| bias-disable; | |
| drive-strength = <0x10>; | |
| }; | |
| }; | |
| clk_trace { | |
| linux,phandle = <0x3b>; | |
| phandle = <0x3b>; | |
| config { | |
| pins = "qdsd_clk"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| clk_swdtrc { | |
| linux,phandle = <0x46>; | |
| phandle = <0x46>; | |
| config { | |
| pins = "qdsd_clk"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| clk_spmi { | |
| linux,phandle = <0x51>; | |
| phandle = <0x51>; | |
| config { | |
| pins = "qdsd_clk"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| }; | |
| pmx_qdsd_cmd { | |
| cmd_sdcard { | |
| linux,phandle = <0x36>; | |
| phandle = <0x36>; | |
| config { | |
| pins = "qdsd_cmd"; | |
| bias-pull-down; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| cmd_trace { | |
| linux,phandle = <0x3c>; | |
| phandle = <0x3c>; | |
| config { | |
| pins = "qdsd_cmd"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cmd_uart { | |
| linux,phandle = <0x41>; | |
| phandle = <0x41>; | |
| config { | |
| pins = "qdsd_cmd"; | |
| bias-pull-up; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cmd_swdtrc { | |
| linux,phandle = <0x47>; | |
| phandle = <0x47>; | |
| config { | |
| pins = "qdsd_cmd"; | |
| bias-pull-up; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cmd_jtag { | |
| linux,phandle = <0x4c>; | |
| phandle = <0x4c>; | |
| config { | |
| pins = "qdsd_cmd"; | |
| bias-disable; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| cmd_spmi { | |
| linux,phandle = <0x52>; | |
| phandle = <0x52>; | |
| config { | |
| pins = "qdsd_cmd"; | |
| bias-pull-down; | |
| drive-strength = <0x0a>; | |
| }; | |
| }; | |
| }; | |
| pmx_qdsd_data0 { | |
| data0_sdcard { | |
| linux,phandle = <0x37>; | |
| phandle = <0x37>; | |
| config { | |
| pins = "qdsd_data0"; | |
| bias-pull-down; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| data0_trace { | |
| linux,phandle = <0x3d>; | |
| phandle = <0x3d>; | |
| config { | |
| pins = "qdsd_data0"; | |
| bias-pull-down; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| data0_uart { | |
| linux,phandle = <0x42>; | |
| phandle = <0x42>; | |
| config { | |
| pins = "qdsd_data0"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| data0_swdtrc { | |
| linux,phandle = <0x48>; | |
| phandle = <0x48>; | |
| config { | |
| pins = "qdsd_data0"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| data0_jtag { | |
| linux,phandle = <0x4d>; | |
| phandle = <0x4d>; | |
| config { | |
| pins = "qdsd_data0"; | |
| bias-pull-up; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| data0_spmi { | |
| linux,phandle = <0x53>; | |
| phandle = <0x53>; | |
| config { | |
| pins = "qdsd_data0"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| }; | |
| pmx_qdsd_data1 { | |
| data1_sdcard { | |
| linux,phandle = <0x38>; | |
| phandle = <0x38>; | |
| config { | |
| pins = "qdsd_data1"; | |
| bias-pull-down; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| data1_trace { | |
| linux,phandle = <0x3e>; | |
| phandle = <0x3e>; | |
| config { | |
| pins = "qdsd_data1"; | |
| bias-pull-down; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| data1_uart { | |
| linux,phandle = <0x43>; | |
| phandle = <0x43>; | |
| config { | |
| pins = "qdsd_data1"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| data1_swdtrc { | |
| linux,phandle = <0x49>; | |
| phandle = <0x49>; | |
| config { | |
| pins = "qdsd_data1"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| data1_jtag { | |
| linux,phandle = <0x4e>; | |
| phandle = <0x4e>; | |
| config { | |
| pins = "qdsd_data1"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| }; | |
| pmx_qdsd_data2 { | |
| data2_sdcard { | |
| linux,phandle = <0x39>; | |
| phandle = <0x39>; | |
| config { | |
| pins = "qdsd_data2"; | |
| bias-pull-down; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| data2_trace { | |
| linux,phandle = <0x3f>; | |
| phandle = <0x3f>; | |
| config { | |
| pins = "qdsd_data2"; | |
| bias-pull-down; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| data2_uart { | |
| linux,phandle = <0x44>; | |
| phandle = <0x44>; | |
| config { | |
| pins = "qdsd_data2"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| data2_swdtrc { | |
| linux,phandle = <0x4a>; | |
| phandle = <0x4a>; | |
| config { | |
| pins = "qdsd_data2"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| data2_jtag { | |
| linux,phandle = <0x4f>; | |
| phandle = <0x4f>; | |
| config { | |
| pins = "qdsd_data2"; | |
| bias-pull-up; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| }; | |
| pmx_qdsd_data3 { | |
| data3_sdcard { | |
| linux,phandle = <0x3a>; | |
| phandle = <0x3a>; | |
| config { | |
| pins = "qdsd_data3"; | |
| bias-pull-down; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| data3_trace { | |
| linux,phandle = <0x40>; | |
| phandle = <0x40>; | |
| config { | |
| pins = "qdsd_data3"; | |
| bias-pull-down; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| data3_uart { | |
| linux,phandle = <0x45>; | |
| phandle = <0x45>; | |
| config { | |
| pins = "qdsd_data3"; | |
| bias-pull-up; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| data3_swdtrc { | |
| linux,phandle = <0x4b>; | |
| phandle = <0x4b>; | |
| config { | |
| pins = "qdsd_data3"; | |
| bias-pull-up; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| data3_jtag { | |
| linux,phandle = <0x50>; | |
| phandle = <0x50>; | |
| config { | |
| pins = "qdsd_data3"; | |
| bias-pull-up; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| data3_spmi { | |
| linux,phandle = <0x54>; | |
| phandle = <0x54>; | |
| config { | |
| pins = "qdsd_data3"; | |
| bias-pull-down; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| }; | |
| pmx_sdc1_rclk { | |
| sdc1_rclk_on { | |
| linux,phandle = <0xf5>; | |
| phandle = <0xf5>; | |
| config { | |
| pins = "sdc1_rclk"; | |
| bias-pull-down; | |
| }; | |
| }; | |
| sdc1_rclk_off { | |
| linux,phandle = <0xf9>; | |
| phandle = <0xf9>; | |
| config { | |
| pins = "sdc1_rclk"; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| wcd9xxx_intr { | |
| wcd_intr_default { | |
| linux,phandle = <0x15e>; | |
| phandle = <0x15e>; | |
| mux { | |
| pins = "gpio73"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio73"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| input-enable; | |
| }; | |
| }; | |
| }; | |
| cdc_reset_ctrl { | |
| cdc_reset_sleep { | |
| linux,phandle = <0x160>; | |
| phandle = <0x160>; | |
| mux { | |
| pins = "gpio68"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio68"; | |
| drive-strength = <0x10>; | |
| bias-disable; | |
| output-low; | |
| }; | |
| }; | |
| cdc_reset_active { | |
| linux,phandle = <0x15f>; | |
| phandle = <0x15f>; | |
| mux { | |
| pins = "gpio68"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio68"; | |
| drive-strength = <0x10>; | |
| bias-pull-down; | |
| output-high; | |
| }; | |
| }; | |
| }; | |
| cdc-pdm-2-lines { | |
| pdm_lines_2_on { | |
| linux,phandle = <0x134>; | |
| phandle = <0x134>; | |
| mux { | |
| pins = "gpio70\0gpio71\0gpio72"; | |
| function = "cdc_pdm0"; | |
| }; | |
| config { | |
| pins = "gpio70\0gpio71\0gpio72"; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| pdm_lines_2_off { | |
| linux,phandle = <0x132>; | |
| phandle = <0x132>; | |
| mux { | |
| pins = "gpio70\0gpio71\0gpio72"; | |
| function = "cdc_pdm0"; | |
| }; | |
| config { | |
| pins = "gpio70\0gpio71\0gpio72"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| cdc-pdm-lines { | |
| pdm_lines_on { | |
| linux,phandle = <0x133>; | |
| phandle = <0x133>; | |
| mux { | |
| pins = "gpio69\0gpio73\0gpio74"; | |
| function = "cdc_pdm0"; | |
| }; | |
| config { | |
| pins = "gpio69\0gpio73\0gpio74"; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| pdm_lines_off { | |
| linux,phandle = <0x131>; | |
| phandle = <0x131>; | |
| mux { | |
| pins = "gpio69\0gpio73\0gpio74"; | |
| function = "cdc_pdm0"; | |
| }; | |
| config { | |
| pins = "gpio69\0gpio73\0gpio74"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| cross-conn-det { | |
| lines_on { | |
| mux { | |
| pins = "gpio63"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio63"; | |
| drive-strength = <0x08>; | |
| output-low; | |
| bias-pull-down; | |
| }; | |
| }; | |
| lines_off { | |
| mux { | |
| pins = "gpio63"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio63"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| wsa-vi { | |
| wsa_vi_on { | |
| linux,phandle = <0xc8>; | |
| phandle = <0xc8>; | |
| mux { | |
| pins = "gpio94\0gpio95"; | |
| function = "wsa_io"; | |
| }; | |
| config { | |
| pins = "gpio94\0gpio95"; | |
| drive-strength = <0x08>; | |
| bias-disable; | |
| }; | |
| }; | |
| wsa_vi_off { | |
| linux,phandle = <0xc5>; | |
| phandle = <0xc5>; | |
| mux { | |
| pins = "gpio94\0gpio95"; | |
| function = "wsa_io"; | |
| }; | |
| config { | |
| pins = "gpio94\0gpio95"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| wsa_reset { | |
| wsa_reset_on { | |
| linux,phandle = <0xc7>; | |
| phandle = <0xc7>; | |
| mux { | |
| pins = "gpio96"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio96"; | |
| drive-strength = <0x02>; | |
| output-high; | |
| }; | |
| }; | |
| wsa_reset_off { | |
| linux,phandle = <0xc4>; | |
| phandle = <0xc4>; | |
| mux { | |
| pins = "gpio96"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio96"; | |
| drive-strength = <0x02>; | |
| output-low; | |
| }; | |
| }; | |
| }; | |
| wsa_clk { | |
| wsa_clk_on { | |
| linux,phandle = <0xc6>; | |
| phandle = <0xc6>; | |
| mux { | |
| pins = "gpio25"; | |
| function = "pri_mi2s_mclk_a"; | |
| }; | |
| config { | |
| pins = "gpio25"; | |
| drive-strength = <0x08>; | |
| output-high; | |
| }; | |
| }; | |
| wsa_clk_off { | |
| linux,phandle = <0xc3>; | |
| phandle = <0xc3>; | |
| mux { | |
| pins = "gpio25"; | |
| function = "pri_mi2s_mclk_a"; | |
| }; | |
| config { | |
| pins = "gpio25"; | |
| drive-strength = <0x02>; | |
| output-low; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| pri-tlmm-lines { | |
| pri_tlmm_lines_act { | |
| mux { | |
| pins = "gpio85\0gpio86\0gpio88"; | |
| function = "pri_mi2s"; | |
| }; | |
| config { | |
| pins = "gpio85\0gpio86\0gpio88"; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| pri_tlmm_lines_sus { | |
| mux { | |
| pins = "gpio85\0gpio86\0gpio88"; | |
| function = "pri_mi2s"; | |
| }; | |
| config { | |
| pins = "gpio85\0gpio86\0gpio88"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| pri-tlmm-ws-lines { | |
| pri_tlmm_ws_act { | |
| mux { | |
| pins = "gpio87"; | |
| function = "pri_mi2s_ws"; | |
| }; | |
| config { | |
| pins = "gpio87"; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| pri_tlmm_ws_sus { | |
| mux { | |
| pins = "gpio87"; | |
| function = "pri_mi2s_ws"; | |
| }; | |
| config { | |
| pins = "gpio87"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| pmx_sdc1_clk { | |
| sdc1_clk_on { | |
| linux,phandle = <0xf2>; | |
| phandle = <0xf2>; | |
| config { | |
| pins = "sdc1_clk"; | |
| bias-disable; | |
| drive-strength = <0x10>; | |
| }; | |
| }; | |
| sdc1_clk_off { | |
| linux,phandle = <0xf6>; | |
| phandle = <0xf6>; | |
| config { | |
| pins = "sdc1_clk"; | |
| bias-disable; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| }; | |
| pmx_sdc1_cmd { | |
| sdc1_cmd_on { | |
| linux,phandle = <0xf3>; | |
| phandle = <0xf3>; | |
| config { | |
| pins = "sdc1_cmd"; | |
| bias-pull-up; | |
| drive-strength = <0x0a>; | |
| }; | |
| }; | |
| sdc1_cmd_off { | |
| linux,phandle = <0xf7>; | |
| phandle = <0xf7>; | |
| config { | |
| pins = "sdc1_cmd"; | |
| bias-pull-up; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| }; | |
| pmx_sdc1_data { | |
| sdc1_data_on { | |
| linux,phandle = <0xf4>; | |
| phandle = <0xf4>; | |
| config { | |
| pins = "sdc1_data"; | |
| bias-pull-up; | |
| drive-strength = <0x0a>; | |
| }; | |
| }; | |
| sdc1_data_off { | |
| linux,phandle = <0xf8>; | |
| phandle = <0xf8>; | |
| config { | |
| pins = "sdc1_data"; | |
| bias-pull-up; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| }; | |
| sdhc2_cd_pin { | |
| cd_on { | |
| linux,phandle = <0xfd>; | |
| phandle = <0xfd>; | |
| mux { | |
| pins = "gpio67"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio67"; | |
| drive-strength = <0x02>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| cd_off { | |
| linux,phandle = <0x101>; | |
| phandle = <0x101>; | |
| mux { | |
| pins = "gpio67"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio67"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| pmx_sdc2_clk { | |
| sdc2_clk_on { | |
| linux,phandle = <0xfa>; | |
| phandle = <0xfa>; | |
| config { | |
| pins = "sdc2_clk"; | |
| drive-strength = <0x10>; | |
| bias-disable; | |
| }; | |
| }; | |
| sdc2_clk_off { | |
| linux,phandle = <0xfe>; | |
| phandle = <0xfe>; | |
| config { | |
| pins = "sdc2_clk"; | |
| bias-disable; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| }; | |
| pmx_sdc2_cmd { | |
| sdc2_cmd_on { | |
| linux,phandle = <0xfb>; | |
| phandle = <0xfb>; | |
| config { | |
| pins = "sdc2_cmd"; | |
| bias-pull-up; | |
| drive-strength = <0x10>; | |
| }; | |
| }; | |
| sdc2_cmd_off { | |
| linux,phandle = <0xff>; | |
| phandle = <0xff>; | |
| config { | |
| pins = "sdc2_cmd"; | |
| bias-pull-up; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| }; | |
| pmx_sdc2_data { | |
| sdc2_data_on { | |
| linux,phandle = <0xfc>; | |
| phandle = <0xfc>; | |
| config { | |
| pins = "sdc2_data"; | |
| bias-pull-up; | |
| drive-strength = <0x10>; | |
| }; | |
| }; | |
| sdc2_data_off { | |
| linux,phandle = <0x100>; | |
| phandle = <0x100>; | |
| config { | |
| pins = "sdc2_data"; | |
| bias-pull-up; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| }; | |
| cci { | |
| cci0_active { | |
| linux,phandle = <0x11d>; | |
| phandle = <0x11d>; | |
| mux { | |
| pins = "gpio29\0gpio30"; | |
| function = "cci_i2c"; | |
| }; | |
| config { | |
| pins = "gpio29\0gpio30"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| cci0_suspend { | |
| linux,phandle = <0x11f>; | |
| phandle = <0x11f>; | |
| mux { | |
| pins = "gpio29\0gpio30"; | |
| function = "cci_i2c"; | |
| }; | |
| config { | |
| pins = "gpio29\0gpio30"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| cci1_active { | |
| linux,phandle = <0x11e>; | |
| phandle = <0x11e>; | |
| mux { | |
| pins = "gpio31\0gpio32"; | |
| function = "cci_i2c"; | |
| }; | |
| config { | |
| pins = "gpio31\0gpio32"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| cci1_suspend { | |
| linux,phandle = <0x120>; | |
| phandle = <0x120>; | |
| mux { | |
| pins = "gpio31\0gpio32"; | |
| function = "cci_i2c"; | |
| }; | |
| config { | |
| pins = "gpio31\0gpio32"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| cam_sensor_mclk0_default { | |
| linux,phandle = <0x124>; | |
| phandle = <0x124>; | |
| mux { | |
| pins = "gpio26"; | |
| function = "cam_mclk"; | |
| }; | |
| config { | |
| pins = "gpio26"; | |
| bias-disable; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cam_sensor_mclk0_sleep { | |
| linux,phandle = <0x126>; | |
| phandle = <0x126>; | |
| mux { | |
| pins = "gpio26"; | |
| function = "cam_mclk"; | |
| }; | |
| config { | |
| pins = "gpio26"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cam_sensor_rear_default { | |
| linux,phandle = <0x125>; | |
| phandle = <0x125>; | |
| mux { | |
| pins = "gpio27\0gpio36\0gpio35\0gpio39"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio27\0gpio36\0gpio35\0gpio39"; | |
| bias-disable; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cam_sensor_rear_sleep { | |
| linux,phandle = <0x127>; | |
| phandle = <0x127>; | |
| mux { | |
| pins = "gpio27\0gpio36\0gpio35\0gpio39"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio27\0gpio36\0gpio35\0gpio39"; | |
| bias-disable; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cam_sensor_rear_vdig { | |
| mux { | |
| pins = "gpio62"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio62"; | |
| bias-disable; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cam_sensor_rear_vdig_sleep { | |
| mux { | |
| pins = "gpio62"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio62"; | |
| bias-disable; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cam_sensor_mclk1_default { | |
| mux { | |
| pins = "gpio27"; | |
| function = "cam_mclk"; | |
| }; | |
| config { | |
| pins = "gpio27"; | |
| bias-disable; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cam_sensor_mclk1_sleep { | |
| mux { | |
| pins = "gpio27"; | |
| function = "cam_mclk"; | |
| }; | |
| config { | |
| pins = "gpio27"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cam_sensor_front_default { | |
| mux { | |
| pins = "gpio38\0gpio50"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio38\0gpio50"; | |
| bias-disable; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cam_sensor_front_sleep { | |
| mux { | |
| pins = "gpio38\0gpio50"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio38\0gpio50"; | |
| bias-disable; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cam_sensor_mclk2_default { | |
| linux,phandle = <0x128>; | |
| phandle = <0x128>; | |
| mux { | |
| pins = "gpio28"; | |
| function = "cam_mclk"; | |
| }; | |
| config { | |
| pins = "gpio28"; | |
| bias-disable; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cam_sensor_mclk2_sleep { | |
| linux,phandle = <0x12a>; | |
| phandle = <0x12a>; | |
| mux { | |
| pins = "gpio28"; | |
| function = "cam_mclk"; | |
| }; | |
| config { | |
| pins = "gpio28"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cam_sensor_front1_default { | |
| linux,phandle = <0x129>; | |
| phandle = <0x129>; | |
| mux { | |
| pins = "gpio27\0gpio40\0gpio39"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio27\0gpio40\0gpio39"; | |
| bias-disable; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cam_sensor_front1_sleep { | |
| linux,phandle = <0x12b>; | |
| phandle = <0x12b>; | |
| mux { | |
| pins = "gpio27\0gpio40\0gpio39"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio27\0gpio40\0gpio39"; | |
| bias-disable; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| nfc_irq_default { | |
| config { | |
| pins = "gpio17"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| nfc_ven_default { | |
| config { | |
| pins = "gpio16"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| output-low; | |
| }; | |
| }; | |
| nfc_firm_default { | |
| config { | |
| pins = "gpio130"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| output-low; | |
| }; | |
| }; | |
| touch_reset_n { | |
| default { | |
| linux,phandle = <0xcd>; | |
| phandle = <0xcd>; | |
| mux { | |
| pins = "gpio64"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio64"; | |
| output-low; | |
| }; | |
| }; | |
| active { | |
| linux,phandle = <0xcf>; | |
| phandle = <0xcf>; | |
| mux { | |
| pins = "gpio64"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio64"; | |
| drive-strength = <0x02>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| }; | |
| touch_int_n { | |
| default { | |
| linux,phandle = <0xce>; | |
| phandle = <0xce>; | |
| mux { | |
| pins = "gpio65"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio65"; | |
| bias-disable; | |
| }; | |
| }; | |
| active { | |
| linux,phandle = <0xd0>; | |
| phandle = <0xd0>; | |
| mux { | |
| pins = "gpio65"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio65"; | |
| drive-strength = <0x02>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| }; | |
| sx9310 { | |
| default { | |
| linux,phandle = <0xc9>; | |
| phandle = <0xc9>; | |
| mux { | |
| pins = "gpio31"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio31"; | |
| drive-strength = <0x02>; | |
| bias-pull-up; | |
| input-enable; | |
| }; | |
| }; | |
| }; | |
| ltr559_int_pin { | |
| ltr559_default { | |
| mux { | |
| pins = "gpio46"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio46"; | |
| drive-strength = <0x06>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| ltr559_sleep { | |
| mux { | |
| pins = "gpio46"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio46"; | |
| drive-strength = <0x02>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| }; | |
| usb_id_pin { | |
| default { | |
| linux,phandle = <0xea>; | |
| phandle = <0xea>; | |
| mux { | |
| pins = "gpio97"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio97"; | |
| drive-strength = <0x08>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| usbid_off { | |
| linux,phandle = <0xeb>; | |
| phandle = <0xeb>; | |
| mux { | |
| pins = "gpio97"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio97"; | |
| drive-strength = <0x08>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| spi_7 { | |
| spi_7_active { | |
| linux,phandle = <0x16c>; | |
| phandle = <0x16c>; | |
| mux { | |
| pins = "gpio85\0gpio86\0gpio88"; | |
| function = "blsp_spi7"; | |
| }; | |
| config { | |
| pins = "gpio85\0gpio86\0gpio88"; | |
| drive-strength = <0x0c>; | |
| bias-disable; | |
| }; | |
| }; | |
| spi_7_sleep { | |
| linux,phandle = <0x16e>; | |
| phandle = <0x16e>; | |
| mux { | |
| pins = "gpio85\0gpio86\0gpio88"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio85\0gpio86\0gpio88"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| spi7_cs0_active { | |
| linux,phandle = <0x16d>; | |
| phandle = <0x16d>; | |
| mux { | |
| pins = "gpio87"; | |
| function = "blsp_spi7"; | |
| }; | |
| config { | |
| pins = "gpio87"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| spi7_cs0_sleep { | |
| linux,phandle = <0x16f>; | |
| phandle = <0x16f>; | |
| mux { | |
| pins = "gpio87"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio87"; | |
| drive-strength = <0x02>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| }; | |
| dtv-enable-ant { | |
| linux,phandle = <0x170>; | |
| phandle = <0x170>; | |
| mux { | |
| pins = "gpio94\0gpio96"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio94\0gpio96"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| output-low; | |
| }; | |
| }; | |
| dtv-irq-default { | |
| linux,phandle = <0x171>; | |
| phandle = <0x171>; | |
| mux { | |
| pins = "gpio50"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio50"; | |
| bias-pull-up; | |
| }; | |
| }; | |
| stml0xx-inputs { | |
| linux,phandle = <0x176>; | |
| phandle = <0x176>; | |
| mux { | |
| pins = "gpio42\0gpio45\0gpio126\0gpio124"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio42\0gpio45\0gpio126\0gpio124"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| stml0xx-wakeup { | |
| linux,phandle = <0x177>; | |
| phandle = <0x177>; | |
| mux { | |
| pins = "gpio41"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio41"; | |
| bias-disable; | |
| drive-strength = <0x02>; | |
| output-high; | |
| }; | |
| }; | |
| stml0xx-reset { | |
| linux,phandle = <0x178>; | |
| phandle = <0x178>; | |
| mux { | |
| pins = "gpio43"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio43"; | |
| bias-disable; | |
| drive-strength = <0x02>; | |
| output-high; | |
| }; | |
| }; | |
| stml0xx-flash-en { | |
| linux,phandle = <0x179>; | |
| phandle = <0x179>; | |
| mux { | |
| pins = "gpio44"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio44"; | |
| bias-disable; | |
| drive-strength = <0x02>; | |
| output-low; | |
| }; | |
| }; | |
| spi4_default { | |
| linux,phandle = <0x172>; | |
| phandle = <0x172>; | |
| mux { | |
| pins = "gpio12\0gpio13\0gpio15"; | |
| function = "blsp_spi4"; | |
| }; | |
| config { | |
| pins = "gpio12\0gpio13\0gpio15"; | |
| drive-strength = <0x0c>; | |
| bias-disable = <0x00>; | |
| }; | |
| }; | |
| spi4_sleep { | |
| linux,phandle = <0x174>; | |
| phandle = <0x174>; | |
| mux { | |
| pins = "gpio12\0gpio13\0gpio15"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio12\0gpio13\0gpio15"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| spi4_cs0_active { | |
| linux,phandle = <0x173>; | |
| phandle = <0x173>; | |
| mux { | |
| pins = "gpio14"; | |
| function = "blsp_spi4"; | |
| }; | |
| config { | |
| pins = "gpio14"; | |
| drive-strength = <0x02>; | |
| bias-disable = <0x00>; | |
| }; | |
| }; | |
| spi4_cs0_sleep { | |
| linux,phandle = <0x175>; | |
| phandle = <0x175>; | |
| mux { | |
| pins = "gpio14"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio14"; | |
| drive-strength = <0x02>; | |
| bias-disable = <0x00>; | |
| }; | |
| }; | |
| fps { | |
| rst_active { | |
| linux,phandle = <0x184>; | |
| phandle = <0x184>; | |
| mux { | |
| pins = "gpio127"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio127"; | |
| drive-strength = <0x02>; | |
| bias-pull-up; | |
| output-high; | |
| }; | |
| }; | |
| rst_suspend { | |
| linux,phandle = <0x187>; | |
| phandle = <0x187>; | |
| mux { | |
| pins = "gpio127"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio127"; | |
| drive-strength = <0x02>; | |
| bias-pull-up; | |
| output-high; | |
| }; | |
| }; | |
| int_active { | |
| linux,phandle = <0x185>; | |
| phandle = <0x185>; | |
| mux { | |
| pins = "gpio128"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio128"; | |
| drive-strength = <0x02>; | |
| input-enable; | |
| }; | |
| }; | |
| int_suspend { | |
| linux,phandle = <0x188>; | |
| phandle = <0x188>; | |
| mux { | |
| pins = "gpio128"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio128"; | |
| drive-strength = <0x02>; | |
| input-enable; | |
| }; | |
| }; | |
| ldo_en_active { | |
| linux,phandle = <0x186>; | |
| phandle = <0x186>; | |
| mux { | |
| pins = "gpio132"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio132"; | |
| drive-strength = <0x02>; | |
| bias-pull-up; | |
| output-high; | |
| }; | |
| }; | |
| ldo_en_suspend { | |
| linux,phandle = <0x189>; | |
| phandle = <0x189>; | |
| mux { | |
| pins = "gpio132"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio132"; | |
| drive-strength = <0x02>; | |
| bias-pull-up; | |
| output-high; | |
| }; | |
| }; | |
| }; | |
| spi_6 { | |
| spi_6_active { | |
| linux,phandle = <0x182>; | |
| phandle = <0x182>; | |
| mux { | |
| pins = "gpio20\0gpio21\0gpio23"; | |
| function = "blsp_spi6"; | |
| }; | |
| config { | |
| pins = "gpio20\0gpio21\0gpio23"; | |
| drive-strength = <0x0c>; | |
| bias-disable = <0x00>; | |
| }; | |
| }; | |
| spi_6_sleep { | |
| linux,phandle = <0x183>; | |
| phandle = <0x183>; | |
| mux { | |
| pins = "gpio20\0gpio21\0gpio23"; | |
| function = "blsp_spi6"; | |
| }; | |
| config { | |
| pins = "gpio20\0gpio21\0gpio23"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| cs0_active { | |
| mux { | |
| pins = "gpio22"; | |
| function = "blsp_spi6"; | |
| }; | |
| config { | |
| pins = "gpio22"; | |
| drive-strength = <0x02>; | |
| bias-disable = <0x00>; | |
| }; | |
| }; | |
| cs0_sleep { | |
| mux { | |
| pins = "gpio22"; | |
| function = "blsp_spi6"; | |
| }; | |
| config { | |
| pins = "gpio22"; | |
| drive-strength = <0x02>; | |
| bias-disable = <0x00>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| clock-controller@b111000 { | |
| compatible = "qcom,8937-l2ccc"; | |
| reg = <0xb111000 0x1000>; | |
| linux,phandle = <0x17>; | |
| phandle = <0x17>; | |
| }; | |
| clock-controller@b011000 { | |
| compatible = "qcom,8937-l2ccc"; | |
| reg = <0xb011000 0x1000>; | |
| linux,phandle = <0x0d>; | |
| phandle = <0x0d>; | |
| }; | |
| clock-controller@b088000 { | |
| compatible = "qcom,arm-cortex-acc"; | |
| reg = <0xb088000 0x1000>; | |
| linux,phandle = <0x0a>; | |
| phandle = <0x0a>; | |
| }; | |
| clock-controller@b098000 { | |
| compatible = "qcom,arm-cortex-acc"; | |
| reg = <0xb098000 0x1000>; | |
| linux,phandle = <0x0e>; | |
| phandle = <0x0e>; | |
| }; | |
| clock-controller@b0a8000 { | |
| compatible = "qcom,arm-cortex-acc"; | |
| reg = <0xb0a8000 0x1000>; | |
| linux,phandle = <0x10>; | |
| phandle = <0x10>; | |
| }; | |
| clock-controller@b0b8000 { | |
| compatible = "qcom,arm-cortex-acc"; | |
| reg = <0xb0b8000 0x1000>; | |
| linux,phandle = <0x12>; | |
| phandle = <0x12>; | |
| }; | |
| clock-controller@b188000 { | |
| compatible = "qcom,arm-cortex-acc"; | |
| reg = <0xb188000 0x1000>; | |
| linux,phandle = <0x14>; | |
| phandle = <0x14>; | |
| }; | |
| clock-controller@b198000 { | |
| compatible = "qcom,arm-cortex-acc"; | |
| reg = <0xb198000 0x1000>; | |
| linux,phandle = <0x18>; | |
| phandle = <0x18>; | |
| }; | |
| clock-controller@b1a8000 { | |
| compatible = "qcom,arm-cortex-acc"; | |
| reg = <0xb1a8000 0x1000>; | |
| linux,phandle = <0x19>; | |
| phandle = <0x19>; | |
| }; | |
| clock-controller@b1b8000 { | |
| compatible = "qcom,arm-cortex-acc"; | |
| reg = <0xb1b8000 0x1000>; | |
| linux,phandle = <0x1a>; | |
| phandle = <0x1a>; | |
| }; | |
| cpuss_dump { | |
| compatible = "qcom,cpuss-dump"; | |
| qcom,l2_dump0 { | |
| qcom,dump-node = <0x16>; | |
| qcom,dump-id = <0xc0>; | |
| }; | |
| qcom,l2_dump1 { | |
| qcom,dump-node = <0x0c>; | |
| qcom,dump-id = <0xc1>; | |
| }; | |
| qcom,l1_i_cache0 { | |
| qcom,dump-node = <0x1b>; | |
| qcom,dump-id = <0x60>; | |
| }; | |
| qcom,l1_i_cache1 { | |
| qcom,dump-node = <0x1c>; | |
| qcom,dump-id = <0x61>; | |
| }; | |
| qcom,l1_i_cache2 { | |
| qcom,dump-node = <0x1d>; | |
| qcom,dump-id = <0x62>; | |
| }; | |
| qcom,l1_i_cache3 { | |
| qcom,dump-node = <0x1e>; | |
| qcom,dump-id = <0x63>; | |
| }; | |
| qcom,l1_i_cache100 { | |
| qcom,dump-node = <0x1f>; | |
| qcom,dump-id = <0x64>; | |
| }; | |
| qcom,l1_i_cache101 { | |
| qcom,dump-node = <0x20>; | |
| qcom,dump-id = <0x65>; | |
| }; | |
| qcom,l1_i_cache102 { | |
| qcom,dump-node = <0x21>; | |
| qcom,dump-id = <0x66>; | |
| }; | |
| qcom,l1_i_cache103 { | |
| qcom,dump-node = <0x22>; | |
| qcom,dump-id = <0x67>; | |
| }; | |
| qcom,l1_d_cache0 { | |
| qcom,dump-node = <0x23>; | |
| qcom,dump-id = <0x80>; | |
| }; | |
| qcom,l1_d_cache1 { | |
| qcom,dump-node = <0x24>; | |
| qcom,dump-id = <0x81>; | |
| }; | |
| qcom,l1_d_cache2 { | |
| qcom,dump-node = <0x25>; | |
| qcom,dump-id = <0x82>; | |
| }; | |
| qcom,l1_d_cache3 { | |
| qcom,dump-node = <0x26>; | |
| qcom,dump-id = <0x83>; | |
| }; | |
| qcom,l1_d_cache100 { | |
| qcom,dump-node = <0x27>; | |
| qcom,dump-id = <0x84>; | |
| }; | |
| qcom,l1_d_cache101 { | |
| qcom,dump-node = <0x28>; | |
| qcom,dump-id = <0x85>; | |
| }; | |
| qcom,l1_d_cache102 { | |
| qcom,dump-node = <0x29>; | |
| qcom,dump-id = <0x86>; | |
| }; | |
| qcom,l1_d_cache103 { | |
| qcom,dump-node = <0x2a>; | |
| qcom,dump-id = <0x87>; | |
| }; | |
| }; | |
| qcom,kgsl-busmon { | |
| label = "kgsl-busmon"; | |
| compatible = "qcom,kgsl-busmon"; | |
| }; | |
| qcom,gpubw { | |
| compatible = "qcom,devbw"; | |
| governor = "bw_vbif"; | |
| qcom,src-dst-ports = <0x1a 0x200>; | |
| qcom,active-only; | |
| qcom,bw-tbl = <0x00 0x301 0x64b 0x84c 0xb71 0x1005 0x1098 0x14e2 0x1650 0x1808 0x1b77>; | |
| linux,phandle = <0x2c>; | |
| phandle = <0x2c>; | |
| }; | |
| qcom,kgsl-3d0@1c00000 { | |
| label = "kgsl-3d0"; | |
| compatible = "qcom,kgsl-3d0\0qcom,kgsl-3d"; | |
| status = "ok"; | |
| reg = <0x1c00000 0x40000 0xa0000 0x6fff>; | |
| reg-names = "kgsl_3d0_reg_memory\0qfprom_memory"; | |
| interrupts = <0x00 0x21 0x00>; | |
| interrupt-names = "kgsl_3d0_irq"; | |
| qcom,id = <0x00>; | |
| qcom,chipid = <0x5000500>; | |
| qcom,initial-pwrlevel = <0x02>; | |
| qcom,idle-timeout = <0x50>; | |
| qcom,strtstp-sleepwake; | |
| qcom,highest-bank-bit = <0x0e>; | |
| qcom,snapshot-size = <0x100000>; | |
| clocks = <0x2b 0x49a51fd9 0x2b 0xd15c8a00 0x2b 0x3edd69ad 0x2b 0x19922503 0x2b 0x1180db06 0x2b 0xae18e54d>; | |
| clock-names = "core_clk\0iface_clk\0mem_iface_clk\0alt_mem_iface_clk\0rbbmtimer_clk\0alwayson_clk"; | |
| qcom,gpubw-dev = <0x2c>; | |
| qcom,bus-control; | |
| qcom,bus-width = <0x10>; | |
| qcom,msm-bus,name = "grp3d"; | |
| qcom,msm-bus,num-cases = <0x0b>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x1a 0x200 0x00 0x00 0x1a 0x200 0x00 0xc4e00 0x1a 0x200 0x00 0x19c800 0x1a 0x200 0x00 0x21fc00 0x1a 0x200 0x00 0x2ee000 0x1a 0x200 0x00 0x41a000 0x1a 0x200 0x00 0x43f800 0x1a 0x200 0x00 0x50dc00 0x1a 0x200 0x00 0x5b6800 0x1a 0x200 0x00 0x627000 0x1a 0x200 0x00 0x708000>; | |
| regulator-names = "vddcx\0vdd"; | |
| vddcx-supply = <0x2d>; | |
| vdd-supply = <0x2e>; | |
| qcom,pm-qos-active-latency = <0x168>; | |
| qcom,pm-qos-wakeup-latency = <0x168>; | |
| qcom,gpu-quirk-two-pass-use-wfi; | |
| qcom,gpu-quirk-dp2clockgating-disable; | |
| qcom,gpu-quirk-lmloadkill-disable; | |
| coresight-id = <0x43>; | |
| coresight-name = "coresight-gfx"; | |
| coresight-nr-inports = <0x00>; | |
| coresight-outports = <0x00>; | |
| coresight-child-list = <0x2f>; | |
| coresight-child-ports = <0x06>; | |
| qcom,enable-ca-jump; | |
| qcom,ca-busy-penalty = <0x2ee0>; | |
| qcom,ca-target-pwrlevel = <0x01>; | |
| qcom,gpu-speed-bin = <0x6018 0x80000000 0x1f>; | |
| qcom,gpu-mempools { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| compatible = "qcom,gpu-mempools"; | |
| qcom,mempool-max-pages = <0x8000>; | |
| qcom,gpu-mempool@0 { | |
| reg = <0x00>; | |
| qcom,mempool-page-size = <0x1000>; | |
| }; | |
| qcom,gpu-mempool@1 { | |
| reg = <0x01>; | |
| qcom,mempool-page-size = <0x10000>; | |
| }; | |
| }; | |
| qcom,gpu-pwrlevels { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| compatible = "qcom,gpu-pwrlevels"; | |
| qcom,gpu-pwrlevel@0 { | |
| reg = <0x00>; | |
| qcom,gpu-freq = <0x1ad27480>; | |
| qcom,bus-freq = <0x09>; | |
| qcom,bus-min = <0x09>; | |
| qcom,bus-max = <0x09>; | |
| }; | |
| qcom,gpu-pwrlevel@1 { | |
| reg = <0x01>; | |
| qcom,gpu-freq = <0x17d78400>; | |
| qcom,bus-freq = <0x07>; | |
| qcom,bus-min = <0x06>; | |
| qcom,bus-max = <0x09>; | |
| }; | |
| qcom,gpu-pwrlevel@2 { | |
| reg = <0x02>; | |
| qcom,gpu-freq = <0x165a0bc0>; | |
| qcom,bus-freq = <0x06>; | |
| qcom,bus-min = <0x05>; | |
| qcom,bus-max = <0x08>; | |
| }; | |
| qcom,gpu-pwrlevel@3 { | |
| reg = <0x03>; | |
| qcom,gpu-freq = <0x11e1a300>; | |
| qcom,bus-freq = <0x05>; | |
| qcom,bus-min = <0x04>; | |
| qcom,bus-max = <0x07>; | |
| }; | |
| qcom,gpu-pwrlevel@4 { | |
| reg = <0x04>; | |
| qcom,gpu-freq = <0xcdfe600>; | |
| qcom,bus-freq = <0x03>; | |
| qcom,bus-min = <0x01>; | |
| qcom,bus-max = <0x04>; | |
| }; | |
| qcom,gpu-pwrlevel@5 { | |
| reg = <0x05>; | |
| qcom,gpu-freq = <0x124f800>; | |
| qcom,bus-freq = <0x00>; | |
| qcom,bus-min = <0x00>; | |
| qcom,bus-max = <0x00>; | |
| }; | |
| }; | |
| qcom,gpu-pwrlevel-bins { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| compatible = "qcom,gpu-pwrlevel-bins"; | |
| qcom,gpu-pwrlevels-0 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| qcom,speed-bin = <0x00>; | |
| qcom,initial-pwrlevel = <0x02>; | |
| qcom,gpu-pwrlevel@0 { | |
| reg = <0x00>; | |
| qcom,gpu-freq = <0x1ad27480>; | |
| qcom,bus-freq = <0x09>; | |
| qcom,bus-min = <0x09>; | |
| qcom,bus-max = <0x09>; | |
| }; | |
| qcom,gpu-pwrlevel@1 { | |
| reg = <0x01>; | |
| qcom,gpu-freq = <0x17d78400>; | |
| qcom,bus-freq = <0x07>; | |
| qcom,bus-min = <0x06>; | |
| qcom,bus-max = <0x09>; | |
| }; | |
| qcom,gpu-pwrlevel@2 { | |
| reg = <0x02>; | |
| qcom,gpu-freq = <0x165a0bc0>; | |
| qcom,bus-freq = <0x06>; | |
| qcom,bus-min = <0x05>; | |
| qcom,bus-max = <0x08>; | |
| }; | |
| qcom,gpu-pwrlevel@3 { | |
| reg = <0x03>; | |
| qcom,gpu-freq = <0x11e1a300>; | |
| qcom,bus-freq = <0x05>; | |
| qcom,bus-min = <0x04>; | |
| qcom,bus-max = <0x07>; | |
| }; | |
| qcom,gpu-pwrlevel@4 { | |
| reg = <0x04>; | |
| qcom,gpu-freq = <0xcdfe600>; | |
| qcom,bus-freq = <0x03>; | |
| qcom,bus-min = <0x01>; | |
| qcom,bus-max = <0x04>; | |
| }; | |
| qcom,gpu-pwrlevel@5 { | |
| reg = <0x05>; | |
| qcom,gpu-freq = <0x124f800>; | |
| qcom,bus-freq = <0x00>; | |
| qcom,bus-min = <0x00>; | |
| qcom,bus-max = <0x00>; | |
| }; | |
| }; | |
| qcom,gpu-pwrlevels-1 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| qcom,speed-bin = <0x01>; | |
| qcom,initial-pwrlevel = <0x03>; | |
| qcom,gpu-pwrlevel@0 { | |
| reg = <0x00>; | |
| qcom,gpu-freq = <0x1c4fecc0>; | |
| qcom,bus-freq = <0x0a>; | |
| qcom,bus-min = <0x0a>; | |
| qcom,bus-max = <0x0a>; | |
| }; | |
| qcom,gpu-pwrlevel@1 { | |
| reg = <0x01>; | |
| qcom,gpu-freq = <0x1ad27480>; | |
| qcom,bus-freq = <0x09>; | |
| qcom,bus-min = <0x09>; | |
| qcom,bus-max = <0x0a>; | |
| }; | |
| qcom,gpu-pwrlevel@2 { | |
| reg = <0x02>; | |
| qcom,gpu-freq = <0x17d78400>; | |
| qcom,bus-freq = <0x07>; | |
| qcom,bus-min = <0x06>; | |
| qcom,bus-max = <0x09>; | |
| }; | |
| qcom,gpu-pwrlevel@3 { | |
| reg = <0x03>; | |
| qcom,gpu-freq = <0x165a0bc0>; | |
| qcom,bus-freq = <0x06>; | |
| qcom,bus-min = <0x05>; | |
| qcom,bus-max = <0x08>; | |
| }; | |
| qcom,gpu-pwrlevel@4 { | |
| reg = <0x04>; | |
| qcom,gpu-freq = <0x11e1a300>; | |
| qcom,bus-freq = <0x05>; | |
| qcom,bus-min = <0x04>; | |
| qcom,bus-max = <0x07>; | |
| }; | |
| qcom,gpu-pwrlevel@5 { | |
| reg = <0x05>; | |
| qcom,gpu-freq = <0xcdfe600>; | |
| qcom,bus-freq = <0x03>; | |
| qcom,bus-min = <0x01>; | |
| qcom,bus-max = <0x04>; | |
| }; | |
| qcom,gpu-pwrlevel@6 { | |
| reg = <0x06>; | |
| qcom,gpu-freq = <0x124f800>; | |
| qcom,bus-freq = <0x00>; | |
| qcom,bus-min = <0x00>; | |
| qcom,bus-max = <0x00>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| qcom,kgsl-iommu@1c40000 { | |
| compatible = "qcom,kgsl-smmu-v2"; | |
| reg = <0x1c40000 0x10000>; | |
| qcom,protect = <0x40000 0x10000>; | |
| qcom,micro-mmu-control = <0x6000>; | |
| clocks = <0x2b 0xd15c8a00 0x2b 0x3edd69ad>; | |
| clock-names = "gpu_ahb_clk\0gcc_bimc_gfx_clk"; | |
| qcom,secure_align_mask = <0xfff>; | |
| qcom,retention; | |
| gfx3d_user { | |
| compatible = "qcom,smmu-kgsl-cb"; | |
| label = "gfx3d_user"; | |
| iommus = <0x30 0x00>; | |
| qcom,gpu-offset = <0x48000>; | |
| }; | |
| }; | |
| qcom,ion { | |
| compatible = "qcom,msm-ion"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| qcom,ion-heap@25 { | |
| reg = <0x19>; | |
| qcom,ion-heap-type = "SYSTEM"; | |
| }; | |
| qcom,ion-heap@8 { | |
| reg = <0x08>; | |
| memory-region = <0x31>; | |
| qcom,ion-heap-type = "SECURE_DMA"; | |
| }; | |
| qcom,ion-heap@27 { | |
| reg = <0x1b>; | |
| memory-region = <0x32>; | |
| qcom,ion-heap-type = "DMA"; | |
| }; | |
| }; | |
| arm,smmu-kgsl@1c40000 { | |
| status = "ok"; | |
| compatible = "qcom,smmu-v2"; | |
| qcom,tz-device-id = "GPU"; | |
| reg = <0x1c40000 0x10000>; | |
| #iommu-cells = <0x01>; | |
| #global-interrupts = <0x01>; | |
| interrupts = <0x00 0xc7 0x00 0x00 0xe1 0x00 0x00 0xe8 0x00 0x00 0xe9 0x00 0x00 0xea 0x00>; | |
| qcom,deferred-regulator-disable-delay = <0x50>; | |
| qcom,register-save; | |
| qcom,skip-init; | |
| qcom,dynamic; | |
| qcom,enable-smmu-halt; | |
| vdd-supply = <0x2d>; | |
| clocks = <0x2b 0xd15c8a00 0x2b 0x3edd69ad>; | |
| clock-names = "gpu_ahb_clk\0gcc_bimc_gfx_clk"; | |
| #clock-cells = <0x01>; | |
| attach-impl-defs = <0x6000 0x270 0x6060 0x1055 0x6800 0x06 0x6900 0x3ff 0x6924 0x204 0x6928 0x10800 0x6930 0x400 0x6960 0xffffffff 0x6b64 0xa0000 0x6b68 0xaaab92a>; | |
| linux,phandle = <0x30>; | |
| phandle = <0x30>; | |
| }; | |
| qcom,iommu@1e00000 { | |
| compatible = "qcom,msm-smmu-v2\0qcom,msm-mmu-500"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| ranges; | |
| reg = <0x1e00000 0x40000>; | |
| reg-names = "iommu_base"; | |
| interrupts = <0x00 0x29 0x00 0x00 0x26 0x00>; | |
| interrupt-names = "global_cfg_NS_irq\0global_cfg_S_irq"; | |
| label = "apps_iommu"; | |
| qcom,iommu-secure-id = <0x11>; | |
| clocks = <0x2b 0x75eaefa5 0x2b 0xaf56a329>; | |
| clock-names = "iface_clk\0core_clk"; | |
| qcom,cb-base-offset = <0x20000>; | |
| status = "ok"; | |
| linux,phandle = <0x11a>; | |
| phandle = <0x11a>; | |
| qcom,iommu-ctx@1e20000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e20000 0x1000>; | |
| qcom,secure-context; | |
| interrupts = <0x00 0xfd 0x00 0x00 0xfd 0x00>; | |
| qcom,iommu-ctx-sids = <0x2000>; | |
| qcom,iommu-sid-mask = <0x3f0>; | |
| label = "q6"; | |
| }; | |
| qcom,iommu-ctx@1e21000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e21000 0x1000>; | |
| qcom,secure-context; | |
| interrupts = <0x00 0xfe 0x00 0x00 0xfe 0x00>; | |
| qcom,iommu-ctx-sids = <0x2002>; | |
| qcom,iommu-sid-mask = <0x3f1>; | |
| label = "adsp_sec_pixel"; | |
| }; | |
| qcom,iommu-ctx@1e22000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e22000 0x1000>; | |
| qcom,secure-context; | |
| interrupts = <0x00 0xff 0x00 0x00 0xff 0x00>; | |
| qcom,iommu-ctx-sids = <0x2801>; | |
| qcom,iommu-sid-mask = <0x3fe>; | |
| label = "mdp_1"; | |
| }; | |
| qcom,iommu-ctx@1e23000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e23000 0x1000>; | |
| qcom,secure-context; | |
| interrupts = <0x00 0x35 0x00 0x00 0x35 0x00>; | |
| qcom,iommu-ctx-sids = <0x980 0x986>; | |
| qcom,iommu-sid-mask = <0x200 0x200>; | |
| label = "venus_fw"; | |
| qcom,report-error-on-fault; | |
| }; | |
| qcom,iommu-ctx@1e24000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e24000 0x1000>; | |
| qcom,secure-context; | |
| interrupts = <0x00 0x36 0x00 0x00 0x36 0x00>; | |
| qcom,iommu-ctx-sids = <0x900 0x90a 0x909>; | |
| qcom,iommu-sid-mask = <0x200 0x20a4 0x222>; | |
| label = "venus_sec_non_pixel"; | |
| qcom,report-error-on-fault; | |
| linux,phandle = <0xab>; | |
| phandle = <0xab>; | |
| }; | |
| qcom,iommu-ctx@1e25000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e25000 0x1000>; | |
| qcom,secure-context; | |
| interrupts = <0x00 0x3a 0x00 0x00 0x3a 0x00>; | |
| qcom,iommu-ctx-sids = <0x90c>; | |
| qcom,iommu-sid-mask = <0x220>; | |
| label = "venus_sec_bitstream"; | |
| qcom,report-error-on-fault; | |
| linux,phandle = <0xa9>; | |
| phandle = <0xa9>; | |
| }; | |
| qcom,iommu-ctx@1e26000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e26000 0x1000>; | |
| qcom,secure-context; | |
| interrupts = <0x00 0x3c 0x00 0x00 0x3c 0x00>; | |
| qcom,iommu-ctx-sids = <0x940 0x907 0x908 0x90d>; | |
| qcom,iommu-sid-mask = <0x200 0x208 0x220 0x220>; | |
| label = "venus_sec_pixel"; | |
| qcom,report-error-on-fault; | |
| linux,phandle = <0xaa>; | |
| phandle = <0xaa>; | |
| }; | |
| qcom,iommu-ctx@1e28000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e28000 0x1000>; | |
| interrupts = <0x00 0x4c 0x00>; | |
| qcom,iommu-ctx-sids = <0x1401 0x1402 0x1404>; | |
| qcom,iommu-sid-mask = <0x3f2 0x3f0 0x3f0>; | |
| label = "pronto_pil"; | |
| }; | |
| qcom,iommu-ctx@1e29000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e29000 0x1000>; | |
| interrupts = <0x00 0x4d 0x00>; | |
| qcom,iommu-ctx-sids = <0x1000>; | |
| qcom,iommu-sid-mask = <0x3fe>; | |
| label = "mss_nav"; | |
| }; | |
| qcom,iommu-ctx@1e2a000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e2a000 0x1000>; | |
| interrupts = <0x00 0x50 0x00>; | |
| qcom,iommu-ctx-sids = <0x40>; | |
| qcom,iommu-sid-mask = <0x3f>; | |
| label = "periph_rpm"; | |
| }; | |
| qcom,iommu-ctx@1e2b000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e2b000 0x1000>; | |
| interrupts = <0x00 0x5e 0x00>; | |
| qcom,iommu-ctx-sids = <0x1c0 0x1ca 0x1cc 0x1d0 0x1d6 0x1d8 0x1e0 0x1e4 0x1e8 0x1f0>; | |
| qcom,iommu-sid-mask = <0x07 0x01 0x03 0x03 0x01 0x07 0x03 0x01 0x07 0x01>; | |
| label = "lpass"; | |
| }; | |
| qcom,iommu-ctx@1e2f000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e2f000 0x1000>; | |
| interrupts = <0x00 0x68 0x00>; | |
| qcom,iommu-ctx-sids = <0x2001>; | |
| qcom,iommu-sid-mask = <0x3f0>; | |
| label = "adsp_io"; | |
| qcom,virtual-addr-pool = <0x10000000 0xfffffff>; | |
| #iommu-cells = <0x01>; | |
| linux,phandle = <0x130>; | |
| phandle = <0x130>; | |
| }; | |
| qcom,iommu-ctx@1e30000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e30000 0x1000>; | |
| interrupts = <0x00 0x69 0x00>; | |
| qcom,iommu-ctx-sids = <0x2004>; | |
| qcom,iommu-sid-mask = <0x3f0>; | |
| label = "adsp_opendsp"; | |
| }; | |
| qcom,iommu-ctx@1e31000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e31000 0x1000>; | |
| interrupts = <0x00 0x6a 0x00>; | |
| qcom,iommu-ctx-sids = <0x2008>; | |
| qcom,iommu-sid-mask = <0x3f7>; | |
| label = "adsp_shared"; | |
| linux,phandle = <0xef>; | |
| phandle = <0xef>; | |
| }; | |
| qcom,iommu-ctx@1e32000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e32000 0x1000>; | |
| interrupts = <0x00 0x6d 0x00>; | |
| qcom,iommu-ctx-sids = <0x1c00>; | |
| qcom,iommu-sid-mask = <0x3fc>; | |
| label = "cpp"; | |
| }; | |
| qcom,iommu-ctx@1e33000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e33000 0x1000>; | |
| interrupts = <0x00 0x6e 0x00>; | |
| qcom,iommu-ctx-sids = <0x1800>; | |
| qcom,iommu-sid-mask = <0x3fe>; | |
| label = "jpeg_enc0"; | |
| }; | |
| qcom,iommu-ctx@1e34000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e34000 0x1000>; | |
| interrupts = <0x00 0x6f 0x00>; | |
| qcom,iommu-ctx-sids = <0x400 0x2400>; | |
| qcom,iommu-sid-mask = <0x3fc 0x3fc>; | |
| label = "vfe"; | |
| }; | |
| qcom,iommu-ctx@1e35000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e35000 0x1000>; | |
| interrupts = <0x00 0x70 0x00>; | |
| qcom,iommu-ctx-sids = <0x2800>; | |
| qcom,iommu-sid-mask = <0x3fe>; | |
| label = "mdp_0"; | |
| }; | |
| qcom,iommu-ctx@1e36000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e36000 0x1000>; | |
| interrupts = <0x00 0x71 0x00>; | |
| qcom,iommu-ctx-sids = <0x800 0x807 0x808 0x811>; | |
| qcom,iommu-sid-mask = <0x200 0x200 0x227 0x220>; | |
| label = "venus_ns"; | |
| qcom,report-error-on-fault; | |
| linux,phandle = <0xa8>; | |
| phandle = <0xa8>; | |
| }; | |
| qcom,iommu-ctx@1e38000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e38000 0x1000>; | |
| interrupts = <0x00 0x73 0x00>; | |
| qcom,iommu-ctx-sids = <0xc00>; | |
| qcom,iommu-sid-mask = <0x3fe>; | |
| label = "mss_mcdma"; | |
| }; | |
| qcom,iommu-ctx@1e37000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e37000 0x1000>; | |
| interrupts = <0x00 0x72 0x00>; | |
| qcom,iommu-ctx-sids = <0x1406 0x1408 0x140c 0x100 0x1d4 0x1e6 0x2c0 0x340>; | |
| qcom,iommu-sid-mask = <0x3f1 0x3f3 0x3f1 0x7f 0x01 0x01 0x3f 0x3f>; | |
| label = "access_control"; | |
| }; | |
| }; | |
| tmc@6028000 { | |
| compatible = "arm,coresight-tmc"; | |
| reg = <0x6028000 0x1000 0x6044000 0x15000>; | |
| reg-names = "tmc-base\0bam-base"; | |
| interrupts = <0x00 0xa6 0x00>; | |
| interrupt-names = "byte-cntr-irq"; | |
| qcom,memory-size = <0x2000000>; | |
| qcom,sg-enable; | |
| qcom,force-reg-dump; | |
| coresight-id = <0x00>; | |
| coresight-name = "coresight-tmc-etr"; | |
| coresight-nr-inports = <0x01>; | |
| coresight-ctis = <0x33 0x34>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| linux,phandle = <0x57>; | |
| phandle = <0x57>; | |
| }; | |
| tpiu@6020000 { | |
| compatible = "arm,coresight-tpiu"; | |
| reg = <0x6020000 0x1000 0x1100000 0xb0000>; | |
| reg-names = "tpiu-base\0nidnt-base"; | |
| coresight-id = <0x01>; | |
| coresight-name = "coresight-tpiu"; | |
| coresight-nr-inports = <0x01>; | |
| pinctrl-names = "sdcard\0trace\0swduart\0swdtrc\0jtag\0spmi"; | |
| pinctrl-0 = <0x35 0x36 0x37 0x38 0x39 0x3a>; | |
| pinctrl-1 = <0x3b 0x3c 0x3d 0x3e 0x3f 0x40>; | |
| pinctrl-2 = <0x41 0x42 0x43 0x44 0x45>; | |
| pinctrl-3 = <0x46 0x47 0x48 0x49 0x4a 0x4b>; | |
| pinctrl-4 = <0x4c 0x4d 0x4e 0x4f 0x50>; | |
| pinctrl-5 = <0x51 0x52 0x53 0x54>; | |
| qcom,nidnthw; | |
| qcom,nidnt-swduart; | |
| qcom,nidnt-swdtrc; | |
| qcom,nidnt-jtag; | |
| qcom,nidnt-spmi; | |
| nidnt-gpio = <0x43>; | |
| nidnt-gpio-polarity = <0x01>; | |
| interrupts = <0x00 0x52 0x00>; | |
| interrupt-names = "nidnt-irq"; | |
| vdd-supply = <0x55>; | |
| qcom,vdd-voltage-level = <0x2d0370 0x2d0370>; | |
| qcom,vdd-current-level = <0x3a98 0x61a80>; | |
| vdd-io-supply = <0x56>; | |
| qcom,vdd-io-voltage-level = <0x2d0370 0x2d0370>; | |
| qcom,vdd-io-current-level = <0xc8 0xc350>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| linux,phandle = <0x58>; | |
| phandle = <0x58>; | |
| }; | |
| replicator@6026000 { | |
| compatible = "qcom,coresight-replicator"; | |
| reg = <0x6026000 0x1000>; | |
| reg-names = "replicator-base"; | |
| coresight-id = <0x02>; | |
| coresight-name = "coresight-replicator"; | |
| coresight-nr-inports = <0x01>; | |
| coresight-outports = <0x00 0x01>; | |
| coresight-child-list = <0x57 0x58>; | |
| coresight-child-ports = <0x00 0x00>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| linux,phandle = <0x59>; | |
| phandle = <0x59>; | |
| }; | |
| tmc@6027000 { | |
| compatible = "arm,coresight-tmc"; | |
| reg = <0x6027000 0x1000>; | |
| reg-names = "tmc-base"; | |
| coresight-id = <0x03>; | |
| coresight-name = "coresight-tmc-etf"; | |
| coresight-nr-inports = <0x01>; | |
| coresight-outports = <0x00>; | |
| coresight-child-list = <0x59>; | |
| coresight-child-ports = <0x00>; | |
| coresight-default-sink; | |
| coresight-ctis = <0x33 0x34>; | |
| qcom,force-reg-dump; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| linux,phandle = <0x5a>; | |
| phandle = <0x5a>; | |
| }; | |
| funnel@6021000 { | |
| compatible = "arm,coresight-funnel"; | |
| reg = <0x6021000 0x1000>; | |
| reg-names = "funnel-base"; | |
| coresight-id = <0x04>; | |
| coresight-name = "coresight-funnel-in0"; | |
| coresight-nr-inports = <0x08>; | |
| coresight-outports = <0x00>; | |
| coresight-child-list = <0x5a>; | |
| coresight-child-ports = <0x00>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| linux,phandle = <0x5b>; | |
| phandle = <0x5b>; | |
| }; | |
| funnel@6130000 { | |
| compatible = "arm,coresight-funnel"; | |
| reg = <0x6130000 0x1000>; | |
| reg-names = "funnel-base"; | |
| coresight-id = <0x05>; | |
| coresight-name = "coresight-funnel-mm"; | |
| coresight-nr-inports = <0x08>; | |
| coresight-outports = <0x00>; | |
| coresight-child-list = <0x5b>; | |
| coresight-child-ports = <0x05>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| linux,phandle = <0x2f>; | |
| phandle = <0x2f>; | |
| }; | |
| funnel@6100000 { | |
| compatible = "arm,coresight-funnel"; | |
| reg = <0x6100000 0x1000>; | |
| reg-names = "funnel-base"; | |
| coresight-id = <0x06>; | |
| coresight-name = "coresight-funnel-center"; | |
| coresight-nr-inports = <0x08>; | |
| coresight-outports = <0x00>; | |
| coresight-child-list = <0x5b>; | |
| coresight-child-ports = <0x03>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| linux,phandle = <0x60>; | |
| phandle = <0x60>; | |
| }; | |
| funnel@6120000 { | |
| compatible = "arm,coresight-funnel"; | |
| reg = <0x6120000 0x1000>; | |
| reg-names = "funnel-base"; | |
| coresight-id = <0x07>; | |
| coresight-name = "coresight-funnel-right"; | |
| coresight-nr-inports = <0x08>; | |
| coresight-outports = <0x00>; | |
| coresight-child-list = <0x5b>; | |
| coresight-child-ports = <0x04>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| linux,phandle = <0x5c>; | |
| phandle = <0x5c>; | |
| }; | |
| funnel@6132000 { | |
| compatible = "arm,coresight-funnel"; | |
| reg = <0x6132000 0x1000>; | |
| reg-names = "funnel-base"; | |
| coresight-id = <0x08>; | |
| coresight-name = "coresight-funnel-cam"; | |
| coresight-nr-inports = <0x08>; | |
| coresight-outports = <0x00>; | |
| coresight-child-list = <0x2f>; | |
| coresight-child-ports = <0x04>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| funnel@61a1000 { | |
| compatible = "arm,coresight-funnel"; | |
| reg = <0x61a1000 0x1000>; | |
| reg-names = "funnel-base"; | |
| coresight-id = <0x09>; | |
| coresight-name = "coresight-funnel-apss"; | |
| coresight-nr-inports = <0x08>; | |
| coresight-outports = <0x00>; | |
| coresight-child-list = <0x5c>; | |
| coresight-child-ports = <0x02>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| linux,phandle = <0x5d>; | |
| phandle = <0x5d>; | |
| }; | |
| etm@61bc000 { | |
| compatible = "arm,coresight-etmv4"; | |
| reg = <0x61bc000 0x1000>; | |
| reg-names = "etm-base"; | |
| coresight-id = <0x0a>; | |
| coresight-name = "coresight-etm0"; | |
| coresight-nr-inports = <0x00>; | |
| coresight-outports = <0x00>; | |
| coresight-child-list = <0x5d>; | |
| coresight-child-ports = <0x04>; | |
| coresight-etm-cpu = <0x06>; | |
| qcom,cpuss-debug-cgc = <0x5e>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| cluster-cgc { | |
| reg = <0xb011088 0x04>; | |
| cluster = <0x01>; | |
| linux,phandle = <0x5e>; | |
| phandle = <0x5e>; | |
| }; | |
| }; | |
| etm@61bd000 { | |
| compatible = "arm,coresight-etmv4"; | |
| reg = <0x61bd000 0x1000>; | |
| reg-names = "etm-base"; | |
| coresight-id = <0x0b>; | |
| coresight-name = "coresight-etm1"; | |
| coresight-nr-inports = <0x00>; | |
| coresight-outports = <0x00>; | |
| coresight-child-list = <0x5d>; | |
| coresight-child-ports = <0x05>; | |
| coresight-etm-cpu = <0x07>; | |
| qcom,cpuss-debug-cgc = <0x5e>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| etm@61be000 { | |
| compatible = "arm,coresight-etmv4"; | |
| reg = <0x61be000 0x1000>; | |
| reg-names = "etm-base"; | |
| coresight-id = <0x0c>; | |
| coresight-name = "coresight-etm2"; | |
| coresight-nr-inports = <0x00>; | |
| coresight-outports = <0x00>; | |
| coresight-child-list = <0x5d>; | |
| coresight-child-ports = <0x06>; | |
| coresight-etm-cpu = <0x08>; | |
| qcom,cpuss-debug-cgc = <0x5e>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| etm@61bf000 { | |
| compatible = "arm,coresight-etmv4"; | |
| reg = <0x61bf000 0x1000>; | |
| reg-names = "etm-base"; | |
| coresight-id = <0x0d>; | |
| coresight-name = "coresight-etm3"; | |
| coresight-nr-inports = <0x00>; | |
| coresight-outports = <0x00>; | |
| coresight-child-list = <0x5d>; | |
| coresight-child-ports = <0x07>; | |
| coresight-etm-cpu = <0x09>; | |
| qcom,cpuss-debug-cgc = <0x5e>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| etm@61b9c000 { | |
| compatible = "arm,coresight-etmv4"; | |
| reg = <0x619c000 0x1000>; | |
| reg-names = "etm-base"; | |
| coresight-id = <0x0e>; | |
| coresight-name = "coresight-etm4"; | |
| coresight-nr-inports = <0x00>; | |
| coresight-outports = <0x00>; | |
| coresight-child-list = <0x5d>; | |
| coresight-child-ports = <0x00>; | |
| coresight-etm-cpu = <0x02>; | |
| qcom,cpuss-debug-cgc = <0x5f>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| cluster-cgc { | |
| reg = <0xb111088 0x04>; | |
| cluster = <0x00>; | |
| linux,phandle = <0x5f>; | |
| phandle = <0x5f>; | |
| }; | |
| }; | |
| etm@61b9d000 { | |
| compatible = "arm,coresight-etmv4"; | |
| reg = <0x619d000 0x1000>; | |
| reg-names = "etm-base"; | |
| coresight-id = <0x0f>; | |
| coresight-name = "coresight-etm5"; | |
| coresight-nr-inports = <0x00>; | |
| coresight-outports = <0x00>; | |
| coresight-child-list = <0x5d>; | |
| coresight-child-ports = <0x01>; | |
| coresight-etm-cpu = <0x03>; | |
| qcom,cpuss-debug-cgc = <0x5f>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| etm@61b9e000 { | |
| compatible = "arm,coresight-etmv4"; | |
| reg = <0x619e000 0x1000>; | |
| reg-names = "etm-base"; | |
| coresight-id = <0x10>; | |
| coresight-name = "coresight-etm6"; | |
| coresight-nr-inports = <0x00>; | |
| coresight-outports = <0x00>; | |
| coresight-child-list = <0x5d>; | |
| coresight-child-ports = <0x02>; | |
| coresight-etm-cpu = <0x04>; | |
| qcom,cpuss-debug-cgc = <0x5f>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| etm@61b97000 { | |
| compatible = "arm,coresight-etmv4"; | |
| reg = <0x619f000 0x1000>; | |
| reg-names = "etm-base"; | |
| coresight-id = <0x11>; | |
| coresight-name = "coresight-etm7"; | |
| coresight-nr-inports = <0x00>; | |
| coresight-outports = <0x00>; | |
| coresight-child-list = <0x5d>; | |
| coresight-child-ports = <0x03>; | |
| coresight-etm-cpu = <0x05>; | |
| qcom,cpuss-debug-cgc = <0x5f>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| stm@6002000 { | |
| compatible = "arm,coresight-stm"; | |
| reg = <0x6002000 0x1000 0x9280000 0x180000>; | |
| reg-names = "stm-base\0stm-data-base"; | |
| coresight-id = <0x12>; | |
| coresight-name = "coresight-stm"; | |
| coresight-nr-inports = <0x00>; | |
| coresight-outports = <0x00>; | |
| coresight-child-list = <0x5b>; | |
| coresight-child-ports = <0x07>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| cti@6010000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6010000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x13>; | |
| coresight-name = "coresight-cti0"; | |
| coresight-nr-inports = <0x00>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| linux,phandle = <0x33>; | |
| phandle = <0x33>; | |
| }; | |
| cti@6011000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6011000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x14>; | |
| coresight-name = "coresight-cti1"; | |
| coresight-nr-inports = <0x00>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| cti@6012000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6012000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x15>; | |
| coresight-name = "coresight-cti2"; | |
| coresight-nr-inports = <0x00>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| cti@6013000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6013000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x16>; | |
| coresight-name = "coresight-cti3"; | |
| coresight-nr-inports = <0x00>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| cti@6014000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6014000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x17>; | |
| coresight-name = "coresight-cti4"; | |
| coresight-nr-inports = <0x00>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| cti@6015000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6015000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x18>; | |
| coresight-name = "coresight-cti5"; | |
| coresight-nr-inports = <0x00>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| cti@6016000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6016000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x19>; | |
| coresight-name = "coresight-cti6"; | |
| coresight-nr-inports = <0x00>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| cti@6017000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6017000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x1a>; | |
| coresight-name = "coresight-cti7"; | |
| coresight-nr-inports = <0x00>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| cti@6018000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6018000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x1b>; | |
| coresight-name = "coresight-cti8"; | |
| coresight-nr-inports = <0x00>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| linux,phandle = <0x34>; | |
| phandle = <0x34>; | |
| }; | |
| cti@6019000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6019000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x1c>; | |
| coresight-name = "coresight-cti9"; | |
| coresight-nr-inports = <0x00>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| cti@601a000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x601a000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x1d>; | |
| coresight-name = "coresight-cti10"; | |
| coresight-nr-inports = <0x00>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| cti@601b000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x601b000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x1e>; | |
| coresight-name = "coresight-cti11"; | |
| coresight-nr-inports = <0x00>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| cti@601c000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x601c000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x1f>; | |
| coresight-name = "coresight-cti12"; | |
| coresight-nr-inports = <0x00>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| cti@601d000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x601d000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x20>; | |
| coresight-name = "coresight-cti13"; | |
| coresight-nr-inports = <0x00>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| cti@601e000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x601e000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x21>; | |
| coresight-name = "coresight-cti14"; | |
| coresight-nr-inports = <0x00>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| cti@601f000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x601f000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x22>; | |
| coresight-name = "coresight-cti15"; | |
| coresight-nr-inports = <0x00>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| cti@61b8000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x61b8000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x23>; | |
| coresight-name = "coresight-cti-cpu0"; | |
| coresight-nr-inports = <0x00>; | |
| coresight-cti-cpu = <0x06>; | |
| qcom,cti-save; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| cti@61b9000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x61b9000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x24>; | |
| coresight-name = "coresight-cti-cpu1"; | |
| coresight-nr-inports = <0x00>; | |
| coresight-cti-cpu = <0x07>; | |
| qcom,cti-save; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| cti@61ba000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x61ba000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x25>; | |
| coresight-name = "coresight-cti-cpu2"; | |
| coresight-nr-inports = <0x00>; | |
| coresight-cti-cpu = <0x08>; | |
| qcom,cti-save; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| cti@61bb000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x61bb000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x26>; | |
| coresight-name = "coresight-cti-cpu3"; | |
| coresight-nr-inports = <0x00>; | |
| coresight-cti-cpu = <0x09>; | |
| qcom,cti-save; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| cti@6198000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6198000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x27>; | |
| coresight-name = "coresight-cti-cpu4"; | |
| coresight-nr-inports = <0x00>; | |
| coresight-cti-cpu = <0x02>; | |
| qcom,cti-save; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| cti@6199000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6199000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x28>; | |
| coresight-name = "coresight-cti-cpu5"; | |
| coresight-nr-inports = <0x00>; | |
| coresight-cti-cpu = <0x03>; | |
| qcom,cti-save; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| cti@619a000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x619a000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x29>; | |
| coresight-name = "coresight-cti-cpu6"; | |
| coresight-nr-inports = <0x00>; | |
| coresight-cti-cpu = <0x04>; | |
| qcom,cti-save; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| cti@619b000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x619b000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x2a>; | |
| coresight-name = "coresight-cti-cpu7"; | |
| coresight-nr-inports = <0x00>; | |
| coresight-cti-cpu = <0x05>; | |
| qcom,cti-save; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| cti@6124000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6124000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x2b>; | |
| coresight-name = "coresight-cti-modem-cpu0"; | |
| coresight-nr-inports = <0x00>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| cti@6139000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6139000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x2c>; | |
| coresight-name = "coresight-cti-wcn-cpu0"; | |
| coresight-nr-inports = <0x00>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| cti@6134000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6134000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x2d>; | |
| coresight-name = "coresight-cti-video-cpu0"; | |
| coresight-nr-inports = <0x00>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| cti@613c000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x613c000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x2e>; | |
| coresight-name = "coresight-cti-audio-cpu0"; | |
| coresight-nr-inports = <0x00>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| cti@610c000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x610c000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x2f>; | |
| coresight-name = "coresight-cti-rpm-cpu0"; | |
| coresight-nr-inports = <0x00>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| wcn_etm0 { | |
| compatible = "qcom,coresight-remote-etm"; | |
| coresight-id = <0x30>; | |
| coresight-name = "coresight-wcn-etm0"; | |
| coresight-nr-inports = <0x00>; | |
| coresight-outports = <0x00>; | |
| coresight-child-list = <0x2f>; | |
| coresight-child-ports = <0x00>; | |
| qcom,inst-id = <0x03>; | |
| }; | |
| rpm_etm0 { | |
| compatible = "qcom,coresight-remote-etm"; | |
| coresight-id = <0x31>; | |
| coresight-name = "coresight-rpm-etm0"; | |
| coresight-nr-inports = <0x00>; | |
| coresight-outports = <0x00>; | |
| coresight-child-list = <0x60>; | |
| coresight-child-ports = <0x00>; | |
| qcom,inst-id = <0x04>; | |
| }; | |
| audio_etm0 { | |
| compatible = "qcom,coresight-remote-etm"; | |
| coresight-id = <0x32>; | |
| coresight-name = "coresight-audio-etm0"; | |
| coresight-nr-inports = <0x00>; | |
| coresight-outports = <0x00>; | |
| coresight-child-list = <0x2f>; | |
| coresight-child-ports = <0x05>; | |
| qcom,inst-id = <0x05>; | |
| }; | |
| modem_etm0 { | |
| compatible = "qcom,coresight-remote-etm"; | |
| coresight-id = <0x33>; | |
| coresight-name = "coresight-modem-etm0"; | |
| coresight-nr-inports = <0x00>; | |
| coresight-outports = <0x00>; | |
| coresight-child-list = <0x5c>; | |
| coresight-child-ports = <0x01>; | |
| qcom,inst-id = <0x02>; | |
| }; | |
| csr@6001000 { | |
| compatible = "qcom,coresight-csr"; | |
| reg = <0x6001000 0x1000>; | |
| reg-names = "csr-base"; | |
| coresight-id = <0x34>; | |
| coresight-name = "coresight-csr"; | |
| coresight-nr-inports = <0x00>; | |
| qcom,blk-size = <0x01>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| dbgui@6108000 { | |
| compatible = "qcom,coresight-dbgui"; | |
| reg = <0x6108000 0x1000>; | |
| reg-names = "dbgui-base"; | |
| coresight-id = <0x35>; | |
| coresight-name = "coresight-dbgui"; | |
| coresight-nr-inports = <0x00>; | |
| coresight-outports = <0x00>; | |
| coresight-child-list = <0x60>; | |
| coresight-child-ports = <0x02>; | |
| qcom,dbgui-addr-offset = <0x30>; | |
| qcom,dbgui-data-offset = <0x130>; | |
| qcom,dbgui-size = <0x40>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| tpda@6003000 { | |
| compatible = "qcom,coresight-tpda"; | |
| reg = <0x6003000 0x1000>; | |
| reg-names = "tpda-base"; | |
| coresight-id = <0x36>; | |
| coresight-name = "coresight-tpda"; | |
| coresight-nr-inports = <0x02>; | |
| coresight-outports = <0x00>; | |
| coresight-child-list = <0x5b>; | |
| coresight-child-ports = <0x06>; | |
| qcom,tpda-atid = <0x40>; | |
| qcom,cmb-elem-size = <0x00 0x20>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| linux,phandle = <0x61>; | |
| phandle = <0x61>; | |
| }; | |
| tpdm@6110000 { | |
| compatible = "qcom,coresight-tpdm"; | |
| reg = <0x6110000 0x1000>; | |
| reg-names = "tpdm-base"; | |
| coresight-id = <0x37>; | |
| coresight-name = "coresight-tpdm-dcc"; | |
| coresight-nr-inports = <0x01>; | |
| coresight-outports = <0x00>; | |
| coresight-child-list = <0x61>; | |
| coresight-child-ports = <0x00>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| hwevent@6101000 { | |
| compatible = "qcom,coresight-hwevent"; | |
| reg = <0x6101000 0x148 0x6101fb0 0x04 0x6121000 0x148 0x6121fb0 0x04 0x6131000 0x148 0x6131fb0 0x04 0x78c5010 0x04 0x7885010 0x04>; | |
| reg-names = "center-wrapper-mux\0center-wrapper-lockaccess\0right-wrapper-mux\0right-wrapper-lockaccess\0mm-wrapper-mux\0mm-wrapper-lockaccess\0usbbam-mux\0blsp-mux"; | |
| coresight-id = <0x38>; | |
| coresight-name = "coresight-hwevent"; | |
| coresight-nr-inports = <0x00>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| fuse@a601c { | |
| compatible = "arm,coresight-fuse-v2"; | |
| reg = <0xa601c 0x08 0xa6004 0x04 0xa600c 0x04>; | |
| reg-names = "fuse-base\0nidnt-fuse-base\0qpdi-fuse-base"; | |
| coresight-id = <0x39>; | |
| coresight-name = "coresight-fuse"; | |
| coresight-nr-inports = <0x00>; | |
| }; | |
| qpdi@1941000 { | |
| compatible = "qcom,coresight-qpdi"; | |
| reg = <0x1941000 0x04>; | |
| reg-names = "qpdi-base"; | |
| coresight-id = <0x3a>; | |
| coresight-name = "coresight-qpdi"; | |
| coresight-nr-inports = <0x00>; | |
| vdd-supply = <0x55>; | |
| qcom,vdd-voltage-level = <0x2d0370 0x2d0370>; | |
| qcom,vdd-current-level = <0x3a98 0x61a80>; | |
| vdd-io-supply = <0x56>; | |
| qcom,vdd-io-voltage-level = <0x2d0370 0x2d0370>; | |
| qcom,vdd-io-current-level = <0xc8 0xc350>; | |
| }; | |
| ad-hoc-bus@580000 { | |
| compatible = "qcom,msm-bus-device"; | |
| reg = <0x580000 0x16080 0x580000 0x16080 0x400000 0x5a000 0x500000 0x13080>; | |
| reg-names = "snoc-base\0snoc-mm-base\0bimc-base\0pcnoc-base"; | |
| fab-bimc { | |
| cell-id = <0x00>; | |
| label = "fab-bimc"; | |
| qcom,fab-dev; | |
| qcom,base-name = "bimc-base"; | |
| qcom,bus-type = <0x02>; | |
| qcom,util-fact = <0x9a>; | |
| clock-names = "bus_clk\0bus_a_clk"; | |
| clocks = <0x2b 0xd212feea 0x2b 0x71d1a499>; | |
| coresight-id = <0xcb>; | |
| coresight-name = "coresight-bimc"; | |
| coresight-nr-inports = <0x00>; | |
| coresight-outports = <0x00>; | |
| coresight-child-list = <0x5b>; | |
| coresight-child-ports = <0x02>; | |
| linux,phandle = <0x64>; | |
| phandle = <0x64>; | |
| }; | |
| fab-pcnoc { | |
| cell-id = <0x1000>; | |
| label = "fab-pcnoc"; | |
| qcom,fab-dev; | |
| qcom,base-name = "pcnoc-base"; | |
| qcom,base-offset = <0x7000>; | |
| qcom,qos-off = <0x1000>; | |
| qcom,bus-type = <0x01>; | |
| clock-names = "bus_clk\0bus_a_clk"; | |
| clocks = <0x2b 0x2b53b688 0x2b 0x9753a54f>; | |
| coresight-id = <0xc9>; | |
| coresight-name = "coresight-pcnoc"; | |
| coresight-nr-inports = <0x00>; | |
| coresight-outports = <0x00>; | |
| coresight-child-list = <0x60>; | |
| coresight-child-ports = <0x03>; | |
| linux,phandle = <0x66>; | |
| phandle = <0x66>; | |
| }; | |
| fab-snoc { | |
| cell-id = <0x400>; | |
| label = "fab-snoc"; | |
| qcom,fab-dev; | |
| qcom,base-name = "snoc-base"; | |
| qcom,base-offset = <0x7000>; | |
| qcom,qos-off = <0x1000>; | |
| qcom,bus-type = <0x01>; | |
| clock-names = "bus_clk\0bus_a_clk"; | |
| clocks = <0x2b 0xe6900bb6 0x2b 0x5d4683bd>; | |
| coresight-id = <0xc8>; | |
| coresight-name = "coresight-snoc"; | |
| coresight-nr-inports = <0x00>; | |
| coresight-outports = <0x00>; | |
| coresight-child-list = <0x60>; | |
| coresight-child-ports = <0x04>; | |
| linux,phandle = <0x6d>; | |
| phandle = <0x6d>; | |
| }; | |
| fab-snoc-mm { | |
| cell-id = <0x800>; | |
| label = "fab-snoc-mm"; | |
| qcom,fab-dev; | |
| qcom,base-name = "snoc-mm-base"; | |
| qcom,base-offset = <0x7000>; | |
| qcom,qos-off = <0x1000>; | |
| qcom,bus-type = <0x01>; | |
| qcom,util-fact = <0x9a>; | |
| clock-names = "bus_clk\0bus_a_clk"; | |
| clocks = <0x2b 0xd61e5721 0x2b 0x50600f1b>; | |
| linux,phandle = <0x72>; | |
| phandle = <0x72>; | |
| }; | |
| mas-apps-proc { | |
| cell-id = <0x01>; | |
| label = "mas-apps-proc"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x00>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x62 0x63>; | |
| qcom,prio-lvl = <0x00>; | |
| qcom,prio-rd = <0x00>; | |
| qcom,prio-wr = <0x00>; | |
| qcom,bus-dev = <0x64>; | |
| qcom,mas-rpm-id = <0x00>; | |
| }; | |
| mas-oxili { | |
| cell-id = <0x1a>; | |
| label = "mas-oxili"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x02>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x62 0x63>; | |
| qcom,prio-lvl = <0x00>; | |
| qcom,prio-rd = <0x00>; | |
| qcom,prio-wr = <0x00>; | |
| qcom,bus-dev = <0x64>; | |
| qcom,mas-rpm-id = <0x06>; | |
| }; | |
| mas-snoc-bimc-0 { | |
| cell-id = <0x2717>; | |
| label = "mas-snoc-bimc-0"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x03>; | |
| qcom,qos-mode = "bypass"; | |
| qcom,connections = <0x62 0x63>; | |
| qcom,bus-dev = <0x64>; | |
| qcom,mas-rpm-id = <0x03>; | |
| linux,phandle = <0x9a>; | |
| phandle = <0x9a>; | |
| }; | |
| mas-snoc-bimc-2 { | |
| cell-id = <0x273d>; | |
| label = "mas-snoc-bimc-2"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x04>; | |
| qcom,qos-mode = "bypass"; | |
| qcom,connections = <0x62 0x63>; | |
| qcom,bus-dev = <0x64>; | |
| qcom,mas-rpm-id = <0x6c>; | |
| linux,phandle = <0x9c>; | |
| phandle = <0x9c>; | |
| }; | |
| mas-snoc-bimc-1 { | |
| cell-id = <0x2718>; | |
| label = "mas-snoc-bimc-1"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,qport = <0x05>; | |
| qcom,qos-mode = "bypass"; | |
| qcom,connections = <0x62>; | |
| qcom,bus-dev = <0x64>; | |
| qcom,mas-rpm-id = <0x4c>; | |
| linux,phandle = <0x9b>; | |
| phandle = <0x9b>; | |
| }; | |
| mas-tcu-0 { | |
| cell-id = <0x68>; | |
| label = "mas-tcu-0"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x06>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x62 0x63>; | |
| qcom,prio-lvl = <0x02>; | |
| qcom,prio-rd = <0x02>; | |
| qcom,bus-dev = <0x64>; | |
| qcom,mas-rpm-id = <0x66>; | |
| }; | |
| mas-spdm { | |
| cell-id = <0x24>; | |
| label = "mas-spdm"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,connections = <0x65>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x32>; | |
| }; | |
| mas-blsp-1 { | |
| cell-id = <0x56>; | |
| label = "mas-blsp-1"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,connections = <0x67>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x29>; | |
| }; | |
| mas-blsp-2 { | |
| cell-id = <0x54>; | |
| label = "mas-blsp-2"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,connections = <0x67>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x27>; | |
| }; | |
| mas-usb-hs1 { | |
| cell-id = <0x57>; | |
| label = "mas-usb-hs1"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x0c>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,prio1 = <0x01>; | |
| qcom,prio0 = <0x01>; | |
| qcom,connections = <0x68>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x2a>; | |
| }; | |
| mas-xi-usb-hs1 { | |
| cell-id = <0x6e>; | |
| label = "mas-xi-usb-hs1"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,qport = <0x0b>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x68>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x8a>; | |
| }; | |
| mas-crypto { | |
| cell-id = <0x37>; | |
| label = "mas-crypto"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x00>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x68>; | |
| qcom,prio1 = <0x01>; | |
| qcom,prio0 = <0x01>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x17>; | |
| }; | |
| mas-sdcc-1 { | |
| cell-id = <0x4e>; | |
| label = "mas-sdcc-1"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,qport = <0x07>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x68>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x21>; | |
| }; | |
| mas-sdcc-2 { | |
| cell-id = <0x51>; | |
| label = "mas-sdcc-2"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,qport = <0x08>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x68>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x23>; | |
| }; | |
| mas-snoc-pcnoc { | |
| cell-id = <0x2739>; | |
| label = "mas-snoc-pcnoc"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,qport = <0x09>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x69 0x6a 0x6b>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x4d>; | |
| linux,phandle = <0x9d>; | |
| phandle = <0x9d>; | |
| }; | |
| mas-qdss-bam { | |
| cell-id = <0x35>; | |
| label = "mas-qdss-bam"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x0b>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x6c>; | |
| qcom,prio1 = <0x01>; | |
| qcom,prio0 = <0x01>; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,mas-rpm-id = <0x13>; | |
| }; | |
| mas-bimc-snoc { | |
| cell-id = <0x2720>; | |
| label = "mas-bimc-snoc"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,connections = <0x6e 0x6f 0x70>; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,mas-rpm-id = <0x15>; | |
| linux,phandle = <0x98>; | |
| phandle = <0x98>; | |
| }; | |
| mas-jpeg { | |
| cell-id = <0x3e>; | |
| label = "mas-jpeg"; | |
| qcom,buswidth = <0x10>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x06>; | |
| qcom,qos-mode = "bypass"; | |
| qcom,connections = <0x71>; | |
| qcom,bus-dev = <0x72>; | |
| qcom,mas-rpm-id = <0x07>; | |
| }; | |
| mas-mdp { | |
| cell-id = <0x16>; | |
| label = "mas-mdp"; | |
| qcom,buswidth = <0x10>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x07>; | |
| qcom,qos-mode = "bypass"; | |
| qcom,connections = <0x73>; | |
| qcom,bus-dev = <0x72>; | |
| qcom,mas-rpm-id = <0x08>; | |
| }; | |
| mas-pcnoc-snoc { | |
| cell-id = <0x271a>; | |
| label = "mas-pcnoc-snoc"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,qport = <0x05>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x6e 0x6f 0x74>; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,mas-rpm-id = <0x1d>; | |
| qcom,blacklist = <0x75>; | |
| linux,phandle = <0x99>; | |
| phandle = <0x99>; | |
| }; | |
| mas-venus { | |
| cell-id = <0x3f>; | |
| label = "mas-venus"; | |
| qcom,buswidth = <0x10>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x08>; | |
| qcom,qos-mode = "bypass"; | |
| qcom,connections = <0x71>; | |
| qcom,bus-dev = <0x72>; | |
| qcom,mas-rpm-id = <0x09>; | |
| }; | |
| mas-vfe0 { | |
| cell-id = <0x1d>; | |
| label = "mas-vfe0"; | |
| qcom,buswidth = <0x10>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x09>; | |
| qcom,qos-mode = "bypass"; | |
| qcom,connections = <0x73>; | |
| qcom,bus-dev = <0x72>; | |
| qcom,mas-rpm-id = <0x0b>; | |
| }; | |
| mas-vfe1 { | |
| cell-id = <0x6d>; | |
| label = "mas-vfe1"; | |
| qcom,buswidth = <0x10>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x0d>; | |
| qcom,qos-mode = "bypass"; | |
| qcom,connections = <0x73>; | |
| qcom,bus-dev = <0x72>; | |
| qcom,mas-rpm-id = <0x85>; | |
| }; | |
| mas-cpp { | |
| cell-id = <0x6a>; | |
| label = "mas-cpp"; | |
| qcom,buswidth = <0x10>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x0c>; | |
| qcom,qos-mode = "bypass"; | |
| qcom,connections = <0x71>; | |
| qcom,bus-dev = <0x72>; | |
| qcom,mas-rpm-id = <0x73>; | |
| }; | |
| mas-qdss-etr { | |
| cell-id = <0x3c>; | |
| label = "mas-qdss-etr"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x0a>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x6c>; | |
| qcom,prio1 = <0x01>; | |
| qcom,prio0 = <0x01>; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,mas-rpm-id = <0x1f>; | |
| }; | |
| pcnoc-m-0 { | |
| cell-id = <0x271e>; | |
| label = "pcnoc-m-0"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x05>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x68>; | |
| qcom,prio1 = <0x01>; | |
| qcom,prio0 = <0x01>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x57>; | |
| qcom,slv-rpm-id = <0x74>; | |
| linux,phandle = <0x65>; | |
| phandle = <0x65>; | |
| }; | |
| pcnoc-m-1 { | |
| cell-id = <0x271f>; | |
| label = "pcnoc-m-1"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,connections = <0x68>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x58>; | |
| qcom,slv-rpm-id = <0x75>; | |
| linux,phandle = <0x67>; | |
| phandle = <0x67>; | |
| }; | |
| pcnoc-int-0 { | |
| cell-id = <0x271c>; | |
| label = "pcnoc-int-0"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,connections = <0x76 0x69 0x6b 0x6a>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x55>; | |
| qcom,slv-rpm-id = <0x72>; | |
| linux,phandle = <0x68>; | |
| phandle = <0x68>; | |
| }; | |
| pcnoc-int-1 { | |
| cell-id = <0x271d>; | |
| label = "pcnoc-int-1"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,connections = <0x76 0x69 0x6b 0x6a>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x56>; | |
| qcom,slv-rpm-id = <0x73>; | |
| }; | |
| pcnoc-int-2 { | |
| cell-id = <0x2741>; | |
| label = "pcnoc-int-2"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,connections = <0x77 0x78 0x79 0x7a>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x7c>; | |
| qcom,slv-rpm-id = <0xb8>; | |
| linux,phandle = <0x6a>; | |
| phandle = <0x6a>; | |
| }; | |
| pcnoc-int-3 { | |
| cell-id = <0x2742>; | |
| label = "pcnoc-int-3"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,connections = <0x7b 0x7c 0x7d 0x7e 0x7f>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x7d>; | |
| qcom,slv-rpm-id = <0xb9>; | |
| linux,phandle = <0x6b>; | |
| phandle = <0x6b>; | |
| }; | |
| pcnoc-s-0 { | |
| cell-id = <0x2722>; | |
| label = "pcnoc-s-0"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,connections = <0x80 0x81 0x82 0x83>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x59>; | |
| qcom,slv-rpm-id = <0x76>; | |
| linux,phandle = <0x7c>; | |
| phandle = <0x7c>; | |
| }; | |
| pcnoc-s-1 { | |
| cell-id = <0x2723>; | |
| label = "pcnoc-s-1"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,connections = <0x84>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x5a>; | |
| qcom,slv-rpm-id = <0x77>; | |
| linux,phandle = <0x7b>; | |
| phandle = <0x7b>; | |
| }; | |
| pcnoc-s-2 { | |
| cell-id = <0x2724>; | |
| label = "pcnoc-s-2"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,connections = <0x85>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x5b>; | |
| qcom,slv-rpm-id = <0x78>; | |
| linux,phandle = <0x77>; | |
| phandle = <0x77>; | |
| }; | |
| pcnoc-s-3 { | |
| cell-id = <0x2725>; | |
| label = "pcnoc-s-3"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,connections = <0x86>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x5c>; | |
| qcom,slv-rpm-id = <0x79>; | |
| linux,phandle = <0x78>; | |
| phandle = <0x78>; | |
| }; | |
| pcnoc-s-4 { | |
| cell-id = <0x2726>; | |
| label = "pcnoc-s-4"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,connections = <0x87 0x88 0x89>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x5d>; | |
| qcom,slv-rpm-id = <0x7a>; | |
| linux,phandle = <0x7d>; | |
| phandle = <0x7d>; | |
| }; | |
| pcnoc-s-6 { | |
| cell-id = <0x2d1>; | |
| label = "pcnoc-s-6"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,connections = <0x8a 0x8b 0x8c>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x5e>; | |
| qcom,slv-rpm-id = <0x7b>; | |
| linux,phandle = <0x79>; | |
| phandle = <0x79>; | |
| }; | |
| pcnoc-s-7 { | |
| cell-id = <0x2740>; | |
| label = "pcnoc-s-7"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,connections = <0x8d 0x8e>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x5f>; | |
| qcom,slv-rpm-id = <0x7c>; | |
| linux,phandle = <0x69>; | |
| phandle = <0x69>; | |
| }; | |
| pcnoc-s-8 { | |
| cell-id = <0x2727>; | |
| label = "pcnoc-s-8"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,connections = <0x8f 0x90>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x60>; | |
| qcom,slv-rpm-id = <0x7d>; | |
| linux,phandle = <0x7a>; | |
| phandle = <0x7a>; | |
| }; | |
| qdss-int { | |
| cell-id = <0x2719>; | |
| label = "qdss-int"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,connections = <0x6f 0x74>; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,mas-rpm-id = <0x62>; | |
| qcom,slv-rpm-id = <0x80>; | |
| linux,phandle = <0x6c>; | |
| phandle = <0x6c>; | |
| }; | |
| snoc-int-0 { | |
| cell-id = <0x2714>; | |
| label = "snoc-int-0"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,connections = <0x91 0x92 0x93>; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,mas-rpm-id = <0x63>; | |
| qcom,slv-rpm-id = <0x82>; | |
| linux,phandle = <0x6e>; | |
| phandle = <0x6e>; | |
| }; | |
| snoc-int-1 { | |
| cell-id = <0x2715>; | |
| label = "snoc-int-1"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,connections = <0x94 0x95 0x75>; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,mas-rpm-id = <0x64>; | |
| qcom,slv-rpm-id = <0x83>; | |
| linux,phandle = <0x6f>; | |
| phandle = <0x6f>; | |
| }; | |
| snoc-int-2 { | |
| cell-id = <0x2752>; | |
| label = "snoc-int-2"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,connections = <0x96 0x97>; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,mas-rpm-id = <0x86>; | |
| qcom,slv-rpm-id = <0xc5>; | |
| linux,phandle = <0x70>; | |
| phandle = <0x70>; | |
| }; | |
| slv-ebi { | |
| cell-id = <0x200>; | |
| label = "slv-ebi"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x64>; | |
| qcom,slv-rpm-id = <0x00>; | |
| linux,phandle = <0x62>; | |
| phandle = <0x62>; | |
| }; | |
| slv-bimc-snoc { | |
| cell-id = <0x2721>; | |
| label = "slv-bimc-snoc"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x64>; | |
| qcom,connections = <0x98>; | |
| qcom,slv-rpm-id = <0x02>; | |
| linux,phandle = <0x63>; | |
| phandle = <0x63>; | |
| }; | |
| slv-sdcc-2 { | |
| cell-id = <0x260>; | |
| label = "slv-sdcc-2"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x21>; | |
| linux,phandle = <0x83>; | |
| phandle = <0x83>; | |
| }; | |
| slv-spdm { | |
| cell-id = <0x279>; | |
| label = "slv-spdm"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x3c>; | |
| linux,phandle = <0x80>; | |
| phandle = <0x80>; | |
| }; | |
| slv-pdm { | |
| cell-id = <0x267>; | |
| label = "slv-pdm"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x29>; | |
| linux,phandle = <0x81>; | |
| phandle = <0x81>; | |
| }; | |
| slv-prng { | |
| cell-id = <0x26a>; | |
| label = "slv-prng"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x2c>; | |
| linux,phandle = <0x82>; | |
| phandle = <0x82>; | |
| }; | |
| slv-tcsr { | |
| cell-id = <0x26f>; | |
| label = "slv-tcsr"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x32>; | |
| linux,phandle = <0x84>; | |
| phandle = <0x84>; | |
| }; | |
| slv-snoc-cfg { | |
| cell-id = <0x282>; | |
| label = "slv-snoc-cfg"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x46>; | |
| linux,phandle = <0x85>; | |
| phandle = <0x85>; | |
| }; | |
| slv-message-ram { | |
| cell-id = <0x274>; | |
| label = "slv-message-ram"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x37>; | |
| linux,phandle = <0x86>; | |
| phandle = <0x86>; | |
| }; | |
| slv-camera-ss-cfg { | |
| cell-id = <0x24d>; | |
| label = "slv-camera-ss-cfg"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x03>; | |
| linux,phandle = <0x87>; | |
| phandle = <0x87>; | |
| }; | |
| slv-disp-ss-cfg { | |
| cell-id = <0x24e>; | |
| label = "slv-disp-ss-cfg"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x04>; | |
| linux,phandle = <0x88>; | |
| phandle = <0x88>; | |
| }; | |
| slv-venus-cfg { | |
| cell-id = <0x254>; | |
| label = "slv-venus-cfg"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x0a>; | |
| linux,phandle = <0x89>; | |
| phandle = <0x89>; | |
| }; | |
| slv-gpu-cfg { | |
| cell-id = <0x256>; | |
| label = "slv-gpu-cfg"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x0b>; | |
| linux,phandle = <0x7e>; | |
| phandle = <0x7e>; | |
| }; | |
| slv-tlmm { | |
| cell-id = <0x270>; | |
| label = "slv-tlmm"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x33>; | |
| linux,phandle = <0x8a>; | |
| phandle = <0x8a>; | |
| }; | |
| slv-blsp-1 { | |
| cell-id = <0x265>; | |
| label = "slv-blsp-1"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x27>; | |
| linux,phandle = <0x8b>; | |
| phandle = <0x8b>; | |
| }; | |
| slv-blsp-2 { | |
| cell-id = <0x263>; | |
| label = "slv-blsp-2"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x25>; | |
| linux,phandle = <0x8c>; | |
| phandle = <0x8c>; | |
| }; | |
| slv-pmic-arb { | |
| cell-id = <0x278>; | |
| label = "slv-pmic-arb"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x3b>; | |
| linux,phandle = <0x8e>; | |
| phandle = <0x8e>; | |
| }; | |
| slv-sdcc-1 { | |
| cell-id = <0x25e>; | |
| label = "slv-sdcc-1"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x1f>; | |
| linux,phandle = <0x8d>; | |
| phandle = <0x8d>; | |
| }; | |
| slv-crypto-0-cfg { | |
| cell-id = <0x271>; | |
| label = "slv-crypto-0-cfg"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x34>; | |
| linux,phandle = <0x90>; | |
| phandle = <0x90>; | |
| }; | |
| slv-usb-hs { | |
| cell-id = <0x266>; | |
| label = "slv-usb-hs"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x28>; | |
| linux,phandle = <0x8f>; | |
| phandle = <0x8f>; | |
| }; | |
| slv-tcu { | |
| cell-id = <0x2a0>; | |
| label = "slv-tcu"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x85>; | |
| linux,phandle = <0x7f>; | |
| phandle = <0x7f>; | |
| }; | |
| slv-pcnoc-snoc { | |
| cell-id = <0x271b>; | |
| label = "slv-pcnoc-snoc"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,connections = <0x99>; | |
| qcom,slv-rpm-id = <0x2d>; | |
| linux,phandle = <0x76>; | |
| phandle = <0x76>; | |
| }; | |
| slv-kpss-ahb { | |
| cell-id = <0x2a1>; | |
| label = "slv-kpss-ahb"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,slv-rpm-id = <0x14>; | |
| linux,phandle = <0x93>; | |
| phandle = <0x93>; | |
| }; | |
| slv-wcss { | |
| cell-id = <0x248>; | |
| label = "slv-wcss"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,slv-rpm-id = <0x17>; | |
| linux,phandle = <0x92>; | |
| phandle = <0x92>; | |
| }; | |
| slv-snoc-bimc-0 { | |
| cell-id = <0x2729>; | |
| label = "slv-snoc-bimc-0"; | |
| qcom,buswidth = <0x10>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x72>; | |
| qcom,connections = <0x9a>; | |
| qcom,slv-rpm-id = <0x18>; | |
| linux,phandle = <0x73>; | |
| phandle = <0x73>; | |
| }; | |
| slv-snoc-bimc-1 { | |
| cell-id = <0x272a>; | |
| label = "slv-snoc-bimc-1"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,connections = <0x9b>; | |
| qcom,slv-rpm-id = <0x68>; | |
| linux,phandle = <0x74>; | |
| phandle = <0x74>; | |
| }; | |
| slv-snoc-bimc-2 { | |
| cell-id = <0x273e>; | |
| label = "slv-snoc-bimc-2"; | |
| qcom,buswidth = <0x10>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x72>; | |
| qcom,connections = <0x9c>; | |
| qcom,slv-rpm-id = <0x89>; | |
| linux,phandle = <0x71>; | |
| phandle = <0x71>; | |
| }; | |
| slv-imem { | |
| cell-id = <0x249>; | |
| label = "slv-imem"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,slv-rpm-id = <0x1a>; | |
| linux,phandle = <0x95>; | |
| phandle = <0x95>; | |
| }; | |
| slv-snoc-pcnoc { | |
| cell-id = <0x273a>; | |
| label = "slv-snoc-pcnoc"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,connections = <0x9d>; | |
| qcom,slv-rpm-id = <0x1c>; | |
| linux,phandle = <0x75>; | |
| phandle = <0x75>; | |
| }; | |
| slv-qdss-stm { | |
| cell-id = <0x24c>; | |
| label = "slv-qdss-stm"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,slv-rpm-id = <0x1e>; | |
| linux,phandle = <0x94>; | |
| phandle = <0x94>; | |
| }; | |
| slv-cats-0 { | |
| cell-id = <0x297>; | |
| label = "slv-cats-0"; | |
| qcom,buswidth = <0x10>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x72>; | |
| qcom,slv-rpm-id = <0x6a>; | |
| linux,phandle = <0x96>; | |
| phandle = <0x96>; | |
| }; | |
| slv-cats-1 { | |
| cell-id = <0x298>; | |
| label = "slv-cats-1"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,slv-rpm-id = <0x6b>; | |
| linux,phandle = <0x97>; | |
| phandle = <0x97>; | |
| }; | |
| slv-lpass { | |
| cell-id = <0x20a>; | |
| label = "slv-lpass"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,slv-rpm-id = <0x15>; | |
| linux,phandle = <0x91>; | |
| phandle = <0x91>; | |
| }; | |
| }; | |
| devfreq_spdm_cpu { | |
| compatible = "qcom,devfreq_spdm"; | |
| qcom,msm-bus,name = "devfreq_spdm"; | |
| qcom,msm-bus,num-cases = <0x02>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x01 0x200 0x00 0x00 0x01 0x200 0x00 0x00>; | |
| qcom,msm-bus,active-only; | |
| qcom,spdm-client = <0x00>; | |
| clock-names = "cci_clk"; | |
| clocks = <0x9e 0x96854074>; | |
| qcom,bw-upstep = <0x190>; | |
| qcom,bw-dwnstep = <0xe38>; | |
| qcom,max-vote = <0xe38>; | |
| qcom,up-step-multp = <0x01>; | |
| qcom,spdm-interval = <0x32>; | |
| qcom,ports = <0x0b>; | |
| qcom,alpha-up = <0x08>; | |
| qcom,alpha-down = <0x0f>; | |
| qcom,bucket-size = <0x08>; | |
| qcom,pl-freqs = <0x7ef40 0xafc80>; | |
| qcom,reject-rate = <0x1388 0x1388 0x1388 0x1388 0x1388 0x1388>; | |
| qcom,response-time-us = <0x1388 0x1388 0x1388 0x1388 0x1388 0x1388>; | |
| qcom,cci-response-time-us = <0x1388 0x1388 0x1388 0x1388 0x1388 0x1388>; | |
| qcom,max-cci-freq = <0x7a120>; | |
| }; | |
| devfreq_spdm_gov { | |
| compatible = "qcom,gov_spdm_hyp"; | |
| interrupt-names = "spdm-irq"; | |
| interrupts = <0x00 0xc0 0x00>; | |
| }; | |
| qcom,smp2p-modem@0xb011008 { | |
| compatible = "qcom,smp2p"; | |
| reg = <0xb011008 0x04>; | |
| qcom,remote-pid = <0x01>; | |
| qcom,irq-bitmask = <0x4000>; | |
| interrupts = <0x00 0x1b 0x01>; | |
| }; | |
| qcom,smp2p-wcnss@0xb011008 { | |
| compatible = "qcom,smp2p"; | |
| reg = <0xb011008 0x04>; | |
| qcom,remote-pid = <0x04>; | |
| qcom,irq-bitmask = <0x40000>; | |
| interrupts = <0x00 0x8f 0x01>; | |
| }; | |
| qcom,smp2p-adsp@0xb011008 { | |
| compatible = "qcom,smp2p"; | |
| reg = <0xb011008 0x04>; | |
| qcom,remote-pid = <0x02>; | |
| qcom,irq-bitmask = <0x400>; | |
| interrupts = <0x00 0x123 0x01>; | |
| }; | |
| qcom,smp2pgpio-smp2p-15-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x0f>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| linux,phandle = <0x9f>; | |
| phandle = <0x9f>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_15_in { | |
| compatible = "qcom,smp2pgpio_test_smp2p_15_in"; | |
| gpios = <0x9f 0x00 0x00>; | |
| }; | |
| qcom,smp2pgpio-smp2p-15-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x0f>; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| linux,phandle = <0xa0>; | |
| phandle = <0xa0>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_15_out { | |
| compatible = "qcom,smp2pgpio_test_smp2p_15_out"; | |
| gpios = <0xa0 0x00 0x00>; | |
| }; | |
| qcom,smp2pgpio-smp2p-1-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x01>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| linux,phandle = <0xa1>; | |
| phandle = <0xa1>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_1_in { | |
| compatible = "qcom,smp2pgpio_test_smp2p_1_in"; | |
| gpios = <0xa1 0x00 0x00>; | |
| }; | |
| qcom,smp2pgpio-smp2p-1-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x01>; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| linux,phandle = <0xa2>; | |
| phandle = <0xa2>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_1_out { | |
| compatible = "qcom,smp2pgpio_test_smp2p_1_out"; | |
| gpios = <0xa2 0x00 0x00>; | |
| }; | |
| qcom,smp2pgpio-smp2p-4-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x04>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| linux,phandle = <0xa3>; | |
| phandle = <0xa3>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_4_in { | |
| compatible = "qcom,smp2pgpio_test_smp2p_4_in"; | |
| gpios = <0xa3 0x00 0x00>; | |
| }; | |
| qcom,smp2pgpio-smp2p-4-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x04>; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| linux,phandle = <0xa4>; | |
| phandle = <0xa4>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_4_out { | |
| compatible = "qcom,smp2pgpio_test_smp2p_4_out"; | |
| gpios = <0xa4 0x00 0x00>; | |
| }; | |
| qcom,smp2pgpio-smp2p-2-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x02>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| linux,phandle = <0xa5>; | |
| phandle = <0xa5>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_2_in { | |
| compatible = "qcom,smp2pgpio_test_smp2p_2_in"; | |
| gpios = <0xa5 0x00 0x00>; | |
| }; | |
| qcom,smp2pgpio-smp2p-2-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x02>; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| linux,phandle = <0xa6>; | |
| phandle = <0xa6>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_2_out { | |
| compatible = "qcom,smp2pgpio_test_smp2p_2_out"; | |
| gpios = <0xa6 0x00 0x00>; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-1-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "slave-kernel"; | |
| qcom,remote-pid = <0x01>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| linux,phandle = <0x10b>; | |
| phandle = <0x10b>; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-1-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "master-kernel"; | |
| qcom,remote-pid = <0x01>; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| linux,phandle = <0x10c>; | |
| phandle = <0x10c>; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-2-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "slave-kernel"; | |
| qcom,remote-pid = <0x02>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| linux,phandle = <0x10e>; | |
| phandle = <0x10e>; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-2-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "master-kernel"; | |
| qcom,remote-pid = <0x02>; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| linux,phandle = <0x10f>; | |
| phandle = <0x10f>; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-4-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "slave-kernel"; | |
| qcom,remote-pid = <0x04>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| linux,phandle = <0x111>; | |
| phandle = <0x111>; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-4-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "master-kernel"; | |
| qcom,remote-pid = <0x04>; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| linux,phandle = <0x112>; | |
| phandle = <0x112>; | |
| }; | |
| qcom,spm@b1d2000 { | |
| compatible = "qcom,spm-v2"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| reg = <0xb1d2000 0x1000>; | |
| qcom,name = "system-cci"; | |
| qcom,saw2-ver-reg = <0xfd0>; | |
| qcom,saw2-cfg = <0x14>; | |
| qcom,saw2-spm-dly = <0x3c102800>; | |
| qcom,saw2-spm-ctl = <0x0e>; | |
| qcom,cpu-vctl-list = <0x06 0x07 0x08 0x09 0x02 0x03 0x04 0x05>; | |
| qcom,vctl-timeout-us = <0x1f4>; | |
| qcom,vctl-port = <0x00>; | |
| qcom,phase-port = <0x01>; | |
| qcom,pfm-port = <0x02>; | |
| }; | |
| qcom,lpm-levels { | |
| compatible = "qcom,lpm-levels"; | |
| qcom,use-psci; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| clock-names = "l2_clk\0cpu0_clk\0cpu1_clk\0cpu2_clk\0cpu3_clk\0cpu4_clk\0cpu5_clk\0cpu6_clk\0cpu7_clk"; | |
| clocks = <0x9e 0x96854074 0x9e 0xcf28e63a 0x9e 0xcf28e63a 0x9e 0xcf28e63a 0x9e 0xcf28e63a 0x9e 0xc69f0878 0x9e 0xc69f0878 0x9e 0xc69f0878 0x9e 0xc69f0878>; | |
| qcom,pm-cluster@0 { | |
| reg = <0x00>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| label = "system"; | |
| qcom,spm-device-names = "cci"; | |
| qcom,default-level = <0x00>; | |
| qcom,psci-mode-shift = <0x08>; | |
| qcom,psci-mode-mask = <0x0f>; | |
| qcom,pm-cluster-level@0 { | |
| reg = <0x00>; | |
| label = "system-active"; | |
| qcom,psci-mode = <0x00>; | |
| qcom,latency-us = <0x19f>; | |
| qcom,ss-power = <0x195>; | |
| qcom,energy-overhead = <0x885d5>; | |
| qcom,time-overhead = <0x3d4>; | |
| }; | |
| qcom,pm-cluster-level@1 { | |
| reg = <0x01>; | |
| label = "system-wfi"; | |
| qcom,psci-mode = <0x01>; | |
| qcom,latency-us = <0x1db>; | |
| qcom,ss-power = <0x15a>; | |
| qcom,energy-overhead = <0xaf851>; | |
| qcom,time-overhead = <0x41a>; | |
| qcom,min-child-idx = <0x01>; | |
| }; | |
| qcom,pm-cluster-level@2 { | |
| reg = <0x02>; | |
| label = "system-ret"; | |
| qcom,psci-mode = <0x02>; | |
| qcom,latency-us = <0x384>; | |
| qcom,ss-power = <0x140>; | |
| qcom,energy-overhead = <0xe049f>; | |
| qcom,time-overhead = <0x4e2>; | |
| qcom,min-child-idx = <0x01>; | |
| qcom,reset-level = <0x01>; | |
| }; | |
| qcom,pm-cluster-level@3 { | |
| reg = <0x03>; | |
| label = "system-pc"; | |
| qcom,psci-mode = <0x03>; | |
| qcom,latency-us = <0x2a1e>; | |
| qcom,ss-power = <0x132>; | |
| qcom,energy-overhead = <0x102cc8>; | |
| qcom,time-overhead = <0x592>; | |
| qcom,min-child-idx = <0x02>; | |
| qcom,notify-rpm; | |
| qcom,is-reset; | |
| qcom,reset-level = <0x03>; | |
| }; | |
| qcom,pm-cluster@0 { | |
| reg = <0x00>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| label = "perf"; | |
| qcom,spm-device-names = "l2"; | |
| qcom,default-level = <0x00>; | |
| qcom,cpu = <0x06 0x07 0x08 0x09>; | |
| qcom,psci-mode-shift = <0x04>; | |
| qcom,psci-mode-mask = <0x0f>; | |
| qcom,pm-cluster-level@0 { | |
| reg = <0x00>; | |
| label = "perf-l2-wfi"; | |
| qcom,psci-mode = <0x01>; | |
| qcom,latency-us = <0xd2>; | |
| qcom,ss-power = <0x1d8>; | |
| qcom,energy-overhead = <0x38fa7>; | |
| qcom,time-overhead = <0x146>; | |
| }; | |
| qcom,pm-cluster-level@1 { | |
| reg = <0x01>; | |
| label = "perf-l2-gdhs"; | |
| qcom,psci-mode = <0x04>; | |
| qcom,latency-us = <0x10b>; | |
| qcom,ss-power = <0x1b3>; | |
| qcom,energy-overhead = <0x5ebac>; | |
| qcom,time-overhead = <0x273>; | |
| qcom,min-child-idx = <0x01>; | |
| qcom,reset-level = <0x02>; | |
| }; | |
| qcom,pm-cluster-level@2 { | |
| reg = <0x02>; | |
| label = "perf-l2-pc"; | |
| qcom,psci-mode = <0x05>; | |
| qcom,latency-us = <0x131>; | |
| qcom,ss-power = <0x195>; | |
| qcom,energy-overhead = <0x89e3a>; | |
| qcom,time-overhead = <0x36f>; | |
| qcom,min-child-idx = <0x01>; | |
| qcom,is-reset; | |
| qcom,reset-level = <0x03>; | |
| }; | |
| qcom,pm-cpu { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| qcom,psci-mode-shift = <0x00>; | |
| qcom,psci-mode-mask = <0x0f>; | |
| qcom,pm-cpu-level@0 { | |
| reg = <0x00>; | |
| qcom,psci-cpu-mode = <0x00>; | |
| qcom,spm-cpu-mode = "wfi"; | |
| qcom,latency-us = <0x01>; | |
| qcom,ss-power = <0x212>; | |
| qcom,energy-overhead = <0xf556>; | |
| qcom,time-overhead = <0x43>; | |
| }; | |
| qcom,pm-cpu-level@1 { | |
| reg = <0x01>; | |
| qcom,psci-cpu-mode = <0x03>; | |
| qcom,spm-cpu-mode = "pc"; | |
| qcom,latency-us = <0xbe>; | |
| qcom,ss-power = <0x1d8>; | |
| qcom,energy-overhead = <0x38fa7>; | |
| qcom,time-overhead = <0x146>; | |
| qcom,use-broadcast-timer; | |
| qcom,is-reset; | |
| qcom,reset-level = <0x03>; | |
| }; | |
| }; | |
| }; | |
| qcom,pm-cluster@1 { | |
| reg = <0x01>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| label = "pwr"; | |
| qcom,spm-device-names = "l2"; | |
| qcom,default-level = <0x00>; | |
| qcom,cpu = <0x02 0x03 0x04 0x05>; | |
| qcom,psci-mode-shift = <0x04>; | |
| qcom,psci-mode-mask = <0x0f>; | |
| qcom,pm-cluster-level@0 { | |
| reg = <0x00>; | |
| label = "pwr-l2-wfi"; | |
| qcom,psci-mode = <0x01>; | |
| qcom,latency-us = <0xdd>; | |
| qcom,ss-power = <0x1cc>; | |
| qcom,energy-overhead = <0x3596b>; | |
| qcom,time-overhead = <0x190>; | |
| }; | |
| qcom,pm-cluster-level@1 { | |
| reg = <0x01>; | |
| label = "pwr-l2-gdhs"; | |
| qcom,psci-mode = <0x04>; | |
| qcom,latency-us = <0x151>; | |
| qcom,ss-power = <0x1b1>; | |
| qcom,energy-overhead = <0x5aecd>; | |
| qcom,time-overhead = <0x2cd>; | |
| qcom,min-child-idx = <0x01>; | |
| qcom,reset-level = <0x02>; | |
| }; | |
| qcom,pm-cluster-level@2 { | |
| reg = <0x02>; | |
| label = "pwr-l2-pc"; | |
| qcom,psci-mode = <0x05>; | |
| qcom,latency-us = <0x19f>; | |
| qcom,ss-power = <0x195>; | |
| qcom,energy-overhead = <0x885d5>; | |
| qcom,time-overhead = <0x3d4>; | |
| qcom,min-child-idx = <0x01>; | |
| qcom,is-reset; | |
| qcom,reset-level = <0x03>; | |
| }; | |
| qcom,pm-cpu { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| qcom,psci-mode-shift = <0x00>; | |
| qcom,psci-mode-mask = <0x0f>; | |
| qcom,pm-cpu-level@0 { | |
| reg = <0x00>; | |
| qcom,psci-cpu-mode = <0x00>; | |
| qcom,spm-cpu-mode = "wfi"; | |
| qcom,latency-us = <0x01>; | |
| qcom,ss-power = <0x21c>; | |
| qcom,energy-overhead = <0x16b60>; | |
| qcom,time-overhead = <0x39>; | |
| }; | |
| qcom,pm-cpu-level@1 { | |
| reg = <0x01>; | |
| qcom,psci-cpu-mode = <0x03>; | |
| qcom,spm-cpu-mode = "pc"; | |
| qcom,latency-us = <0xdd>; | |
| qcom,ss-power = <0x1cc>; | |
| qcom,energy-overhead = <0x3596b>; | |
| qcom,time-overhead = <0x190>; | |
| qcom,use-broadcast-timer; | |
| qcom,is-reset; | |
| qcom,reset-level = <0x03>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| }; | |
| qcom,mpm@601d0 { | |
| compatible = "qcom,mpm-v2"; | |
| reg = <0x601d0 0x1000 0xb011008 0x04>; | |
| reg-names = "vmpm\0ipc"; | |
| interrupts = <0x00 0xab 0x01>; | |
| clocks = <0x2b 0x2be48257>; | |
| clock-names = "xo"; | |
| qcom,ipc-bit-offset = <0x01>; | |
| qcom,gic-parent = <0x01>; | |
| qcom,gic-map = <0x02 0xd8 0x31 0xac 0x3a 0xa6 0x35 0x68 0x3e 0xde 0xff 0x12 0xff 0x13 0xff 0x14 0xff 0x23 0xff 0x27 0xff 0x28 0xff 0x2f 0xff 0x38 0xff 0x39 0xff 0x3a 0xff 0x3b 0xff 0x3c 0xff 0x3d 0xff 0x41 0xff 0x45 0xff 0x49 0xff 0x4a 0xff 0x4b 0xff 0x4c 0xff 0x4e 0xff 0x4f 0xff 0x55 0xff 0x56 0xff 0x5a 0xff 0x5c 0xff 0x5d 0xff 0x61 0xff 0x66 0xff 0x6c 0xff 0x6d 0xff 0x70 0xff 0x72 0xff 0x7e 0xff 0x80 0xff 0x81 0xff 0x83 0xff 0x88 0xff 0x89 0xff 0x8a 0xff 0x8c 0xff 0x8d 0xff 0x8e 0xff 0x8f 0xff 0x90 0xff 0x91 0xff 0x92 0xff 0x93 0xff 0x94 0xff 0x95 0xff 0x96 0xff 0x97 0xff 0x98 0xff 0x99 0xff 0x9b 0xff 0x9d 0xff 0xa7 0xff 0xaa 0xff 0xad 0xff 0xae 0xff 0xaf 0xff 0xb0 0xff 0xb1 0xff 0xb2 0xff 0xb3 0xff 0xb5 0xff 0xbc 0xff 0xbd 0xff 0xbe 0xff 0xbf 0xff 0xc0 0xff 0xc1 0xff 0xc2 0xff 0xc3 0xff 0xc4 0xff 0xc5 0xff 0xc6 0xff 0xc8 0xff 0xc9 0xff 0xca 0xff 0xcb 0xff 0xcc 0xff 0xcd 0xff 0xce 0xff 0xcf 0xff 0xd7 0xff 0xe0 0xff 0xe7 0xff 0xef 0xff 0xf0 0xff 0xfd 0xff 0x101 0xff 0x104 0xff 0x106 0xff 0x10d 0xff 0x10e 0xff 0x10f 0xff 0x110 0xff 0x111 0xff 0x112 0xff 0x113 0xff 0x114 0xff 0x115 0xff 0x11d 0xff 0x11e 0xff 0x11f 0xff 0x141 0xff 0x142 0xff 0x143 0xff 0x145 0xff 0x158>; | |
| qcom,gpio-parent = <0xa7>; | |
| qcom,gpio-map = <0x03 0x26 0x04 0x01 0x05 0x05 0x06 0x09 0x08 0x25 0x09 0x24 0x0a 0x0d 0x0b 0x23 0x0c 0x11 0x0d 0x15 0x0e 0x36 0x0f 0x22 0x10 0x1f 0x11 0x3a 0x12 0x1c 0x13 0x2a 0x14 0x19 0x15 0x0c 0x16 0x2b 0x17 0x2c 0x18 0x2d 0x19 0x2e 0x1a 0x30 0x1b 0x41 0x1c 0x5d 0x1d 0x61 0x1e 0x3f 0x1f 0x46 0x20 0x47 0x21 0x48 0x22 0x51 0x23 0x7e 0x24 0x5a 0x25 0x80 0x26 0x5b 0x27 0x29 0x28 0x7f 0x29 0x56 0x32 0x43 0x33 0x49 0x34 0x4a 0x35 0x3e 0x36 0x7c 0x37 0x3d 0x38 0x82 0x39 0x3b 0x3b 0x32>; | |
| }; | |
| qcom,cpu-sleep-status { | |
| compatible = "qcom,cpu-sleep-status"; | |
| }; | |
| qcom,rpm-log@29dc00 { | |
| compatible = "qcom,rpm-log"; | |
| reg = <0x29dc00 0x4000>; | |
| qcom,rpm-addr-phys = <0x200000>; | |
| qcom,offset-version = <0x04>; | |
| qcom,offset-page-buffer-addr = <0x24>; | |
| qcom,offset-log-len = <0x28>; | |
| qcom,offset-log-len-mask = <0x2c>; | |
| qcom,offset-page-indices = <0x38>; | |
| }; | |
| qcom,rpm-stats@29dba0 { | |
| compatible = "qcom,rpm-stats"; | |
| reg = <0x200000 0x1000 0x290014 0x04 0x29001c 0x04>; | |
| reg-names = "phys_addr_base\0offset_addr\0heap_phys_addrbase"; | |
| qcom,sleep-stats-version = <0x02>; | |
| }; | |
| qcom,rpm-master-stats@60150 { | |
| compatible = "qcom,rpm-master-stats"; | |
| reg = <0x60150 0x5000>; | |
| qcom,masters = "APSS\0MPSS\0PRONTO\0TZ\0LPASS"; | |
| qcom,master-stats-version = <0x02>; | |
| qcom,master-offset = <0x1000>; | |
| }; | |
| qcom,iommu-domains { | |
| compatible = "qcom,iommu-domains"; | |
| qcom,iommu-domain2 { | |
| label = "venus_ns"; | |
| qcom,iommu-contexts = <0xa8>; | |
| qcom,virtual-addr-pool = <0x5dc00000 0x7f000000 0xdcc00000 0x1000000>; | |
| linux,phandle = <0xae>; | |
| phandle = <0xae>; | |
| }; | |
| qcom,iommu-domain3 { | |
| label = "venus_sec_bitstream"; | |
| qcom,iommu-contexts = <0xa9>; | |
| qcom,virtual-addr-pool = <0x4b000000 0x12c00000>; | |
| qcom,secure-domain; | |
| linux,phandle = <0xaf>; | |
| phandle = <0xaf>; | |
| }; | |
| qcom,iommu-domain4 { | |
| label = "venus_sec_pixel"; | |
| qcom,iommu-contexts = <0xaa>; | |
| qcom,virtual-addr-pool = <0x25800000 0x25800000>; | |
| qcom,secure-domain; | |
| linux,phandle = <0xb0>; | |
| phandle = <0xb0>; | |
| }; | |
| qcom,iommu-domain5 { | |
| label = "venus_sec_non_pixel"; | |
| qcom,iommu-contexts = <0xab>; | |
| qcom,virtual-addr-pool = <0x1000000 0x24800000>; | |
| qcom,secure-domain; | |
| linux,phandle = <0xb1>; | |
| phandle = <0xb1>; | |
| }; | |
| }; | |
| qcom,vidc@1d00000 { | |
| compatible = "qcom,msm-vidc"; | |
| reg = <0x1d00000 0xff000>; | |
| interrupts = <0x00 0x2c 0x00>; | |
| qcom,hfi-version = "3xx"; | |
| venus-supply = <0xac>; | |
| venus-core0-supply = <0xad>; | |
| clocks = <0x2b 0xf76a02bb 0x2b 0x83a7f549 0x2b 0x8d778c6 0x2b 0xcdf4c8f6>; | |
| clock-names = "core_clk\0core0_clk\0iface_clk\0bus_clk"; | |
| qcom,clock-configs = <0x01 0x00 0x00 0x00>; | |
| qcom,sw-power-collapse; | |
| qcom,slave-side-cp; | |
| qcom,dcvs-tbl = <0x1a5e0 0x1a5e0 0x3bc40 0x04 0x1a5e0 0x1a5e0 0x3bc40 0xf00000c>; | |
| qcom,dcvs-limit = <0x1fe0 0x1e 0x1fe0 0x1e>; | |
| qcom,hfi = "venus"; | |
| qcom,reg-presets = <0xe0020 0x5555556 0xe0024 0x5555556 0x80124 0x03>; | |
| qcom,qdss-presets = <0x826000 0x1000 0x827000 0x1000 0x822000 0x1000 0x803000 0x1000 0x9180000 0x1000 0x9181000 0x1000>; | |
| qcom,max-hw-load = <0x56220>; | |
| qcom,firmware-name = "venus"; | |
| qcom,allowed-clock-rates = <0x15752a00 0x1312d000 0x12646790 0xe4e1c00 0x9e73f70>; | |
| qcom,clock-freq-tbl { | |
| qcom,profile-enc { | |
| qcom,codec-mask = <0x55555555>; | |
| qcom,cycles-per-mb = <0x90c>; | |
| qcom,low-power-mode-factor = <0x8000>; | |
| }; | |
| qcom,profile-dec { | |
| qcom,codec-mask = <0xf3ffffff>; | |
| qcom,cycles-per-mb = <0x314>; | |
| }; | |
| qcom,profile-hevcdec { | |
| qcom,codec-mask = <0xc000000>; | |
| qcom,cycles-per-mb = <0x3f7>; | |
| }; | |
| }; | |
| qcom,vidc-iommu-domains { | |
| qcom,domain-ns { | |
| qcom,vidc-domain-phandle = <0xae>; | |
| qcom,vidc-buffer-types = <0xfff>; | |
| }; | |
| qcom,domain-sec-bs { | |
| qcom,vidc-domain-phandle = <0xaf>; | |
| qcom,vidc-buffer-types = <0x241>; | |
| }; | |
| qcom,domain-sec-px { | |
| qcom,vidc-domain-phandle = <0xb0>; | |
| qcom,vidc-buffer-types = <0x106>; | |
| }; | |
| qcom,domain-sec-np { | |
| qcom,vidc-domain-phandle = <0xb1>; | |
| qcom,vidc-buffer-types = <0x480>; | |
| }; | |
| }; | |
| venus_bus_ddr { | |
| compatible = "qcom,msm-vidc,bus"; | |
| label = "venus-ddr"; | |
| qcom,bus-master = <0x3f>; | |
| qcom,bus-slave = <0x200>; | |
| qcom,bus-governor = "venus-ddr-gov"; | |
| qcom,bus-range-kbps = <0x3e8 0xdfe08>; | |
| }; | |
| arm9_bus_ddr { | |
| compatible = "qcom,msm-vidc,bus"; | |
| label = "venus-arm9-ddr"; | |
| qcom,bus-master = <0x3f>; | |
| qcom,bus-slave = <0x200>; | |
| qcom,bus-governor = "performance"; | |
| qcom,bus-range-kbps = <0x01 0x01>; | |
| }; | |
| }; | |
| venus-ddr-gov { | |
| compatible = "qcom,msm-vidc,governor,table"; | |
| status = "ok"; | |
| qcom,bus-freq-table { | |
| qcom,profile-enc { | |
| qcom,codec-mask = <0x55555555>; | |
| qcom,load-busfreq-tbl = <0x3bc40 0xcd528 0x34bc0 0xb4aa0 0x2f760 0xa6040 0x23280 0x79180 0x1a5e0 0x5a550 0x17bb0 0x53020 0xbdd8 0x29810 0x11940 0x3c8c0 0x8ca0 0x1e460 0x4650 0x11170 0x2328 0x88b8 0x00 0x00>; | |
| }; | |
| qcom,profile-dec { | |
| qcom,codec-mask = <0xffffffff>; | |
| qcom,load-busfreq-tbl = <0x3bc40 0x93b48 0x34bc0 0x83d60 0x2f760 0x762a0 0x23280 0x57e40 0x1a5e0 0x41eb0 0x17bb0 0x3b150 0xbdd8 0x1d8a8 0x11940 0x2bf20 0x8ca0 0x15f90 0x4650 0xafc8 0x00 0x00>; | |
| }; | |
| }; | |
| }; | |
| interrupt-controller@b000000 { | |
| compatible = "qcom,msm-qgic2"; | |
| interrupt-controller; | |
| #interrupt-cells = <0x03>; | |
| reg = <0xb000000 0x1000 0xb002000 0x1000>; | |
| linux,phandle = <0x01>; | |
| phandle = <0x01>; | |
| }; | |
| timer { | |
| compatible = "arm,armv8-timer"; | |
| interrupts = <0x01 0x02 0xff08 0x01 0x03 0xff08 0x01 0x04 0xff08 0x01 0x01 0xff08>; | |
| clock-frequency = <0x124f800>; | |
| }; | |
| timer@b120000 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| ranges; | |
| compatible = "arm,armv7-timer-mem"; | |
| reg = <0xb120000 0x1000>; | |
| clock-frequency = <0x124f800>; | |
| frame@b121000 { | |
| frame-number = <0x00>; | |
| interrupts = <0x00 0x08 0x04 0x00 0x07 0x04>; | |
| reg = <0xb121000 0x1000 0xb122000 0x1000>; | |
| }; | |
| frame@b123000 { | |
| frame-number = <0x01>; | |
| interrupts = <0x00 0x09 0x04>; | |
| reg = <0xb123000 0x1000>; | |
| status = "disabled"; | |
| }; | |
| frame@b124000 { | |
| frame-number = <0x02>; | |
| interrupts = <0x00 0x0a 0x04>; | |
| reg = <0xb124000 0x1000>; | |
| status = "disabled"; | |
| }; | |
| frame@b125000 { | |
| frame-number = <0x03>; | |
| interrupts = <0x00 0x0b 0x04>; | |
| reg = <0xb125000 0x1000>; | |
| status = "disabled"; | |
| }; | |
| frame@b126000 { | |
| frame-number = <0x04>; | |
| interrupts = <0x00 0x0c 0x04>; | |
| reg = <0xb126000 0x1000>; | |
| status = "disabled"; | |
| }; | |
| frame@b127000 { | |
| frame-number = <0x05>; | |
| interrupts = <0x00 0x0d 0x04>; | |
| reg = <0xb127000 0x1000>; | |
| status = "disabled"; | |
| }; | |
| frame@b128000 { | |
| frame-number = <0x06>; | |
| interrupts = <0x00 0x0e 0x04>; | |
| reg = <0xb128000 0x1000>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| qcom,rmtfs_sharedmem@00000000 { | |
| compatible = "qcom,sharedmem-uio"; | |
| reg = <0x00 0x180000>; | |
| reg-names = "rmtfs"; | |
| qcom,client-id = <0x01>; | |
| }; | |
| restart@4ab000 { | |
| compatible = "qcom,pshold"; | |
| reg = <0x4ab000 0x04 0x193d100 0x04>; | |
| reg-names = "pshold-base\0tcsr-boot-misc-detect"; | |
| }; | |
| qcom,mpm2-sleep-counter@4a3000 { | |
| compatible = "qcom,mpm2-sleep-counter"; | |
| reg = <0x4a3000 0x1000>; | |
| clock-frequency = <0x8000>; | |
| }; | |
| cpu-pmu { | |
| compatible = "arm,armv8-pmuv3"; | |
| interrupts = <0x01 0x07 0xff00>; | |
| }; | |
| qcom,sps { | |
| compatible = "qcom,msm_sps_4k"; | |
| qcom,pipe-attr-ee; | |
| }; | |
| tsens@4a8000 { | |
| compatible = "qcom,msm8937-tsens"; | |
| reg = <0x4a8000 0x2000 0xa4000 0x1000>; | |
| reg-names = "tsens_physical\0tsens_eeprom_physical"; | |
| interrupts = <0x00 0xb8 0x00>; | |
| interrupt-names = "tsens-upper-lower"; | |
| qcom,sensors = <0x0b>; | |
| qcom,slope = <0xc80 0xc80 0xc80 0xc80 0xc80 0xc80 0xc80 0xc80 0xc80 0xc80 0xc80>; | |
| qcom,sensor-id = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a>; | |
| qcom,valid-status-check; | |
| qcom,temp1-offset = <0x01 0xfffffff7 0xfffffffa 0xfffffffc 0x00 0xfffffffd 0xfffffffe 0x00 0x02 0xfffffffe 0xfffffffd>; | |
| qcom,temp2-offset = <0x00 0x0a 0xffffffff 0x05 0xfffffffe 0xfffffff7 0xfffffff3 0x01 0x01 0x00 0x02>; | |
| }; | |
| slim@c140000 { | |
| cell-index = <0x01>; | |
| compatible = "qcom,slim-ngd"; | |
| reg = <0xc140000 0x2c000 0xc104000 0x2a000>; | |
| reg-names = "slimbus_physical\0slimbus_bam_physical"; | |
| interrupts = <0x00 0xa3 0x00 0x00 0xb4 0x00>; | |
| interrupt-names = "slimbus_irq\0slimbus_bam_irq"; | |
| qcom,apps-ch-pipes = <0x600000>; | |
| qcom,ea-pc = <0x230>; | |
| status = "disabled"; | |
| msm_dai_slim { | |
| status = "disabled"; | |
| compatible = "qcom,msm-dai-slim"; | |
| elemental-addr = [ff ff ff fe 17 02]; | |
| }; | |
| tasha_codec { | |
| status = "disabled"; | |
| compatible = "qcom,tasha-slim-pgd"; | |
| elemental-addr = [00 01 a0 01 17 02]; | |
| interrupt-parent = <0xb2>; | |
| interrupts = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e>; | |
| qcom,wcd-rst-gpio-node = <0xb3>; | |
| clock-names = "wcd_clk"; | |
| clocks = <0xb4 0xb7ba2274>; | |
| qcom,cdc-static-supplies = "cdc-vdd-buck\0cdc-buck-sido\0cdc-vdd-tx-h\0cdc-vdd-rx-h\0cdc-vdd-px"; | |
| qcom,cdc-on-demand-supplies = "cdc-vdd-mic-bias"; | |
| qcom,cdc-micbias1-mv = <0x708>; | |
| qcom,cdc-micbias2-mv = <0x708>; | |
| qcom,cdc-micbias3-mv = <0x708>; | |
| qcom,cdc-micbias4-mv = <0x708>; | |
| qcom,cdc-mclk-clk-rate = <0x927c00>; | |
| qcom,cdc-slim-ifd = "tasha-slim-ifd"; | |
| qcom,cdc-slim-ifd-elemental-addr = [00 00 a0 01 17 02]; | |
| qcom,cdc-dmic-sample-rate = <0x249f00>; | |
| cdc-vdd-buck-supply = <0xb5>; | |
| qcom,cdc-vdd-buck-voltage = <0x1b7740 0x1b7740>; | |
| qcom,cdc-vdd-buck-current = <0x9eb10>; | |
| cdc-buck-sido-supply = <0xb5>; | |
| qcom,cdc-buck-sido-voltage = <0x1b7740 0x1b7740>; | |
| qcom,cdc-buck-sido-current = <0x3d090>; | |
| cdc-vdd-tx-h-supply = <0xb6>; | |
| qcom,cdc-vdd-tx-h-voltage = <0x1b7740 0x1b7740>; | |
| qcom,cdc-vdd-tx-h-current = <0x61a8>; | |
| cdc-vdd-rx-h-supply = <0xb6>; | |
| qcom,cdc-vdd-rx-h-voltage = <0x1b7740 0x1b7740>; | |
| qcom,cdc-vdd-rx-h-current = <0x61a8>; | |
| cdc-vdd-px-supply = <0xb6>; | |
| qcom,cdc-vdd-px-voltage = <0x1b7740 0x1b7740>; | |
| qcom,cdc-vdd-px-current = <0x2710>; | |
| cdc-vdd-mic-bias-supply = <0xb7>; | |
| qcom,cdc-vdd-mic-bias-voltage = <0x2eebb8 0x2eebb8>; | |
| qcom,cdc-vdd-mic-bias-current = <0x3a98>; | |
| swr_master { | |
| compatible = "qcom,swr-wcd"; | |
| #address-cells = <0x02>; | |
| #size-cells = <0x00>; | |
| wsa881x@20170211 { | |
| compatible = "qcom,wsa881x"; | |
| reg = <0x00 0x20170211>; | |
| qcom,spkr-sd-n-gpio = <0xa7 0x60 0x00>; | |
| }; | |
| wsa881x@20170212 { | |
| compatible = "qcom,wsa881x"; | |
| reg = <0x00 0x20170212>; | |
| qcom,spkr-sd-n-gpio = <0xa7 0x60 0x00>; | |
| }; | |
| wsa881x@21170213 { | |
| compatible = "qcom,wsa881x"; | |
| reg = <0x00 0x21170213>; | |
| qcom,spkr-sd-n-gpio = <0xa7 0x60 0x00>; | |
| }; | |
| wsa881x@21170214 { | |
| compatible = "qcom,wsa881x"; | |
| reg = <0x00 0x21170214>; | |
| qcom,spkr-sd-n-gpio = <0xa7 0x60 0x00>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| qcom,sensor-information { | |
| compatible = "qcom,sensor-information"; | |
| qcom,sensor-information-0 { | |
| qcom,sensor-type = "tsens"; | |
| qcom,sensor-name = "tsens_tz_sensor0"; | |
| }; | |
| qcom,sensor-information-1 { | |
| qcom,sensor-type = "tsens"; | |
| qcom,sensor-name = "tsens_tz_sensor1"; | |
| }; | |
| qcom,sensor-information-2 { | |
| qcom,sensor-type = "tsens"; | |
| qcom,sensor-name = "tsens_tz_sensor2"; | |
| qcom,alias-name = "pop_mem"; | |
| }; | |
| qcom,sensor-information-3 { | |
| qcom,sensor-type = "tsens"; | |
| qcom,sensor-name = "tsens_tz_sensor3"; | |
| }; | |
| qcom,sensor-information-4 { | |
| qcom,sensor-type = "tsens"; | |
| qcom,sensor-name = "tsens_tz_sensor4"; | |
| qcom,alias-name = "L2_cache_1"; | |
| }; | |
| qcom,sensor-information-5 { | |
| qcom,sensor-type = "tsens"; | |
| qcom,sensor-name = "tsens_tz_sensor5"; | |
| linux,phandle = <0xb8>; | |
| phandle = <0xb8>; | |
| }; | |
| qcom,sensor-information-6 { | |
| qcom,sensor-type = "tsens"; | |
| qcom,sensor-name = "tsens_tz_sensor6"; | |
| linux,phandle = <0xb9>; | |
| phandle = <0xb9>; | |
| }; | |
| qcom,sensor-information-7 { | |
| qcom,sensor-type = "tsens"; | |
| qcom,sensor-name = "tsens_tz_sensor7"; | |
| linux,phandle = <0xba>; | |
| phandle = <0xba>; | |
| }; | |
| qcom,sensor-information-8 { | |
| qcom,sensor-type = "tsens"; | |
| qcom,sensor-name = "tsens_tz_sensor8"; | |
| linux,phandle = <0xbb>; | |
| phandle = <0xbb>; | |
| }; | |
| qcom,sensor-information-9 { | |
| qcom,sensor-type = "tsens"; | |
| qcom,sensor-name = "tsens_tz_sensor9"; | |
| linux,phandle = <0xbc>; | |
| phandle = <0xbc>; | |
| }; | |
| qcom,sensor-information-10 { | |
| qcom,sensor-type = "tsens"; | |
| qcom,sensor-name = "tsens_tz_sensor10"; | |
| qcom,alias-name = "gpu"; | |
| }; | |
| qcom,sensor-information-11 { | |
| qcom,sensor-type = "adc"; | |
| qcom,sensor-name = "pa_therm0"; | |
| }; | |
| qcom,sensor-information-12 { | |
| qcom,sensor-type = "adc"; | |
| qcom,sensor-name = "chg_therm"; | |
| }; | |
| qcom,sensor-information-13 { | |
| qcom,sensor-type = "adc"; | |
| qcom,sensor-name = "xo_therm"; | |
| }; | |
| qcom,sensor-information-14 { | |
| qcom,sensor-type = "adc"; | |
| qcom,sensor-name = "xo_therm_buf"; | |
| }; | |
| qcom,sensor-information-15 { | |
| qcom,sensor-type = "adc"; | |
| qcom,sensor-name = "msm_therm"; | |
| }; | |
| qcom,sensor-information-16 { | |
| qcom,sensor-type = "alarm"; | |
| qcom,sensor-name = "pm8937_tz"; | |
| qcom,scaling-factor = <0x3e8>; | |
| }; | |
| qcom,sensor-information-17 { | |
| qcom,sensor-type = "adc"; | |
| qcom,sensor-name = "battery"; | |
| qcom,alias-name = "batt_therm"; | |
| qcom,scaling-factor = <0x3e8>; | |
| }; | |
| qcom,sensor-information-18 { | |
| qcom,sensor-type = "adc"; | |
| qcom,sensor-name = "front_temp"; | |
| qcom,scaling-factor = <0x3e8>; | |
| }; | |
| qcom,sensor-information-19 { | |
| qcom,sensor-type = "adc"; | |
| qcom,sensor-name = "back_temp"; | |
| qcom,scaling-factor = <0x3e8>; | |
| }; | |
| }; | |
| qcom,limit_info-0 { | |
| qcom,temperature-sensor = <0xb8>; | |
| qcom,boot-frequency-mitigate; | |
| qcom,hotplug-mitigation-enable; | |
| qcom,emergency-frequency-mitigate; | |
| linux,phandle = <0x0b>; | |
| phandle = <0x0b>; | |
| }; | |
| qcom,limit_info-1 { | |
| qcom,temperature-sensor = <0xb9>; | |
| qcom,boot-frequency-mitigate; | |
| qcom,hotplug-mitigation-enable; | |
| qcom,emergency-frequency-mitigate; | |
| linux,phandle = <0x0f>; | |
| phandle = <0x0f>; | |
| }; | |
| qcom,limit_info-2 { | |
| qcom,temperature-sensor = <0xba>; | |
| qcom,boot-frequency-mitigate; | |
| qcom,hotplug-mitigation-enable; | |
| qcom,emergency-frequency-mitigate; | |
| linux,phandle = <0x11>; | |
| phandle = <0x11>; | |
| }; | |
| qcom,limit_info-3 { | |
| qcom,temperature-sensor = <0xbb>; | |
| qcom,boot-frequency-mitigate; | |
| qcom,hotplug-mitigation-enable; | |
| qcom,emergency-frequency-mitigate; | |
| linux,phandle = <0x13>; | |
| phandle = <0x13>; | |
| }; | |
| qcom,limit_info-4 { | |
| qcom,temperature-sensor = <0xbc>; | |
| qcom,boot-frequency-mitigate; | |
| qcom,hotplug-mitigation-enable; | |
| qcom,emergency-frequency-mitigate; | |
| linux,phandle = <0x15>; | |
| phandle = <0x15>; | |
| }; | |
| qcom,msm-thermal { | |
| compatible = "qcom,msm-thermal"; | |
| qcom,sensor-id = <0x05>; | |
| qcom,poll-ms = <0xfa>; | |
| qcom,limit-temp = <0x3c>; | |
| qcom,temp-hysteresis = <0x0a>; | |
| qcom,freq-step = <0x02>; | |
| qcom,core-limit-temp = <0x50>; | |
| qcom,core-temp-hysteresis = <0x0a>; | |
| qcom,hotplug-temp = <0x69>; | |
| qcom,hotplug-temp-hysteresis = <0x0f>; | |
| qcom,freq-mitigation-temp = <0x69>; | |
| qcom,freq-mitigation-temp-hysteresis = <0x0f>; | |
| qcom,freq-mitigation-value = <0x61a80>; | |
| qcom,online-hotplug-core; | |
| qcom,synchronous-cluster-id = <0x00 0x01>; | |
| qcom,synchronous-cluster-map = <0x01 0x04 0x06 0x07 0x08 0x09 0x00 0x04 0x02 0x03 0x04 0x05>; | |
| qcom,disable-cx-phase-ctrl; | |
| qcom,disable-gfx-phase-ctrl; | |
| qcom,disable-vdd-mx; | |
| qcom,disable-psm; | |
| qcom,disable-ocr; | |
| qcom,vdd-restriction-temp = <0x05>; | |
| qcom,vdd-restriction-temp-hysteresis = <0x0a>; | |
| vdd-dig-supply = <0xbd>; | |
| qcom,config-info = "cedric"; | |
| qcom,vdd-dig-rstr { | |
| qcom,vdd-rstr-reg = "vdd-dig"; | |
| qcom,levels = <0x140 0x180 0x180>; | |
| qcom,min-level = <0x10>; | |
| }; | |
| qcom,vdd-apps-rstr { | |
| qcom,vdd-rstr-reg = "vdd-apps"; | |
| qcom,levels = <0xdbba0>; | |
| qcom,freq-req; | |
| linux,phandle = <0xbe>; | |
| phandle = <0xbe>; | |
| }; | |
| }; | |
| qcom,bcl { | |
| compatible = "qcom,bcl"; | |
| qcom,bcl-enable; | |
| qcom,bcl-framework-interface; | |
| qcom,bcl-freq-control-list = <0x06 0x07 0x08 0x09 0x02 0x03 0x04 0x05>; | |
| qcom,bcl-hotplug-list = <0x08 0x09>; | |
| qcom,bcl-soc-hotplug-list = <0x06 0x07 0x08 0x09>; | |
| qcom,ibat-monitor { | |
| qcom,low-threshold-uamp = <0x33e140>; | |
| qcom,high-threshold-uamp = <0x401640>; | |
| qcom,mitigation-freq-khz = <0xf3c00>; | |
| qcom,vph-high-threshold-uv = <0x3567e0>; | |
| qcom,vph-low-threshold-uv = <0x30d400>; | |
| qcom,soc-low-threshold = <0x0a>; | |
| qcom,thermal-handle = <0xbe>; | |
| }; | |
| }; | |
| serial@78b0000 { | |
| compatible = "qcom,msm-lsuart-v14"; | |
| reg = <0x78b0000 0x200>; | |
| interrupts = <0x00 0x6c 0x00>; | |
| status = "ok"; | |
| clocks = <0x2b 0xf8a61c96 0x2b 0x8caa5b4f>; | |
| clock-names = "core_clk\0iface_clk"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0xbf>; | |
| }; | |
| qcom,sps-dma@7884000 { | |
| #dma-cells = <0x04>; | |
| compatible = "qcom,sps-dma"; | |
| reg = <0x7884000 0x1f000>; | |
| interrupts = <0x00 0xee 0x00>; | |
| qcom,summing-threshold = <0x0a>; | |
| linux,phandle = <0xc2>; | |
| phandle = <0xc2>; | |
| }; | |
| qcom,sps-dma@7ac4000 { | |
| #dma-cells = <0x04>; | |
| compatible = "qcom,sps-dma"; | |
| reg = <0x7ac4000 0x1f000>; | |
| interrupts = <0x00 0xef 0x00>; | |
| qcom,summing-threshold = <0x0a>; | |
| }; | |
| i2c@78b6000 { | |
| compatible = "qcom,i2c-msm-v2"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg-names = "qup_phys_addr"; | |
| reg = <0x78b6000 0x600>; | |
| interrupt-names = "qup_irq"; | |
| interrupts = <0x00 0x60 0x00>; | |
| qcom,clk-freq-out = <0x61a80>; | |
| qcom,clk-freq-in = <0x124f800>; | |
| clock-names = "iface_clk\0core_clk"; | |
| clocks = <0x2b 0x8caa5b4f 0x2b 0x1076f220>; | |
| pinctrl-names = "i2c_active\0i2c_sleep"; | |
| pinctrl-0 = <0xc0>; | |
| pinctrl-1 = <0xc1>; | |
| qcom,noise-rjct-scl = <0x00>; | |
| qcom,noise-rjct-sda = <0x00>; | |
| qcom,master-id = <0x56>; | |
| dmas = <0xc2 0x06 0x40 0x20000020 0x20 0xc2 0x07 0x20 0x20000020 0x20>; | |
| dma-names = "tx\0rx"; | |
| wsa881x-i2c-codec@e { | |
| status = "disabled"; | |
| compatible = "qcom,wsa881x-i2c-codec"; | |
| reg = <0x0e>; | |
| qcom,msm-gpios = "wsa_clk\0wsa_reset\0wsa_vi"; | |
| qcom,pinctrl-names = "all_off\0wsa_clk\0wsa_active\0wsa_clk_active\0wsa_vi\0wsa_clk_vi\0wsa_active_vi\0wsa_all"; | |
| pinctrl-names = "all_off\0wsa_clk\0wsa_active\0wsa_clk_active\0wsa_vi\0wsa_clk_vi\0wsa_active_vi\0wsa_all"; | |
| pinctrl-0 = <0xc3 0xc4 0xc5>; | |
| pinctrl-1 = <0xc6 0xc4 0xc5>; | |
| pinctrl-2 = <0xc3 0xc7 0xc5>; | |
| pinctrl-3 = <0xc6 0xc7 0xc5>; | |
| pinctrl-4 = <0xc3 0xc4 0xc8>; | |
| pinctrl-5 = <0xc6 0xc4 0xc8>; | |
| pinctrl-6 = <0xc3 0xc7 0xc8>; | |
| pinctrl-7 = <0xc6 0xc7 0xc8>; | |
| }; | |
| wsa881x-i2c-codec@44 { | |
| status = "disabled"; | |
| compatible = "qcom,wsa881x-i2c-codec"; | |
| reg = <0x44>; | |
| }; | |
| wsa881x-i2c-codec@f { | |
| status = "disabled"; | |
| compatible = "qcom,wsa881x-i2c-codec"; | |
| reg = <0x0f>; | |
| qcom,msm-gpios = "wsa_clk\0wsa_reset\0wsa_vi"; | |
| qcom,pinctrl-names = "all_off\0wsa_clk\0wsa_active\0wsa_clk_active\0wsa_vi\0wsa_clk_vi\0wsa_active_vi\0wsa_all"; | |
| pinctrl-names = "all_off\0wsa_clk\0wsa_active\0wsa_clk_active\0wsa_vi\0wsa_clk_vi\0wsa_active_vi\0wsa_all"; | |
| pinctrl-0 = <0xc3 0xc4 0xc5>; | |
| pinctrl-1 = <0xc6 0xc4 0xc5>; | |
| pinctrl-2 = <0xc3 0xc7 0xc5>; | |
| pinctrl-3 = <0xc6 0xc7 0xc5>; | |
| pinctrl-4 = <0xc3 0xc4 0xc8>; | |
| pinctrl-5 = <0xc6 0xc4 0xc8>; | |
| pinctrl-6 = <0xc3 0xc7 0xc8>; | |
| pinctrl-7 = <0xc6 0xc7 0xc8>; | |
| }; | |
| wsa881x-i2c-codec@45 { | |
| status = "disabled"; | |
| compatible = "qcom,wsa881x-i2c-codec"; | |
| reg = <0x45>; | |
| }; | |
| sx9310@28 { | |
| compatible = "semtech,sx9310"; | |
| reg = <0x28>; | |
| pinctrl-name = "default"; | |
| pinctrl-0 = <0xc9>; | |
| interrupt-parent = <0xa7>; | |
| interrupts = <0x1f 0x2002>; | |
| cap_vdd-supply = <0xca>; | |
| cap_svdd-supply = <0xb6>; | |
| gpios = <0xa7 0x1f 0x2008>; | |
| cap,use_channel = <0x04>; | |
| cap,scan_period = <0x01>; | |
| cap,raw_data_channel = <0x02>; | |
| reg_array_len = <0x08>; | |
| reg_array_val = <0x11 0x02 0x12 0x0b 0x13 0x03 0x14 0x77 0x15 0x81 0x18 0x5e 0x19 0x10 0x1a 0x04>; | |
| }; | |
| }; | |
| i2c@78b7000 { | |
| compatible = "qcom,i2c-msm-v2"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg-names = "qup_phys_addr"; | |
| reg = <0x78b7000 0x600>; | |
| interrupt-names = "qup_irq"; | |
| interrupts = <0x00 0x61 0x00>; | |
| qcom,clk-freq-out = <0x61a80>; | |
| qcom,clk-freq-in = <0x124f800>; | |
| clock-names = "iface_clk\0core_clk"; | |
| clocks = <0x2b 0x8caa5b4f 0x2b 0x9e25ac82>; | |
| pinctrl-names = "i2c_active\0i2c_sleep"; | |
| pinctrl-0 = <0xcb>; | |
| pinctrl-1 = <0xcc>; | |
| qcom,noise-rjct-scl = <0x00>; | |
| qcom,noise-rjct-sda = <0x00>; | |
| qcom,master-id = <0x56>; | |
| dmas = <0xc2 0x08 0x40 0x20000020 0x20 0xc2 0x09 0x20 0x20000020 0x20>; | |
| dma-names = "tx\0rx"; | |
| status = "okay"; | |
| synaptics_dsx_i2c@20 { | |
| compatible = "synaptics,synaptics_dsx_i2c"; | |
| reg = <0x20>; | |
| interrupt-parent = <0xa7>; | |
| interrupts = <0x41 0x00>; | |
| gpios = <0xa7 0x41 0x00 0xa7 0x40 0x00>; | |
| synaptics,gpio-config; | |
| pinctrl-names = "default\0active"; | |
| pinctrl-0 = <0xcd 0xce>; | |
| pinctrl-1 = <0xcf 0xd0>; | |
| config_modifier-names = "aod\0fps"; | |
| touch_vdd-supply = <0xd1>; | |
| config_modifier-aod { | |
| aod-suspended { | |
| patch-data = "S"; | |
| }; | |
| }; | |
| config_modifier-fps { | |
| enable-notification; | |
| fps-active { | |
| touch-clip-area = <0x12c 0x74e 0x320 0x77f 0x01>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| qcom,gcc@1800000 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| compatible = "qcom,gcc-8937"; | |
| reg = <0x1800000 0x80000 0xb016000 0x40 0xb116000 0x40 0xa6018 0x04>; | |
| reg-names = "cc_base\0apcs_c1_base\0apcs_c0_base\0efuse"; | |
| vdd_dig-supply = <0xd2>; | |
| vdd_sr2_dig-supply = <0xd3>; | |
| vdd_sr2_pll-supply = <0xd4>; | |
| vdd_hf_dig-supply = <0xd3>; | |
| vdd_hf_pll-supply = <0xd4>; | |
| #clock-cells = <0x01>; | |
| ranges; | |
| linux,phandle = <0x2b>; | |
| phandle = <0x2b>; | |
| qcom,spm@0 { | |
| compatible = "qcom,gcc-spm-8937"; | |
| reg = <0xb111200 0x100 0xb011200 0x100>; | |
| reg-names = "spm_c0_base\0spm_c1_base"; | |
| }; | |
| }; | |
| qcom,cc-debug@1874000 { | |
| compatible = "qcom,cc-debug-8937"; | |
| reg = <0x1874000 0x04 0xb11101c 0x08>; | |
| reg-names = "cc_base\0meas"; | |
| #clock-cells = <0x01>; | |
| linux,phandle = <0xe5>; | |
| phandle = <0xe5>; | |
| }; | |
| qcom,gcc-mdss@1800000 { | |
| compatible = "qcom,gcc-mdss-8937"; | |
| clocks = <0xd5 0x5767c287 0xd5 0x44539836 0xd6 0xce233fcf 0xd6 0x73e88d02>; | |
| clock-names = "pixel_src\0byte_src\0pclk1_src\0byte1_src"; | |
| #clock-cells = <0x01>; | |
| linux,phandle = <0x161>; | |
| phandle = <0x161>; | |
| }; | |
| qcom,cpu-clock-8939@b111050 { | |
| compatible = "qcom,cpu-clock-8939"; | |
| reg = <0xb011050 0x08 0xb111050 0x08 0xb1d1050 0x08 0xa412c 0x08>; | |
| reg-names = "apcs-c1-rcg-base\0apcs-c0-rcg-base\0apcs-cci-rcg-base\0efuse"; | |
| vdd-c0-supply = <0xd7>; | |
| vdd-c1-supply = <0xd7>; | |
| vdd-cci-supply = <0xd7>; | |
| clocks = <0x2b 0x6b2fb034 0x2b 0xf761da94 0x2b 0x6b2fb034 0x2b 0xfbc57bbd 0x2b 0x6b2fb034 0x2b 0x6b2fb034>; | |
| clock-names = "clk-c0-4\0clk-c0-5\0clk-c1-4\0clk-c1-5\0clk-cci-4\0clk-cci-2"; | |
| qcom,speed0-bin-v0-c0 = <0x00 0x00 0x2dc6c000 0x01 0x35c98800 0x02 0x3b826000 0x04 0x413b3800 0x06>; | |
| qcom,speed0-bin-v0-c1 = <0x00 0x00 0x39387000 0x01 0x413b3800 0x02 0x4a62f800 0x04 0x501bd000 0x05 0x53819040 0x06>; | |
| qcom,speed0-bin-v0-cci = <0x00 0x00 0x17d78400 0x01 0x1fca0555 0x03>; | |
| qcom,speed1-bin-v0-c0 = <0x00 0x00 0x2dc6c000 0x01 0x35c98800 0x02 0x3b826000 0x04 0x413b3800 0x06 0x48190800 0x07>; | |
| qcom,speed1-bin-v0-c1 = <0x00 0x00 0x39387000 0x01 0x413b3800 0x02 0x4a62f800 0x04 0x501bd000 0x05 0x53819040 0x06 0x59439000 0x07>; | |
| qcom,speed1-bin-v0-cci = <0x00 0x00 0x17d78400 0x01 0x1fca0555 0x03>; | |
| qcom,speed2-bin-v0-c0 = <0x00 0x00 0x2dc6c000 0x01 0x35c98800 0x02 0x3b826000 0x03>; | |
| qcom,speed2-bin-v0-c1 = <0x00 0x00 0x39387000 0x01 0x413b3800 0x02 0x48190800 0x03>; | |
| qcom,speed2-bin-v0-cci = <0x00 0x00 0x17d78400 0x01 0x1fca0555 0x03>; | |
| #clock-cells = <0x01>; | |
| linux,phandle = <0x9e>; | |
| phandle = <0x9e>; | |
| }; | |
| qcom,msm-cpufreq { | |
| compatible = "qcom,msm-cpufreq"; | |
| clock-names = "l2_clk\0cpu0_clk\0cpu1_clk\0cpu2_clk\0cpu3_clk\0cpu4_clk\0cpu5_clk\0cpu6_clk\0cpu7_clk"; | |
| clocks = <0x9e 0x96854074 0x9e 0xcf28e63a 0x9e 0xcf28e63a 0x9e 0xcf28e63a 0x9e 0xcf28e63a 0x9e 0xc69f0878 0x9e 0xc69f0878 0x9e 0xc69f0878 0x9e 0xc69f0878>; | |
| qcom,governor-per-policy; | |
| qcom,cpufreq-table-0 = <0xea600 0x10b300 0x127500 0x130b00 0x148200 0x1560a8 0x16da00>; | |
| qcom,cpufreq-table-4 = <0xbb800 0xdc500 0xf3c00 0x10b300 0x127500>; | |
| }; | |
| qcom,cci { | |
| compatible = "devfreq-simple-dev"; | |
| clock-names = "devfreq_clk"; | |
| clocks = <0x9e 0x96854074>; | |
| governor = "cpufreq"; | |
| freq-tbl-khz = <0x61a80 0x82355>; | |
| linux,phandle = <0xd9>; | |
| phandle = <0xd9>; | |
| }; | |
| qcom,cpubw { | |
| compatible = "qcom,devbw"; | |
| governor = "cpufreq"; | |
| qcom,src-dst-ports = <0x01 0x200>; | |
| qcom,active-only; | |
| qcom,bw-tbl = <0x301 0x64b 0x84c 0xb71 0x1005 0x1098 0x13bd 0x1650 0x1808 0x1b77>; | |
| linux,phandle = <0xd8>; | |
| phandle = <0xd8>; | |
| }; | |
| qcom,cpu-bwmon { | |
| compatible = "qcom,bimc-bwmon2"; | |
| reg = <0x408000 0x300 0x401000 0x200>; | |
| reg-names = "base\0global_base"; | |
| interrupts = <0x00 0xb7 0x04>; | |
| qcom,mport = <0x00>; | |
| qcom,target-dev = <0xd8>; | |
| }; | |
| qcom,mincpubw { | |
| compatible = "qcom,devbw"; | |
| governor = "cpufreq"; | |
| qcom,src-dst-ports = <0x01 0x200>; | |
| qcom,active-only; | |
| qcom,bw-tbl = <0x301 0x64b 0x84c 0xb71 0x1005 0x1098 0x13bd 0x1650 0x1808 0x1b77>; | |
| linux,phandle = <0xda>; | |
| phandle = <0xda>; | |
| }; | |
| devfreq-cpufreq { | |
| cpubw-cpufreq { | |
| target-dev = <0xd8>; | |
| cpu-to-dev-map-0 = <0xf3c00 0xb71 0x10b300 0x13bd 0x130b00 0x1650 0x148200 0x1b77 0x16da00 0x1b77>; | |
| cpu-to-dev-map-4 = <0xc4e00 0xb71 0xdc500 0x13bd 0xf3c00 0x1808 0x127500 0x1b77>; | |
| }; | |
| cci-cpufreq { | |
| target-dev = <0xd9>; | |
| cpu-to-dev-map-0 = <0xf3c00 0x61a80 0x10b300 0x61a80 0x130b00 0x82355 0x148200 0x82355 0x16da00 0x82355>; | |
| cpu-to-dev-map-4 = <0xc4e00 0x61a80 0xdc500 0x61a80 0xf3c00 0x82355 0x127500 0x82355>; | |
| }; | |
| mincpubw-cpufreq { | |
| target-dev = <0xda>; | |
| cpu-to-dev-map-0 = <0x10b300 0xb71 0x16da00 0x1098>; | |
| cpu-to-dev-map-4 = <0xf3c00 0xb71 0x127500 0x1098>; | |
| }; | |
| }; | |
| uart@7aef000 { | |
| compatible = "qcom,msm-hsuart-v14"; | |
| reg = <0x7aef000 0x200 0x7ac4000 0x1f000>; | |
| reg-names = "core_mem\0bam_mem"; | |
| interrupt-names = "core_irq\0bam_irq\0wakeup_irq"; | |
| #address-cells = <0x00>; | |
| interrupt-parent = <0xdb>; | |
| interrupts = <0x00 0x01 0x02>; | |
| #interrupt-cells = <0x01>; | |
| interrupt-map-mask = <0xffffffff>; | |
| interrupt-map = <0x00 0x01 0x00 0x132 0x00 0x01 0x01 0x00 0xef 0x00 0x02 0xa7 0x11 0x00>; | |
| qcom,inject-rx-on-wakeup; | |
| qcom,rx-char-to-inject = <0xfd>; | |
| qcom,bam-tx-ep-pipe-index = <0x00>; | |
| qcom,bam-rx-ep-pipe-index = <0x01>; | |
| qcom,master-id = <0x54>; | |
| clock-names = "core_clk\0iface_clk"; | |
| clocks = <0x2b 0x8c3512ff 0x2b 0x8f283c1d>; | |
| pinctrl-names = "sleep\0default"; | |
| pinctrl-0 = <0xdc>; | |
| pinctrl-1 = <0xdd>; | |
| qcom,msm-bus,name = "blsp2_uart1"; | |
| qcom,msm-bus,num-cases = <0x02>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x54 0x200 0x00 0x00 0x54 0x200 0x1f4 0x320>; | |
| status = "disabled"; | |
| linux,phandle = <0xdb>; | |
| phandle = <0xdb>; | |
| }; | |
| dcc@b3000 { | |
| compatible = "qcom,dcc"; | |
| reg = <0xb3000 0x1000 0xb4000 0x2000>; | |
| reg-names = "dcc-base\0dcc-ram-base"; | |
| clocks = <0x2b 0xd1000c50>; | |
| clock-names = "dcc_clk"; | |
| qcom,save-reg; | |
| }; | |
| qcom,ipc-spinlock@1905000 { | |
| compatible = "qcom,ipc-spinlock-sfpb"; | |
| reg = <0x1905000 0x8000>; | |
| qcom,num-locks = <0x08>; | |
| }; | |
| qcom,smem@86300000 { | |
| compatible = "qcom,smem"; | |
| reg = <0x86300000 0x100000 0xb011008 0x04 0x60000 0x8000 0x193d000 0x08>; | |
| reg-names = "smem\0irq-reg-base\0aux-mem1\0smem_targ_info_reg"; | |
| qcom,mpu-enabled; | |
| qcom,smd-modem { | |
| compatible = "qcom,smd"; | |
| qcom,smd-edge = <0x00>; | |
| qcom,smd-irq-offset = <0x00>; | |
| qcom,smd-irq-bitmask = <0x1000>; | |
| interrupts = <0x00 0x19 0x01>; | |
| label = "modem"; | |
| qcom,not-loadable; | |
| }; | |
| qcom,smsm-modem { | |
| compatible = "qcom,smsm"; | |
| qcom,smsm-edge = <0x00>; | |
| qcom,smsm-irq-offset = <0x00>; | |
| qcom,smsm-irq-bitmask = <0x2000>; | |
| interrupts = <0x00 0x1a 0x01>; | |
| }; | |
| qcom,smd-wcnss { | |
| compatible = "qcom,smd"; | |
| qcom,smd-edge = <0x06>; | |
| qcom,smd-irq-offset = <0x00>; | |
| qcom,smd-irq-bitmask = <0x20000>; | |
| interrupts = <0x00 0x8e 0x01>; | |
| label = "wcnss"; | |
| }; | |
| qcom,smsm-wcnss { | |
| compatible = "qcom,smsm"; | |
| qcom,smsm-edge = <0x06>; | |
| qcom,smsm-irq-offset = <0x00>; | |
| qcom,smsm-irq-bitmask = <0x80000>; | |
| interrupts = <0x00 0x90 0x01>; | |
| }; | |
| qcom,smd-adsp { | |
| compatible = "qcom,smd"; | |
| qcom,smd-edge = <0x01>; | |
| qcom,smd-irq-offset = <0x00>; | |
| qcom,smd-irq-bitmask = <0x100>; | |
| interrupts = <0x00 0x121 0x01>; | |
| label = "adsp"; | |
| }; | |
| qcom,smsm-adsp { | |
| compatible = "qcom,smsm"; | |
| qcom,smsm-edge = <0x01>; | |
| qcom,smsm-irq-offset = <0x00>; | |
| qcom,smsm-irq-bitmask = <0x200>; | |
| interrupts = <0x00 0x122 0x01>; | |
| }; | |
| qcom,smd-rpm { | |
| compatible = "qcom,smd"; | |
| qcom,smd-edge = <0x0f>; | |
| qcom,smd-irq-offset = <0x00>; | |
| qcom,smd-irq-bitmask = <0x01>; | |
| interrupts = <0x00 0xa8 0x01>; | |
| label = "rpm"; | |
| qcom,irq-no-suspend; | |
| qcom,not-loadable; | |
| }; | |
| }; | |
| qcom,rpm-smd { | |
| compatible = "qcom,rpm-smd"; | |
| rpm-channel-name = "rpm_requests"; | |
| rpm-channel-type = <0x0f>; | |
| rpm-regulator-smpa1 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "smpa"; | |
| qcom,resource-id = <0x01>; | |
| qcom,regulator-type = <0x01>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "okay"; | |
| regulator-s1 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_s1"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0xf4240>; | |
| regulator-max-microvolt = <0x12b128>; | |
| qcom,init-voltage = <0xf4240>; | |
| linux,phandle = <0x10a>; | |
| phandle = <0x10a>; | |
| }; | |
| }; | |
| rpm-regulator-smpa2 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "smpa"; | |
| qcom,resource-id = <0x02>; | |
| qcom,regulator-type = <0x01>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "okay"; | |
| regulator-s2 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_s2"; | |
| qcom,set = <0x03>; | |
| status = "disabled"; | |
| }; | |
| regulator-s2-level { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_s2_level"; | |
| qcom,set = <0x03>; | |
| regulator-min-microvolt = <0x10>; | |
| regulator-max-microvolt = <0x200>; | |
| qcom,use-voltage-level; | |
| linux,phandle = <0xd2>; | |
| phandle = <0xd2>; | |
| }; | |
| regulator-s2-floor-level { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_s2_floor_level"; | |
| qcom,set = <0x03>; | |
| regulator-min-microvolt = <0x10>; | |
| regulator-max-microvolt = <0x200>; | |
| qcom,use-voltage-floor-level; | |
| qcom,always-send-voltage; | |
| linux,phandle = <0xbd>; | |
| phandle = <0xbd>; | |
| }; | |
| regulator-s2-level-ao { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_s2_level_ao"; | |
| qcom,set = <0x01>; | |
| regulator-min-microvolt = <0x10>; | |
| regulator-max-microvolt = <0x200>; | |
| qcom,use-voltage-level; | |
| linux,phandle = <0xd3>; | |
| phandle = <0xd3>; | |
| }; | |
| }; | |
| rpm-regulator-smpa3 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "smpa"; | |
| qcom,resource-id = <0x03>; | |
| qcom,regulator-type = <0x01>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "okay"; | |
| regulator-s3 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_s3"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x13d620>; | |
| regulator-max-microvolt = <0x13d620>; | |
| qcom,init-voltage = <0x13d620>; | |
| }; | |
| }; | |
| rpm-regulator-smpa4 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "smpa"; | |
| qcom,resource-id = <0x04>; | |
| qcom,regulator-type = <0x01>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "okay"; | |
| regulator-s4 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_s4"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1f47d0>; | |
| regulator-max-microvolt = <0x1f47d0>; | |
| qcom,init-voltage = <0x1f47d0>; | |
| linux,phandle = <0x104>; | |
| phandle = <0x104>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa2 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x02>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l2 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l2"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x124f80>; | |
| regulator-max-microvolt = <0x124f80>; | |
| qcom,init-voltage = <0x124f80>; | |
| linux,phandle = <0xe7>; | |
| phandle = <0xe7>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa3 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x03>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l3 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l3"; | |
| qcom,set = <0x03>; | |
| status = "disabled"; | |
| }; | |
| regulator-l3-level-ao { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l3_level_ao"; | |
| qcom,set = <0x01>; | |
| regulator-min-microvolt = <0x10>; | |
| regulator-max-microvolt = <0x180>; | |
| qcom,use-voltage-level; | |
| qcom,always-send-voltage; | |
| linux,phandle = <0xde>; | |
| phandle = <0xde>; | |
| }; | |
| regulator-l3-level-so { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l3_level_so"; | |
| qcom,set = <0x02>; | |
| regulator-min-microvolt = <0x10>; | |
| regulator-max-microvolt = <0x180>; | |
| qcom,init-voltage-level = <0x10>; | |
| qcom,use-voltage-level; | |
| }; | |
| }; | |
| rpm-regulator-ldoa5 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x05>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l5 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l5"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| qcom,init-voltage = <0x1b7740>; | |
| linux,phandle = <0xb6>; | |
| phandle = <0xb6>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa6 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x06>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l6 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l6"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| qcom,init-voltage = <0x1b7740>; | |
| regulator-always-on; | |
| regulator-boot-on; | |
| linux,phandle = <0x122>; | |
| phandle = <0x122>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa7 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x07>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l7 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l7"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| qcom,init-voltage = <0x1b7740>; | |
| linux,phandle = <0xdf>; | |
| phandle = <0xdf>; | |
| }; | |
| regulator-l7-ao { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l7_ao"; | |
| qcom,set = <0x01>; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| qcom,init-voltage = <0x1b7740>; | |
| linux,phandle = <0xd4>; | |
| phandle = <0xd4>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa8 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x08>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l8 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l8"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2b7cd0>; | |
| regulator-max-microvolt = <0x2c4020>; | |
| qcom,init-voltage = <0x2c4020>; | |
| linux,phandle = <0xf1>; | |
| phandle = <0xf1>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa9 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x09>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l9 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l9"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2dc6c0>; | |
| regulator-max-microvolt = <0x325aa0>; | |
| qcom,init-voltage = <0x2dc6c0>; | |
| linux,phandle = <0xe1>; | |
| phandle = <0xe1>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa10 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x0a>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l10 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l10"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2ab980>; | |
| regulator-max-microvolt = <0x2dc6c0>; | |
| qcom,init-voltage = <0x2ab980>; | |
| linux,phandle = <0xca>; | |
| phandle = <0xca>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa11 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x0b>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l11 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l11"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2d0370>; | |
| regulator-max-microvolt = <0x2d0370>; | |
| qcom,init-voltage = <0x2d0370>; | |
| linux,phandle = <0x55>; | |
| phandle = <0x55>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa12 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x0c>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l12 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l12"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x2d0370>; | |
| qcom,init-voltage = <0x1b7740>; | |
| linux,phandle = <0x56>; | |
| phandle = <0x56>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa13 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x0d>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x1388>; | |
| status = "okay"; | |
| regulator-l13 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l13"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2eebb8>; | |
| regulator-max-microvolt = <0x2eebb8>; | |
| qcom,init-voltage = <0x2eebb8>; | |
| linux,phandle = <0xb7>; | |
| phandle = <0xb7>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa14 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x0e>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x1388>; | |
| status = "okay"; | |
| regulator-l14 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l14"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x325aa0>; | |
| qcom,init-voltage = <0x1b7740>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa15 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x0f>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x1388>; | |
| status = "okay"; | |
| regulator-l15 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l15"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x325aa0>; | |
| qcom,init-voltage = <0x1b7740>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa16 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x10>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x1388>; | |
| status = "okay"; | |
| regulator-l16 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l16"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| qcom,init-voltage = <0x1b7740>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa17 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x11>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l17 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l17"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2ab980>; | |
| regulator-max-microvolt = <0x2c4020>; | |
| qcom,init-voltage = <0x2ab980>; | |
| linux,phandle = <0x121>; | |
| phandle = <0x121>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa19 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x13>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l19 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l19"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x12b128>; | |
| regulator-max-microvolt = <0x149970>; | |
| qcom,init-voltage = <0x12b128>; | |
| linux,phandle = <0xe0>; | |
| phandle = <0xe0>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa22 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x16>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l22 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l22"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2ab980>; | |
| regulator-max-microvolt = <0x2ab980>; | |
| qcom,init-voltage = <0x2ab980>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa23 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x17>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l23 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l23"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x124f80>; | |
| regulator-max-microvolt = <0x124f80>; | |
| qcom,init-voltage = <0x124f80>; | |
| linux,phandle = <0x123>; | |
| phandle = <0x123>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa18 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x12>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l18 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l18"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2932e0>; | |
| regulator-max-microvolt = <0x2932e0>; | |
| qcom,init-voltage = <0x2932e0>; | |
| }; | |
| }; | |
| }; | |
| qcom,wcnss-wlan@0a000000 { | |
| compatible = "qcom,wcnss_wlan"; | |
| reg = <0xa000000 0x280000 0xb011008 0x04 0xa21b000 0x3000 0x3204000 0x100 0x3200800 0x200 0xa100400 0x200 0xa205050 0x200 0xa219000 0x20 0xa080488 0x08 0xa080fb0 0x08 0xa08040c 0x08 0xa0120a8 0x08 0xa012448 0x08 0xa080c00 0x01>; | |
| reg-names = "wcnss_mmio\0wcnss_fiq\0pronto_phy_base\0riva_phy_base\0riva_ccu_base\0pronto_a2xb_base\0pronto_ccpu_base\0pronto_saw2_base\0wlan_tx_phy_aborts\0wlan_brdg_err_source\0wlan_tx_status\0alarms_txctl\0alarms_tactl\0pronto_mcu_base"; | |
| interrupts = <0x00 0x91 0x00 0x00 0x92 0x00>; | |
| interrupt-names = "wcnss_wlantx_irq\0wcnss_wlanrx_irq"; | |
| qcom,pronto-vddmx-supply = <0xde>; | |
| qcom,pronto-vddcx-supply = <0xd2>; | |
| qcom,pronto-vddpx-supply = <0xb6>; | |
| qcom,iris-vddxo-supply = <0xdf>; | |
| qcom,iris-vddrfa-supply = <0xe0>; | |
| qcom,iris-vddpa-supply = <0xe1>; | |
| qcom,iris-vdddig-supply = <0xb6>; | |
| qcom,iris-vddxo-voltage-level = <0x1b7740 0x00 0x1b7740>; | |
| qcom,iris-vddrfa-voltage-level = <0x13d620 0x00 0x13d620>; | |
| qcom,iris-vddpa-voltage-level = <0x325aa0 0x00 0x325aa0>; | |
| qcom,iris-vdddig-voltage-level = <0x1b7740 0x00 0x1b7740>; | |
| qcom,vddmx-voltage-level = <0x180 0x00 0x180>; | |
| qcom,vddcx-voltage-level = <0x100 0x00 0x200>; | |
| qcom,vddpx-voltage-level = <0x1b7740 0x00 0x1b7740>; | |
| qcom,iris-vddxo-current = <0x2710>; | |
| qcom,iris-vddrfa-current = <0x186a0>; | |
| qcom,iris-vddpa-current = <0x7dbb8>; | |
| qcom,iris-vdddig-current = <0x2710>; | |
| qcom,pronto-vddmx-current = <0x00>; | |
| qcom,pronto-vddcx-current = <0x00>; | |
| qcom,pronto-vddpx-current = <0x00>; | |
| pinctrl-names = "wcnss_default\0wcnss_sleep\0wcnss_gpio_default"; | |
| pinctrl-0 = <0xe2>; | |
| pinctrl-1 = <0xe3>; | |
| pinctrl-2 = <0xe4>; | |
| gpios = <0xa7 0x4c 0x00 0xa7 0x4d 0x00 0xa7 0x4e 0x00 0xa7 0x4f 0x00 0xa7 0x50 0x00>; | |
| clocks = <0x2b 0x116b76f 0x2b 0x24a30992 0xe5 0x917968c2 0x2b 0x709f430b 0x2b 0xd3949ebc>; | |
| clock-names = "xo\0rf_clk\0measure\0wcnss_debug\0snoc_wcnss"; | |
| qcom,snoc-wcnss-clock-freq = <0xbebc200>; | |
| qcom,has-autodetect-xo; | |
| qcom,is-pronto-v3; | |
| qcom,has-pronto-hw; | |
| qcom,has-vsys-adc-channel; | |
| qcom,wcnss-adc_tm = <0xe6>; | |
| }; | |
| usb@78db000 { | |
| compatible = "qcom,hsusb-otg"; | |
| reg = <0x78db000 0x400 0x6c000 0x200>; | |
| reg-names = "core\0phy_csr"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| ranges; | |
| interrupts = <0x00 0x86 0x00 0x00 0x8c 0x00>; | |
| interrupt-names = "core_irq\0async_irq"; | |
| hsusb_vdd_dig-supply = <0xe7>; | |
| HSUSB_1p8-supply = <0xdf>; | |
| HSUSB_3p3-supply = <0xb7>; | |
| qcom,vdd-voltage-level = <0x00 0x124f80 0x124f80>; | |
| vbus_otg-supply = <0xe8>; | |
| qcom,hsusb-otg-phy-type = <0x03>; | |
| qcom,hsusb-otg-mode = <0x03>; | |
| qcom,hsusb-otg-otg-control = <0x02>; | |
| qcom,dp-manual-pullup; | |
| qcom,hsusb-otg-mpm-dpsehv-int = <0x31>; | |
| qcom,hsusb-otg-mpm-dmsehv-int = <0x3a>; | |
| qcom,phy-dvdd-always-on; | |
| qcom,boost-sysclk-with-streaming; | |
| qcom,axi-prefetch-enable; | |
| qcom,enable-sdp-typec-current-limit; | |
| qcom,hsusb-otg-delay-lpm; | |
| qcom,msm-bus,name = "usb2"; | |
| qcom,msm-bus,num-cases = <0x03>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x57 0x200 0x00 0x00 0x57 0x200 0x13880 0x00 0x57 0x200 0x1770 0x1770>; | |
| clocks = <0x2b 0x72ce8032 0x2b 0xa11972e5 0x2b 0x6caa736f 0x2b 0xea410834 0x2b 0x34b7821b 0x2b 0x11d6a74e 0x2b 0x996884d5 0x2b 0x47179d 0x2b 0xe13808fd 0x2b 0x79bca5cc>; | |
| clock-names = "iface_clk\0core_clk\0sleep_clk\0bimc_clk\0snoc_clk\0pcnoc_clk\0phy_reset_clk\0phy_por_clk\0phy_csr_clk\0xo"; | |
| qcom,bus-clk-rate = <0x2ca1c800 0xbebc200 0x5f5e100>; | |
| qcom,max-nominal-sysclk-rate = <0x7f27450>; | |
| qcom,usbin-vadc = <0xe9>; | |
| qcom,usbid-gpio = <0xa7 0x61 0x00>; | |
| pinctrl-names = "default\0usbid-off"; | |
| pinctrl-0 = <0xea>; | |
| pinctrl-1 = <0xeb>; | |
| qcom,hsusb-otg-phy-init-seq = <0x44 0x80 0x35 0x81 0x03 0x82 0x33 0x83 0xffffffff>; | |
| qcom,chg-dcp-icl = <0x708>; | |
| qcom,usbbam@78c4000 { | |
| compatible = "qcom,usb-bam-msm"; | |
| reg = <0x78c4000 0x17000>; | |
| interrupt-parent = <0x01>; | |
| interrupts = <0x00 0x87 0x00>; | |
| qcom,bam-type = <0x01>; | |
| qcom,usb-bam-num-pipes = <0x04>; | |
| qcom,usb-bam-fifo-baseaddr = "\b`P"; | |
| qcom,ignore-core-reset-ack; | |
| qcom,disable-clk-gating; | |
| qcom,usb-bam-max-mbps-highspeed = <0x190>; | |
| qcom,reset-bam-on-disconnect; | |
| qcom,pipe0 { | |
| label = "hsusb-qdss-in-0"; | |
| qcom,usb-bam-mem-type = <0x02>; | |
| qcom,dir = <0x01>; | |
| qcom,pipe-num = <0x00>; | |
| qcom,peer-bam = <0x00>; | |
| qcom,peer-bam-physical-address = <0x6044000>; | |
| qcom,src-bam-pipe-index = <0x00>; | |
| qcom,dst-bam-pipe-index = <0x00>; | |
| qcom,data-fifo-offset = <0x00>; | |
| qcom,data-fifo-size = <0xe00>; | |
| qcom,descriptor-fifo-offset = <0xe00>; | |
| qcom,descriptor-fifo-size = <0x200>; | |
| }; | |
| }; | |
| }; | |
| android_usb@86000c8 { | |
| compatible = "qcom,android-usb"; | |
| reg = <0x86000c8 0xc8>; | |
| qcom,pm-qos-latency = <0x02 0x3e9 0x319d>; | |
| }; | |
| qcom,wdt@b017000 { | |
| compatible = "qcom,msm-watchdog"; | |
| reg = <0xb017000 0x1000>; | |
| reg-names = "wdt-base"; | |
| interrupts = <0x00 0x03 0x00 0x00 0x04 0x00>; | |
| qcom,bark-time = <0x55f0>; | |
| qcom,pet-time = <0x2710>; | |
| qcom,ipi-ping; | |
| qcom,wakeup-enable; | |
| status = "okay"; | |
| linux,contiguous-region = <0xec>; | |
| }; | |
| qcom,chd { | |
| compatible = "qcom,core-hang-detect"; | |
| qcom,threshold-arr = <0xb088094 0xb098094 0xb0a8094 0xb0b8094 0xb188094 0xb198094 0xb1a8094 0xb1a8094>; | |
| qcom,config-arr = <0xb08809c 0xb09809c 0xb0a809c 0xb0b809c 0xb18809c 0xb19809c 0xb1a809c 0xb1b809c>; | |
| }; | |
| qcom,msm-rtb { | |
| compatible = "qcom,msm-rtb"; | |
| qcom,rtb-size = <0x100000>; | |
| }; | |
| qcom,msm-imem@8600000 { | |
| compatible = "qcom,msm-imem"; | |
| reg = <0x8600000 0x1000>; | |
| ranges = <0x00 0x8600000 0x1000>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| mem_dump_table@10 { | |
| compatible = "qcom,msm-imem-mem_dump_table"; | |
| reg = <0x10 0x08>; | |
| }; | |
| dload_type@18 { | |
| compatible = "qcom,msm-imem-dload-type"; | |
| reg = <0x18 0x04>; | |
| }; | |
| restart_reason@65c { | |
| compatible = "qcom,msm-imem-restart_reason"; | |
| reg = <0x65c 0x04>; | |
| }; | |
| boot_stats@6b0 { | |
| compatible = "qcom,msm-imem-boot_stats"; | |
| reg = <0x6b0 0x20>; | |
| }; | |
| pil@94c { | |
| compatible = "qcom,msm-imem-pil"; | |
| reg = <0x94c 0xc8>; | |
| }; | |
| }; | |
| jtagfuse@a601c { | |
| compatible = "qcom,jtag-fuse-v2"; | |
| reg = <0xa601c 0x08>; | |
| reg-names = "fuse-base"; | |
| }; | |
| jtagmm@61bc000 { | |
| compatible = "qcom,jtagv8-mm"; | |
| reg = <0x61bc000 0x1000 0x61b0000 0x1000>; | |
| reg-names = "etm-base\0debug-base"; | |
| qcom,coresight-jtagmm-cpu = <0x06>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| jtagmm@61bd000 { | |
| compatible = "qcom,jtagv8-mm"; | |
| reg = <0x61bd000 0x1000 0x61b2000 0x1000>; | |
| reg-names = "etm-base\0debug-base"; | |
| qcom,coresight-jtagmm-cpu = <0x07>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| jtagmm@61be000 { | |
| compatible = "qcom,jtagv8-mm"; | |
| reg = <0x61be000 0x1000 0x61b4000 0x1000>; | |
| reg-names = "etm-base\0debug-base"; | |
| qcom,coresight-jtagmm-cpu = <0x08>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| jtagmm@61bf000 { | |
| compatible = "qcom,jtagv8-mm"; | |
| reg = <0x61bf000 0x1000 0x61b6000 0x1000>; | |
| reg-names = "etm-base\0debug-base"; | |
| qcom,coresight-jtagmm-cpu = <0x09>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| jtagmm@619c000 { | |
| compatible = "qcom,jtagv8-mm"; | |
| reg = <0x619c000 0x1000 0x6190000 0x1000>; | |
| reg-names = "etm-base\0debug-base"; | |
| qcom,coresight-jtagmm-cpu = <0x02>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| jtagmm@619d000 { | |
| compatible = "qcom,jtagv8-mm"; | |
| reg = <0x619d000 0x1000 0x6192000 0x1000>; | |
| reg-names = "etm-base\0debug-base"; | |
| qcom,coresight-jtagmm-cpu = <0x03>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| jtagmm@619e000 { | |
| compatible = "qcom,jtagv8-mm"; | |
| reg = <0x619e000 0x1000 0x6194000 0x1000>; | |
| reg-names = "etm-base\0debug-base"; | |
| qcom,coresight-jtagmm-cpu = <0x04>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| jtagmm@619f000 { | |
| compatible = "qcom,jtagv8-mm"; | |
| reg = <0x619f000 0x1000 0x6196000 0x1000>; | |
| reg-names = "etm-base\0debug-base"; | |
| qcom,coresight-jtagmm-cpu = <0x05>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk\0core_a_clk"; | |
| }; | |
| qcom,smdtty { | |
| compatible = "qcom,smdtty"; | |
| qcom,smdtty-apps-fm { | |
| qcom,smdtty-remote = "wcnss"; | |
| qcom,smdtty-port-name = "APPS_FM"; | |
| }; | |
| smdtty-apps-riva-bt-acl { | |
| qcom,smdtty-remote = "wcnss"; | |
| qcom,smdtty-port-name = "APPS_RIVA_BT_ACL"; | |
| }; | |
| qcom,smdtty-apps-riva-bt-cmd { | |
| qcom,smdtty-remote = "wcnss"; | |
| qcom,smdtty-port-name = "APPS_RIVA_BT_CMD"; | |
| }; | |
| qcom,smdtty-mbalbridge { | |
| qcom,smdtty-remote = "modem"; | |
| qcom,smdtty-port-name = "MBALBRIDGE"; | |
| }; | |
| smdtty-apps-riva-ant-cmd { | |
| qcom,smdtty-remote = "wcnss"; | |
| qcom,smdtty-port-name = "APPS_RIVA_ANT_CMD"; | |
| }; | |
| smdtty-apps-riva-ant-data { | |
| qcom,smdtty-remote = "wcnss"; | |
| qcom,smdtty-port-name = "APPS_RIVA_ANT_DATA"; | |
| }; | |
| qcom,smdtty-data1 { | |
| qcom,smdtty-remote = "modem"; | |
| qcom,smdtty-port-name = "DATA1"; | |
| }; | |
| qcom,smdtty-data4 { | |
| qcom,smdtty-remote = "modem"; | |
| qcom,smdtty-port-name = "DATA4"; | |
| }; | |
| qcom,smdtty-data11 { | |
| qcom,smdtty-remote = "modem"; | |
| qcom,smdtty-port-name = "DATA11"; | |
| }; | |
| qcom,smdtty-data21 { | |
| qcom,smdtty-remote = "modem"; | |
| qcom,smdtty-port-name = "DATA21"; | |
| }; | |
| smdtty-loopback { | |
| qcom,smdtty-remote = "modem"; | |
| qcom,smdtty-port-name = "LOOPBACK"; | |
| qcom,smdtty-dev-name = "LOOPBACK_TTY"; | |
| }; | |
| }; | |
| qcom,smdpkt { | |
| compatible = "qcom,smdpkt"; | |
| qcom,smdpkt-data5-cntl { | |
| qcom,smdpkt-remote = "modem"; | |
| qcom,smdpkt-port-name = "DATA5_CNTL"; | |
| qcom,smdpkt-dev-name = "smdcntl0"; | |
| }; | |
| qcom,smdpkt-data22 { | |
| qcom,smdpkt-remote = "modem"; | |
| qcom,smdpkt-port-name = "DATA22"; | |
| qcom,smdpkt-dev-name = "smd22"; | |
| }; | |
| qcom,smdpkt-data40-cntl { | |
| qcom,smdpkt-remote = "modem"; | |
| qcom,smdpkt-port-name = "DATA40_CNTL"; | |
| qcom,smdpkt-dev-name = "smdcntl8"; | |
| }; | |
| qcom,smdpkt-apr-apps2 { | |
| qcom,smdpkt-remote = "adsp"; | |
| qcom,smdpkt-port-name = "apr_apps2"; | |
| qcom,smdpkt-dev-name = "apr_apps2"; | |
| }; | |
| qcom,smdpkt-loopback { | |
| qcom,smdpkt-remote = "modem"; | |
| qcom,smdpkt-port-name = "LOOPBACK"; | |
| qcom,smdpkt-dev-name = "smd_pkt_loopback"; | |
| }; | |
| }; | |
| qcom,iris-fm { | |
| compatible = "qcom,iris_fm"; | |
| }; | |
| qrng@e3000 { | |
| compatible = "qcom,msm-rng"; | |
| reg = <0xe3000 0x1000>; | |
| qcom,msm-rng-iface-clk; | |
| qcom,no-qrng-config; | |
| qcom,msm-bus,name = "msm-rng-noc"; | |
| qcom,msm-bus,num-cases = <0x02>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x01 0x26a 0x00 0x00 0x01 0x26a 0x00 0x320>; | |
| clocks = <0x2b 0x397e7eaa>; | |
| clock-names = "iface_clk"; | |
| }; | |
| tz-log@08600720 { | |
| compatible = "qcom,tz-log"; | |
| reg = "\b`\a \0\0 "; | |
| status = "okay"; | |
| linux,contiguous-region = <0xed>; | |
| }; | |
| qcrypto@720000 { | |
| compatible = "qcom,qcrypto"; | |
| reg = <0x720000 0x20000 0x704000 0x20000>; | |
| reg-names = "crypto-base\0crypto-bam-base"; | |
| interrupts = <0x00 0xcf 0x00>; | |
| qcom,bam-pipe-pair = <0x02>; | |
| qcom,ce-hw-instance = <0x00>; | |
| qcom,ce-device = <0x00>; | |
| qcom,ce-hw-shared; | |
| qcom,clk-mgmt-sus-res; | |
| qcom,msm-bus,name = "qcrypto-noc"; | |
| qcom,msm-bus,num-cases = <0x02>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x37 0x200 0x00 0x00 0x37 0x200 0x60180 0x60180>; | |
| clocks = <0x2b 0x37a21414 0x2b 0xd390d2 0x2b 0x94de4919 0x2b 0xd4415c9b>; | |
| clock-names = "core_clk_src\0core_clk\0iface_clk\0bus_clk"; | |
| qcom,use-sw-aes-cbc-ecb-ctr-algo; | |
| qcom,use-sw-aes-xts-algo; | |
| qcom,use-sw-aes-ccm-algo; | |
| qcom,use-sw-ahash-algo; | |
| qcom,use-sw-hmac-algo; | |
| qcom,use-sw-aead-algo; | |
| qcom,ce-opp-freq = <0x5f5e100>; | |
| }; | |
| qcedev@720000 { | |
| compatible = "qcom,qcedev"; | |
| reg = <0x720000 0x20000 0x704000 0x20000>; | |
| reg-names = "crypto-base\0crypto-bam-base"; | |
| interrupts = <0x00 0xcf 0x00>; | |
| qcom,bam-pipe-pair = <0x01>; | |
| qcom,ce-hw-instance = <0x00>; | |
| qcom,ce-device = <0x00>; | |
| qcom,ce-hw-shared; | |
| qcom,msm-bus,name = "qcedev-noc"; | |
| qcom,msm-bus,num-cases = <0x02>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x37 0x200 0x00 0x00 0x37 0x200 0x60180 0x60180>; | |
| clocks = <0x2b 0x37a21414 0x2b 0xd390d2 0x2b 0x94de4919 0x2b 0xd4415c9b>; | |
| clock-names = "core_clk_src\0core_clk\0iface_clk\0bus_clk"; | |
| qcom,ce-opp-freq = <0x5f5e100>; | |
| }; | |
| qseecom@85b00000 { | |
| compatible = "qcom,qseecom"; | |
| reg = <0x84300000 0x2000000>; | |
| reg-names = "secapp-region"; | |
| qcom,hlos-num-ce-hw-instances = <0x01>; | |
| qcom,hlos-ce-hw-instance = <0x00>; | |
| qcom,qsee-ce-hw-instance = <0x00>; | |
| qcom,disk-encrypt-pipe-pair = <0x02>; | |
| qcom,support-fde; | |
| qcom,appsbl-qseecom-support; | |
| qcom,msm-bus,name = "qseecom-noc"; | |
| qcom,msm-bus,num-cases = <0x04>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,support-bus-scaling; | |
| qcom,msm-bus,vectors-KBps = <0x37 0x200 0x00 0x00 0x37 0x200 0x00 0x00 0x37 0x200 0x1d4c0 0x124f80 0x37 0x200 0x60180 0x3c0f00>; | |
| clocks = <0x2b 0x37a21414 0x2b 0xd390d2 0x2b 0x94de4919 0x2b 0xd4415c9b>; | |
| clock-names = "core_clk_src\0core_clk\0iface_clk\0bus_clk"; | |
| qcom,ce-opp-freq = <0x5f5e100>; | |
| }; | |
| qcom,ipc_router { | |
| compatible = "qcom,ipc_router"; | |
| qcom,node-id = <0x01>; | |
| }; | |
| qcom,ipc_router_modem_xprt { | |
| compatible = "qcom,ipc_router_smd_xprt"; | |
| qcom,ch-name = "IPCRTR"; | |
| qcom,xprt-remote = "modem"; | |
| qcom,xprt-linkid = <0x01>; | |
| qcom,xprt-version = <0x01>; | |
| qcom,fragmented-data; | |
| qcom,disable-pil-loading; | |
| }; | |
| qcom,ipc_router_q6_xprt { | |
| compatible = "qcom,ipc_router_smd_xprt"; | |
| qcom,ch-name = "IPCRTR"; | |
| qcom,xprt-remote = "adsp"; | |
| qcom,xprt-linkid = <0x01>; | |
| qcom,xprt-version = <0x01>; | |
| qcom,fragmented-data; | |
| }; | |
| qcom,ipc_router_wcnss_xprt { | |
| compatible = "qcom,ipc_router_smd_xprt"; | |
| qcom,ch-name = "IPCRTR"; | |
| qcom,xprt-remote = "wcnss"; | |
| qcom,xprt-linkid = <0x01>; | |
| qcom,xprt-version = <0x01>; | |
| qcom,fragmented-data; | |
| }; | |
| qcom,adsprpc-mem { | |
| compatible = "qcom,msm-adsprpc-mem-region"; | |
| memory-region = <0xee>; | |
| }; | |
| qcom,adsprpc_domains { | |
| compatible = "qcom,msm-fastrpc-legacy-compute-cb"; | |
| qcom,msm_fastrpc_compute_cb { | |
| qcom,adsp-shared-phandle = <0xef>; | |
| qcom,adsp-shared-sids = <0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f>; | |
| qcom,virtual-addr-pool = <0x80000000 0x7fffffff>; | |
| }; | |
| }; | |
| qcom,bam_dmux@4044000 { | |
| compatible = "qcom,bam_dmux"; | |
| reg = <0x4044000 0x19000>; | |
| interrupts = <0x00 0xa2 0x01>; | |
| qcom,rx-ring-size = <0x20>; | |
| qcom,max-rx-mtu = <0x1000>; | |
| qcom,fast-shutdown; | |
| qcom,no-cpu-affinity; | |
| }; | |
| sdcc1ice@7803000 { | |
| compatible = "qcom,ice"; | |
| reg = <0x7803000 0x8000>; | |
| interrupt-names = "sdcc_ice_nonsec_level_irq\0sdcc_ice_sec_level_irq"; | |
| interrupts = <0x00 0x138 0x00 0x00 0x139 0x00>; | |
| qcom,enable-ice-clk; | |
| clock-names = "ice_core_clk_src\0ice_core_clk\0bus_clk\0iface_clk"; | |
| clocks = <0x2b 0xfd6a4301 0x2b 0xfd5680a 0x2b 0x9ad6fb96 0x2b 0x691e0caa>; | |
| qcom,op-freq-hz = <0xbebc200 0x00 0x00 0x00>; | |
| qcom,msm-bus,name = "sdcc_ice_noc"; | |
| qcom,msm-bus,num-cases = <0x02>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x4e 0x200 0x00 0x00 0x4e 0x200 0x3e8 0x00>; | |
| qcom,bus-vector-names = "MIN\0MAX"; | |
| qcom,instance-type = "sdcc"; | |
| linux,phandle = <0xf0>; | |
| phandle = <0xf0>; | |
| }; | |
| sdhci@7824900 { | |
| compatible = "qcom,sdhci-msm"; | |
| reg = <0x7824900 0x500 0x7824000 0x800 0x7824e00 0x200>; | |
| reg-names = "hc_mem\0core_mem\0cmdq_mem"; | |
| interrupts = <0x00 0x7b 0x00 0x00 0x8a 0x00>; | |
| interrupt-names = "hc_irq\0pwr_irq"; | |
| sdhc-msm-crypto = <0xf0>; | |
| qcom,bus-width = <0x08>; | |
| qcom,large-address-bus; | |
| qcom,devfreq,freq-table = <0x2faf080 0xbebc200>; | |
| qcom,pm-qos-irq-type = "affine_irq"; | |
| qcom,pm-qos-irq-latency = <0x02 0xc8>; | |
| qcom,pm-qos-cpu-groups = <0x0f 0xf0>; | |
| qcom,pm-qos-cmdq-latency-us = <0x02 0xc8 0x02 0xc8>; | |
| qcom,pm-qos-legacy-latency-us = <0x02 0xc8 0x02 0xc8>; | |
| qcom,msm-bus,name = "sdhc1"; | |
| qcom,msm-bus,num-cases = <0x09>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x4e 0x200 0x00 0x00 0x4e 0x200 0x416 0xc80 0x4e 0x200 0xcc3e 0x27100 0x4e 0x200 0xff50 0x30d40 0x4e 0x200 0x1fe9e 0x61a80 0x4e 0x200 0x1fe9e 0x61a80 0x4e 0x200 0x3fd3e 0xc3500 0x4e 0x200 0x3fd3e 0xc3500 0x4e 0x200 0x146cc2 0x3e8000>; | |
| qcom,bus-bw-vectors-bps = <0x00 0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200 0x17d78400 0xffffffff>; | |
| clocks = <0x2b 0x691e0caa 0x2b 0x9ad6fb96 0x2b 0xfd5680a>; | |
| clock-names = "iface_clk\0core_clk\0ice_core_clk"; | |
| qcom,ice-clk-rates = <0xbebc200 0x5f5e100>; | |
| qcom,scaling-lower-bus-speed-mode = "DDR52"; | |
| status = "ok"; | |
| vdd-supply = <0xf1>; | |
| qcom,vdd-voltage-level = <0x2c4020 0x2c4020>; | |
| qcom,vdd-current-level = <0xc8 0x8b290>; | |
| vdd-io-supply = <0xb6>; | |
| qcom,vdd-io-always-on; | |
| qcom,vdd-io-lpm-sup; | |
| qcom,vdd-io-voltage-level = <0x1b7740 0x1b7740>; | |
| qcom,vdd-io-current-level = <0xc8 0x4f588>; | |
| pinctrl-names = "active\0sleep"; | |
| pinctrl-0 = <0xf2 0xf3 0xf4 0xf5>; | |
| pinctrl-1 = <0xf6 0xf7 0xf8 0xf9>; | |
| qcom,clk-rates = <0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xb71b000 0x16e36000>; | |
| qcom,nonremovable; | |
| qcom,bus-speed-mode = "HS400_1p8v\0HS200_1p8v\0DDR_1p8v"; | |
| }; | |
| sdhci@7864900 { | |
| compatible = "qcom,sdhci-msm"; | |
| reg = <0x7864900 0x500 0x7864000 0x800>; | |
| reg-names = "hc_mem\0core_mem"; | |
| interrupts = <0x00 0x01 0x02>; | |
| interrupt-names = "hc_irq\0pwr_irq\0status_irq"; | |
| qcom,bus-width = <0x04>; | |
| qcom,large-address-bus; | |
| qcom,pm-qos-irq-type = "affine_irq"; | |
| qcom,pm-qos-irq-latency = <0x02 0xc8>; | |
| qcom,pm-qos-cpu-groups = <0x0f 0xf0>; | |
| qcom,pm-qos-legacy-latency-us = <0x02 0xc8 0x02 0xc8>; | |
| qcom,msm-bus,name = "sdhc2"; | |
| qcom,msm-bus,num-cases = <0x08>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x51 0x200 0x00 0x00 0x51 0x200 0x416 0xc80 0x51 0x200 0xcc3e 0x27100 0x51 0x200 0xff50 0x30d40 0x51 0x200 0x1fe9e 0x61a80 0x51 0x200 0x3fd3e 0xc3500 0x51 0x200 0x3fd3e 0xc3500 0x51 0x200 0x146cc2 0x3e8000>; | |
| qcom,bus-bw-vectors-bps = <0x00 0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200 0xffffffff>; | |
| qcom,devfreq,freq-table = <0x2faf080 0xbebc200>; | |
| clocks = <0x2b 0x23d5727f 0x2b 0x861b20ac>; | |
| clock-names = "iface_clk\0core_clk"; | |
| status = "ok"; | |
| vdd-supply = <0x55>; | |
| qcom,vdd-voltage-level = <0x2d0370 0x2d0370>; | |
| qcom,vdd-current-level = <0x3a98 0xc3500>; | |
| vdd-io-supply = <0x56>; | |
| qcom,vdd-io-voltage-level = <0x1b7740 0x2d0370>; | |
| qcom,vdd-io-current-level = <0xc8 0x55f0>; | |
| pinctrl-names = "active\0sleep"; | |
| pinctrl-0 = <0xfa 0xfb 0xfc 0xfd>; | |
| pinctrl-1 = <0xfe 0xff 0x100 0x101>; | |
| #address-cells = <0x00>; | |
| interrupt-parent = <0x102>; | |
| #interrupt-cells = <0x01>; | |
| interrupt-map-mask = <0xffffffff>; | |
| interrupt-map = <0x00 0x01 0x00 0x7d 0x00 0x01 0x01 0x00 0xdd 0x00 0x02 0xa7 0x43 0x00>; | |
| cd-gpios = <0xa7 0x43 0x01>; | |
| qcom,cd-wakeup; | |
| qcom,clk-rates = <0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200>; | |
| qcom,bus-speed-mode = "SDR12\0SDR25\0SDR50\0DDR50\0SDR104"; | |
| linux,phandle = <0x102>; | |
| phandle = <0x102>; | |
| }; | |
| qcom,spmi@200f000 { | |
| compatible = "qcom,spmi-pmic-arb"; | |
| reg = <0x200f000 0x1000 0x2400000 0x800000 0x2c00000 0x800000 0x3800000 0x200000 0x200a000 0x2100>; | |
| reg-names = "core\0chnls\0obsrvr\0intr\0cnfg"; | |
| interrupts = <0x00 0xbe 0x00>; | |
| qcom,pmic-arb-channel = <0x00>; | |
| qcom,pmic-arb-max-peripherals = <0x100>; | |
| qcom,pmic-arb-max-periph-interrupts = <0x100>; | |
| qcom,pmic-arb-ee = <0x00>; | |
| #interrupt-cells = <0x03>; | |
| interrupt-controller; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| cell-index = <0x00>; | |
| linux,phandle = <0x103>; | |
| phandle = <0x103>; | |
| qcom,pm8937@1 { | |
| spmi-slave-container; | |
| reg = <0x01>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| spm-regulator@2000 { | |
| compatible = "qcom,spm-regulator"; | |
| reg = <0x2000 0x100>; | |
| regulator-name = "pm8937_s5"; | |
| regulator-min-microvolt = <0x100590>; | |
| regulator-max-microvolt = <0x149970>; | |
| linux,phandle = <0x115>; | |
| phandle = <0x115>; | |
| }; | |
| pwm@bc00 { | |
| status = "disabled"; | |
| compatible = "qcom,qpnp-pwm"; | |
| reg = <0xbc00 0x100>; | |
| reg-names = "qpnp-lpg-channel-base"; | |
| qcom,channel-id = <0x00>; | |
| qcom,supported-sizes = <0x06 0x09>; | |
| #pwm-cells = <0x02>; | |
| }; | |
| 8952_wcd_codec@f000 { | |
| compatible = "qcom,msm8x16_wcd_codec"; | |
| reg = <0xf000 0x100>; | |
| interrupt-parent = <0x103>; | |
| interrupts = <0x01 0xf0 0x00 0x01 0xf0 0x01 0x01 0xf0 0x02 0x01 0xf0 0x03 0x01 0xf0 0x04 0x01 0xf0 0x05 0x01 0xf0 0x06 0x01 0xf0 0x07>; | |
| interrupt-names = "spk_cnp_int\0spk_clip_int\0spk_ocp_int\0ins_rem_det1\0but_rel_det\0but_press_det\0ins_rem_det\0mbhc_int"; | |
| cdc-vdda-cp-supply = <0x104>; | |
| qcom,cdc-vdda-cp-voltage = <0x1f47d0 0x1f47d0>; | |
| qcom,cdc-vdda-cp-current = <0x33450>; | |
| cdc-vdd-io-supply = <0xb6>; | |
| qcom,cdc-vdd-io-voltage = <0x1b7740 0x1b7740>; | |
| qcom,cdc-vdd-io-current = <0x1388>; | |
| cdc-vdd-pa-supply = <0x104>; | |
| qcom,cdc-vdd-pa-voltage = <0x1f47d0 0x1f47d0>; | |
| qcom,cdc-vdd-pa-current = <0x3f7a0>; | |
| cdc-vdd-mic-bias-supply = <0xb7>; | |
| qcom,cdc-vdd-mic-bias-voltage = <0x2eebb8 0x2eebb8>; | |
| qcom,cdc-vdd-mic-bias-current = <0x1388>; | |
| qcom,cdc-mclk-clk-rate = <0x927c00>; | |
| qcom,cdc-static-supplies = "cdc-vdd-io\0cdc-vdd-pa\0cdc-vdda-cp"; | |
| qcom,cdc-on-demand-supplies = "cdc-vdd-mic-bias"; | |
| qcom,dig-cdc-base-addr = <0xc0f0000>; | |
| linux,phandle = <0x15d>; | |
| phandle = <0x15d>; | |
| }; | |
| 8952_wcd_codec@f100 { | |
| compatible = "qcom,msm8x16_wcd_codec"; | |
| reg = <0xf100 0x100>; | |
| interrupt-parent = <0x103>; | |
| interrupts = <0x01 0xf1 0x00 0x01 0xf1 0x01 0x01 0xf1 0x02 0x01 0xf1 0x03 0x01 0xf1 0x04 0x01 0xf1 0x05>; | |
| interrupt-names = "ear_ocp_int\0hphr_ocp_int\0hphl_ocp_det\0ear_cnp_int\0hphr_cnp_int\0hphl_cnp_int"; | |
| qcom,dig-cdc-base-addr = <0xc0f0000>; | |
| }; | |
| }; | |
| qcom,pm8937@0 { | |
| spmi-slave-container; | |
| reg = <0x00>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| qcom,revid@100 { | |
| compatible = "qcom,qpnp-revid"; | |
| reg = <0x100 0x100>; | |
| }; | |
| qcom,power-on@800 { | |
| compatible = "qcom,qpnp-power-on"; | |
| reg = <0x800 0x100>; | |
| interrupts = <0x00 0x08 0x00 0x00 0x08 0x01 0x00 0x08 0x04 0x00 0x08 0x05>; | |
| interrupt-names = "kpdpwr\0resin\0resin-bark\0kpdpwr-resin-bark"; | |
| qcom,pon-dbc-delay = <0x3d09>; | |
| qcom,system-reset; | |
| qcom,pon_1 { | |
| qcom,pon-type = <0x00>; | |
| qcom,pull-up = <0x01>; | |
| linux,code = <0x74>; | |
| }; | |
| qcom,pon_2 { | |
| qcom,pon-type = <0x01>; | |
| qcom,pull-up = <0x01>; | |
| linux,code = <0x72>; | |
| }; | |
| }; | |
| qcom,temp-alarm@2400 { | |
| compatible = "qcom,qpnp-temp-alarm"; | |
| reg = <0x2400 0x100>; | |
| interrupts = <0x00 0x24 0x00>; | |
| label = "pm8937_tz"; | |
| qcom,channel-num = <0x08>; | |
| qcom,threshold-set = <0x00>; | |
| qcom,temp_alarm-vadc = <0x105>; | |
| }; | |
| qcom,coincell@2800 { | |
| compatible = "qcom,qpnp-coincell"; | |
| reg = <0x2800 0x100>; | |
| }; | |
| qcom,pm8937_rtc { | |
| spmi-dev-container; | |
| compatible = "qcom,qpnp-rtc"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| qcom,qpnp-rtc-write = <0x00>; | |
| qcom,qpnp-rtc-alarm-pwrup = <0x00>; | |
| qcom,pm8937_rtc_rw@6000 { | |
| reg = <0x6000 0x100>; | |
| }; | |
| qcom,pm8937_rtc_alarm@6100 { | |
| reg = <0x6100 0x100>; | |
| interrupts = <0x00 0x61 0x01>; | |
| }; | |
| }; | |
| mpps { | |
| compatible = "qcom,qpnp-pin"; | |
| spmi-dev-container; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| label = "pm8937-mpp"; | |
| mpp@a000 { | |
| reg = <0xa000 0x100>; | |
| qcom,pin-num = <0x01>; | |
| status = "disabled"; | |
| }; | |
| mpp@a100 { | |
| reg = <0xa100 0x100>; | |
| qcom,pin-num = <0x02>; | |
| qcom,mode = <0x04>; | |
| qcom,invert = <0x01>; | |
| qcom,ain-route = <0x01>; | |
| qcom,master-en = <0x01>; | |
| qcom,src-sel = <0x00>; | |
| }; | |
| mpp@a200 { | |
| reg = <0xa200 0x100>; | |
| qcom,pin-num = <0x03>; | |
| status = "disabled"; | |
| }; | |
| mpp@a300 { | |
| reg = <0xa300 0x100>; | |
| qcom,pin-num = <0x04>; | |
| qcom,mode = <0x04>; | |
| qcom,invert = <0x01>; | |
| qcom,ain-route = <0x03>; | |
| qcom,master-en = <0x01>; | |
| qcom,src-sel = <0x00>; | |
| }; | |
| }; | |
| gpios { | |
| spmi-dev-container; | |
| compatible = "qcom,qpnp-pin"; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| label = "pm8937-gpio"; | |
| linux,phandle = <0x117>; | |
| phandle = <0x117>; | |
| gpio@c000 { | |
| reg = <0xc000 0x100>; | |
| qcom,pin-num = <0x01>; | |
| status = "disabled"; | |
| }; | |
| gpio@c100 { | |
| reg = <0xc100 0x100>; | |
| qcom,pin-num = <0x02>; | |
| status = "ok"; | |
| qcom,mode = <0x01>; | |
| qcom,out-type = <0x00>; | |
| qcom,pull = <0x05>; | |
| qcom,vin-sel = <0x01>; | |
| qcom,src-sel = <0x02>; | |
| qcom,master-en = <0x01>; | |
| qcom,out-strength = <0x02>; | |
| }; | |
| gpio@c200 { | |
| reg = <0xc200 0x100>; | |
| qcom,pin-num = <0x03>; | |
| status = "disabled"; | |
| }; | |
| gpio@c300 { | |
| reg = <0xc300 0x100>; | |
| qcom,pin-num = <0x04>; | |
| status = "disabled"; | |
| }; | |
| gpio@c400 { | |
| reg = <0xc400 0x100>; | |
| qcom,pin-num = <0x05>; | |
| status = "disabled"; | |
| }; | |
| gpio@c500 { | |
| reg = <0xc500 0x100>; | |
| qcom,pin-num = <0x06>; | |
| status = "disabled"; | |
| }; | |
| gpio@c600 { | |
| reg = <0xc600 0x100>; | |
| qcom,pin-num = <0x07>; | |
| status = "disabled"; | |
| }; | |
| gpio@c700 { | |
| reg = <0xc700 0x100>; | |
| qcom,pin-num = <0x08>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| vadc@3100 { | |
| compatible = "qcom,qpnp-vadc"; | |
| reg = <0x3100 0x100>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| interrupts = <0x00 0x31 0x00>; | |
| interrupt-names = "eoc-int-en-set"; | |
| qcom,adc-bit-resolution = <0x0f>; | |
| qcom,adc-vdd-reference = <0x708>; | |
| qcom,vadc-poll-eoc; | |
| linux,phandle = <0x105>; | |
| phandle = <0x105>; | |
| chan@5 { | |
| label = "vcoin"; | |
| reg = <0x05>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x01>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x00>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| }; | |
| chan@7 { | |
| label = "vph_pwr"; | |
| reg = <0x07>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x01>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x00>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| }; | |
| chan@8 { | |
| label = "die_temp"; | |
| reg = <0x08>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x03>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| }; | |
| chan@9 { | |
| label = "ref_625mv"; | |
| reg = <0x09>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x00>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| }; | |
| chan@a { | |
| label = "ref_1250v"; | |
| reg = <0x0a>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x00>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| }; | |
| chan@c { | |
| label = "ref_buf_625mv"; | |
| reg = <0x0c>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x00>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| }; | |
| chan@36 { | |
| label = "pa_therm0"; | |
| reg = <0x36>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x02>; | |
| qcom,hw-settle-time = <0x02>; | |
| qcom,fast-avg-setup = <0x00>; | |
| }; | |
| chan@11 { | |
| label = "chg_therm"; | |
| reg = <0x11>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x02>; | |
| qcom,hw-settle-time = <0x02>; | |
| qcom,fast-avg-setup = <0x00>; | |
| qcom,vadc-thermal-node; | |
| }; | |
| chan@32 { | |
| label = "xo_therm"; | |
| reg = <0x32>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x04>; | |
| qcom,hw-settle-time = <0x02>; | |
| qcom,fast-avg-setup = <0x00>; | |
| qcom,vadc-thermal-node; | |
| }; | |
| chan@3c { | |
| label = "xo_therm_buf"; | |
| reg = <0x3c>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x04>; | |
| qcom,hw-settle-time = <0x02>; | |
| qcom,fast-avg-setup = <0x00>; | |
| qcom,vadc-thermal-node; | |
| }; | |
| chan@13 { | |
| label = "msm_therm"; | |
| reg = <0x13>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x02>; | |
| qcom,hw-settle-time = <0x02>; | |
| qcom,fast-avg-setup = <0x00>; | |
| qcom,vadc-thermal-node; | |
| }; | |
| }; | |
| vadc@3400 { | |
| compatible = "qcom,qpnp-adc-tm"; | |
| reg = <0x3400 0x100>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| interrupts = <0x00 0x34 0x00 0x00 0x34 0x03 0x00 0x34 0x04>; | |
| interrupt-names = "eoc-int-en-set\0high-thr-en-set\0low-thr-en-set"; | |
| qcom,adc-bit-resolution = <0x0f>; | |
| qcom,adc-vdd-reference = <0x708>; | |
| qcom,adc_tm-vadc = <0x105>; | |
| linux,phandle = <0xe6>; | |
| phandle = <0xe6>; | |
| chan@36 { | |
| label = "pa_therm0"; | |
| reg = <0x36>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x02>; | |
| qcom,hw-settle-time = <0x02>; | |
| qcom,fast-avg-setup = <0x00>; | |
| qcom,btm-channel-number = <0x48>; | |
| qcom,thermal-node; | |
| }; | |
| chan@7 { | |
| label = "vph_pwr"; | |
| reg = <0x07>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x01>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x00>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| qcom,btm-channel-number = <0x68>; | |
| }; | |
| }; | |
| }; | |
| qcom,pmi8950@2 { | |
| spmi-slave-container; | |
| reg = <0x02>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| qcom,revid@100 { | |
| compatible = "qcom,qpnp-revid"; | |
| reg = <0x100 0x100>; | |
| linux,phandle = <0x106>; | |
| phandle = <0x106>; | |
| }; | |
| qcom,power-on@800 { | |
| compatible = "qcom,qpnp-power-on"; | |
| reg = <0x800 0x100>; | |
| qcom,secondary-pon-reset; | |
| qcom,hard-reset-poweroff-type = <0x04>; | |
| qcom,shipmode; | |
| qcom,pon_perph_reg { | |
| regulator-name = "pon_spare_reg"; | |
| qcom,pon-spare-reg-addr = <0x8c>; | |
| qcom,pon-spare-reg-bit = <0x01>; | |
| linux,phandle = <0x108>; | |
| phandle = <0x108>; | |
| }; | |
| }; | |
| vadc@3100 { | |
| compatible = "qcom,qpnp-vadc"; | |
| reg = <0x3100 0x100>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| interrupts = <0x02 0x31 0x00>; | |
| interrupt-names = "eoc-int-en-set"; | |
| qcom,adc-bit-resolution = <0x0f>; | |
| qcom,adc-vdd-reference = <0x708>; | |
| qcom,vadc-poll-eoc; | |
| linux,phandle = <0xe9>; | |
| phandle = <0xe9>; | |
| chan@0 { | |
| label = "usbin"; | |
| reg = <0x00>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x04>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x00>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| }; | |
| chan@1 { | |
| label = "dcin"; | |
| reg = <0x01>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x04>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x00>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| }; | |
| chan@3 { | |
| label = "vchg_sns"; | |
| reg = <0x03>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x01>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x00>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| }; | |
| chan@9 { | |
| label = "ref_625mv"; | |
| reg = <0x09>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x00>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| }; | |
| chan@a { | |
| label = "ref_1250v"; | |
| reg = <0x0a>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x00>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| }; | |
| chan@d { | |
| label = "chg_temp"; | |
| reg = <0x0d>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x10>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| qcom,vadc-thermal-node; | |
| }; | |
| chan@43 { | |
| label = "usb_dp"; | |
| reg = <0x43>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x01>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x00>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| }; | |
| chan@44 { | |
| label = "usb_dm"; | |
| reg = <0x44>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x01>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x00>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| }; | |
| chan@10 { | |
| label = "host_det"; | |
| reg = <0x10>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x01>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x00>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| }; | |
| }; | |
| gpios { | |
| spmi-dev-container; | |
| compatible = "qcom,qpnp-pin"; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| label = "pmi8950-gpio"; | |
| gpio@c000 { | |
| reg = <0xc000 0x100>; | |
| qcom,pin-num = <0x01>; | |
| status = "disabled"; | |
| }; | |
| gpio@c100 { | |
| reg = <0xc100 0x100>; | |
| qcom,pin-num = <0x02>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| mpps { | |
| spmi-dev-container; | |
| compatible = "qcom,qpnp-pin"; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| label = "pmi8950-mpp"; | |
| mpp@a000 { | |
| reg = <0xa000 0x100>; | |
| qcom,pin-num = <0x01>; | |
| status = "ok"; | |
| qcom,mode = <0x04>; | |
| qcom,ain-route = <0x00>; | |
| qcom,master-en = <0x01>; | |
| qcom,src-sel = <0x00>; | |
| }; | |
| mpp@a100 { | |
| reg = <0xa100 0x100>; | |
| qcom,pin-num = <0x02>; | |
| status = "disabled"; | |
| }; | |
| mpp@a200 { | |
| reg = <0xa200 0x100>; | |
| qcom,pin-num = <0x03>; | |
| status = "disabled"; | |
| }; | |
| mpp@a300 { | |
| reg = <0xa300 0x100>; | |
| qcom,pin-num = <0x04>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| qcom,qpnp-smbcharger { | |
| spmi-dev-container; | |
| compatible = "qcom,qpnp-smbcharger"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| qcom,float-voltage-mv = <0x1130>; | |
| qcom,resume-delta-mv = <0xc8>; | |
| qcom,chg-inhibit-fg; | |
| qcom,rparasitic-uohm = <0x186a0>; | |
| qcom,bms-psy-name = "bms"; | |
| qcom,thermal-mitigation = <0x5dc 0x2bc 0x258 0x00>; | |
| qcom,parallel-usb-min-current-ma = <0x578>; | |
| qcom,parallel-usb-9v-min-current-ma = <0x384>; | |
| qcom,parallel-allowed-lowering-ma = <0x1f4>; | |
| qcom,pmic-revid = <0x106>; | |
| qcom,force-aicl-rerun; | |
| qcom,aicl-rerun-period-s = <0xb4>; | |
| status = "okay"; | |
| qcom,iterm-disabled; | |
| qcom,usbid-disabled; | |
| qcom,fastchg-current-ma = <0x73a>; | |
| qcom,charge-unknown-battery; | |
| qcom,chg-thermal-mitigation = <0x73a 0x640 0x4b0 0x3e8 0x2bc 0x190>; | |
| qcom,parallel-charge-current-map = <0x73a 0x73a 0x00 0x640 0x640 0x00 0x4b0 0x4b0 0x00 0x3e8 0x3e8 0x00 0x2bc 0x2bc 0x00 0x190 0x190 0x00>; | |
| qcom,stepchg-voltage-mv = <0x1130>; | |
| qcom,stepchg-current-ma = <0x73a>; | |
| qcom,stepchg-taper-ma = <0x5dc>; | |
| qcom,stepchg-iterm-ma = <0x7d>; | |
| qcom,hot-temp-c = <0x3c>; | |
| qcom,cold-temp-c = <0xffffffec>; | |
| qcom,warm-temp-c = <0x2d>; | |
| qcom,cool-temp-c = <0x00>; | |
| qcom,ext-temp-volt-mv = <0x1068>; | |
| qcom,hotspot-thrs-c = <0x32>; | |
| qcom,charging-timeout-mins = <0x00>; | |
| qcom,precharging-timeout-mins = <0x00>; | |
| qcom,bmd-algo-disabled; | |
| qcom,bmd-pin-src = "bpd_none"; | |
| qcom,usbid-gpio-enabled; | |
| qcom,auto-voltage-comp-mv = <0x96>; | |
| qcom,chgr@1000 { | |
| reg = <0x1000 0x100>; | |
| interrupts = <0x02 0x10 0x00 0x02 0x10 0x01 0x02 0x10 0x02 0x02 0x10 0x03 0x02 0x10 0x04 0x02 0x10 0x05 0x02 0x10 0x06 0x02 0x10 0x07>; | |
| interrupt-names = "chg-error\0chg-inhibit\0chg-prechg-sft\0chg-complete-chg-sft\0chg-p2f-thr\0chg-rechg-thr\0chg-taper-thr\0chg-tcc-thr"; | |
| }; | |
| qcom,otg@1100 { | |
| reg = <0x1100 0x100>; | |
| interrupts = <0x02 0x11 0x00 0x02 0x11 0x01 0x02 0x11 0x03>; | |
| interrupt-names = "otg-fail\0otg-oc\0usbid-change"; | |
| }; | |
| qcom,bat-if@1200 { | |
| reg = <0x1200 0x100>; | |
| interrupts = <0x02 0x12 0x00 0x02 0x12 0x01 0x02 0x12 0x02 0x02 0x12 0x03 0x02 0x12 0x04 0x02 0x12 0x05 0x02 0x12 0x06 0x02 0x12 0x07>; | |
| interrupt-names = "batt-hot\0batt-warm\0batt-cold\0batt-cool\0batt-ov\0batt-low\0batt-missing\0batt-term-missing"; | |
| }; | |
| qcom,usb-chgpth@1300 { | |
| reg = <0x1300 0x100>; | |
| interrupts = <0x02 0x13 0x00 0x02 0x13 0x01 0x02 0x13 0x02 0x02 0x13 0x05>; | |
| interrupt-names = "usbin-uv\0usbin-ov\0usbin-src-det\0aicl-done"; | |
| }; | |
| qcom,dc-chgpth@1400 { | |
| reg = <0x1400 0x100>; | |
| interrupts = <0x02 0x14 0x00 0x02 0x14 0x01>; | |
| interrupt-names = "dcin-uv\0dcin-ov"; | |
| }; | |
| qcom,chgr-misc@1600 { | |
| reg = <0x1600 0x100>; | |
| interrupts = <0x02 0x16 0x00 0x02 0x16 0x01 0x02 0x16 0x02 0x02 0x16 0x03 0x02 0x16 0x04 0x02 0x16 0x05>; | |
| interrupt-names = "power-ok\0temp-shutdown\0wdog-timeout\0flash-fail\0otst2\0otst3"; | |
| }; | |
| qcom,smbcharger-boost-otg { | |
| regulator-name = "smbcharger_charger_otg"; | |
| linux,phandle = <0xe8>; | |
| phandle = <0xe8>; | |
| }; | |
| }; | |
| qcom,fg { | |
| spmi-dev-container; | |
| compatible = "qcom,qpnp-fg"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| qcom,resume-soc = <0x63>; | |
| status = "okay"; | |
| qcom,bcl-lm-threshold-ma = <0x7e>; | |
| qcom,bcl-mh-threshold-ma = <0x190>; | |
| qcom,fg-iterm-ma = <0x96>; | |
| qcom,fg-chg-iterm-ma = <0x64>; | |
| qcom,pmic-revid = <0x106>; | |
| qcom,fg-cutoff-voltage-mv = <0xc80>; | |
| qcom,cycle-counter-en; | |
| qcom,capacity-learning-on; | |
| qcom,warm-bat-decidegc = <0x1c2>; | |
| qcom,cool-bat-decidegc = <0x00>; | |
| qcom,hot-bat-decidegc = <0x258>; | |
| qcom,cold-bat-decidegc = <0xffffff38>; | |
| qcom,thermal-coefficients = [2d 87 91 51 7d 3c]; | |
| qcom,irq-volt-empty-mv = <0xbb8>; | |
| qcom,fg-vbat-estimate-diff-mv = <0x3e8>; | |
| qcom,fg-delta-soc = <0x01>; | |
| qcom,fg-max-soc = <0x64>; | |
| qcom,fg-min-soc = <0x00>; | |
| qcom,fg-cc-cv-threshold-mv = <0x1126>; | |
| qcom,battery-data = <0x107>; | |
| qcom,ext-sense-type; | |
| qcom,fg-soc@4000 { | |
| status = "okay"; | |
| reg = <0x4000 0x100>; | |
| interrupts = <0x02 0x40 0x00 0x02 0x40 0x01 0x02 0x40 0x02 0x02 0x40 0x03 0x02 0x40 0x04 0x02 0x40 0x05 0x02 0x40 0x06>; | |
| interrupt-names = "high-soc\0low-soc\0full-soc\0empty-soc\0delta-soc\0first-est-done\0update-soc"; | |
| }; | |
| qcom,fg-batt@4100 { | |
| reg = <0x4100 0x100>; | |
| interrupts = <0x02 0x41 0x00 0x02 0x41 0x01 0x02 0x41 0x02 0x02 0x41 0x03 0x02 0x41 0x04 0x02 0x41 0x05 0x02 0x41 0x06 0x02 0x41 0x07>; | |
| interrupt-names = "soft-cold\0soft-hot\0vbatt-low\0batt-ided\0batt-id-req\0batt-unknown\0batt-missing\0batt-match"; | |
| }; | |
| qcom,revid-tp-rev@1f1 { | |
| reg = <0x1f1 0x01>; | |
| }; | |
| qcom,fg-memif@4400 { | |
| status = "okay"; | |
| reg = <0x4400 0x100>; | |
| interrupts = <0x02 0x44 0x00 0x02 0x44 0x02>; | |
| interrupt-names = "mem-avail\0data-rcvry-sug"; | |
| }; | |
| }; | |
| bcl@4200 { | |
| compatible = "qcom,msm-bcl"; | |
| reg = <0x4200 0xff 0x88e 0x02>; | |
| reg-names = "fg_user_adc\0pon_spare"; | |
| interrupts = <0x02 0x42 0x00 0x02 0x42 0x01>; | |
| interrupt-names = "bcl-high-ibat-int\0bcl-low-vbat-int"; | |
| qcom,vbat-scaling-factor = <0x9858>; | |
| qcom,vbat-gain-numerator = <0x01>; | |
| qcom,vbat-gain-denominator = <0x80>; | |
| qcom,vbat-polling-delay-ms = <0x64>; | |
| qcom,ibat-scaling-factor = <0x9858>; | |
| qcom,ibat-gain-numerator = <0x01>; | |
| qcom,ibat-gain-denominator = <0x80>; | |
| qcom,ibat-offset-numerator = <0x4b0>; | |
| qcom,ibat-offset-denominator = <0x01>; | |
| qcom,ibat-polling-delay-ms = <0x64>; | |
| qcom,inhibit-derating-ua = <0x86470>; | |
| }; | |
| qcom,leds@1000 { | |
| status = "ok"; | |
| reg = <0x1000 0x100>; | |
| compatible = "qcom,leds-atc"; | |
| linux,name = "charging"; | |
| qcom,ctrl-reg = <0x243>; | |
| }; | |
| }; | |
| qcom,pmi8950@3 { | |
| spmi-slave-container; | |
| reg = <0x03>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| pwm@b000 { | |
| status = "disabled"; | |
| compatible = "qcom,qpnp-pwm"; | |
| reg = <0xb000 0x100>; | |
| reg-names = "qpnp-lpg-channel-base"; | |
| qcom,channel-id = <0x00>; | |
| qcom,supported-sizes = <0x06 0x09>; | |
| #pwm-cells = <0x02>; | |
| }; | |
| qpnp-labibb-regulator { | |
| status = "ok"; | |
| spmi-dev-container; | |
| compatible = "qcom,qpnp-labibb-regulator"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| qcom,pmic-revid = <0x106>; | |
| qpnp,qpnp-labibb-mode = "lcd"; | |
| qcom,ibb@dc00 { | |
| reg = <0xdc00 0x100>; | |
| reg-names = "ibb_reg"; | |
| regulator-name = "ibb_reg"; | |
| regulator-min-microvolt = <0x4630c0>; | |
| regulator-max-microvolt = <0x5b8d80>; | |
| qcom,qpnp-ibb-min-voltage = <0x155cc0>; | |
| qcom,qpnp-ibb-step-size = <0x186a0>; | |
| qcom,qpnp-ibb-slew-rate = <0x1e8480>; | |
| qcom,qpnp-ibb-use-default-voltage; | |
| qcom,qpnp-ibb-init-voltage = <0x53ec60>; | |
| qcom,qpnp-ibb-init-amoled-voltage = "\0=\t"; | |
| qcom,qpnp-ibb-init-lcd-voltage = <0x53ec60>; | |
| qcom,qpnp-ibb-soft-start = <0x3e8>; | |
| qcom,qpnp-ibb-discharge-resistor = <0x20>; | |
| qcom,qpnp-ibb-lab-pwrup-delay = <0x1f40>; | |
| qcom,qpnp-ibb-lab-pwrdn-delay = <0x1f40>; | |
| qcom,qpnp-ibb-en-discharge; | |
| qcom,qpnp-ibb-full-pull-down; | |
| qcom,qpnp-ibb-pull-down-enable; | |
| qcom,qpnp-ibb-switching-clock-frequency = <0x5c8>; | |
| qcom,qpnp-ibb-limit-maximum-current = <0x60e>; | |
| qcom,qpnp-ibb-debounce-cycle = <0x10>; | |
| qcom,qpnp-ibb-limit-max-current-enable; | |
| qcom,qpnp-ibb-ps-enable; | |
| linux,phandle = <0x168>; | |
| phandle = <0x168>; | |
| }; | |
| qcom,lab@de00 { | |
| reg = <0xde00 0x100>; | |
| reg-names = "lab"; | |
| regulator-name = "lab_reg"; | |
| regulator-min-microvolt = <0x4630c0>; | |
| regulator-max-microvolt = <0x5b8d80>; | |
| qcom,qpnp-lab-min-voltage = <0x4630c0>; | |
| qcom,qpnp-lab-step-size = <0x186a0>; | |
| qcom,qpnp-lab-slew-rate = <0x1388>; | |
| qcom,qpnp-lab-use-default-voltage; | |
| qcom,qpnp-lab-init-voltage = <0x53ec60>; | |
| qcom,qpnp-lab-init-amoled-voltage = <0x4630c0>; | |
| qcom,qpnp-lab-init-lcd-voltage = <0x53ec60>; | |
| qcom,qpnp-lab-soft-start = <0x320>; | |
| qcom,qpnp-lab-full-pull-down; | |
| qcom,qpnp-lab-pull-down-enable; | |
| qcom,qpnp-lab-switching-clock-frequency = <0x640>; | |
| qcom,qpnp-lab-limit-maximum-current = <0x320>; | |
| qcom,qpnp-lab-limit-max-current-enable; | |
| qcom,qpnp-lab-ps-threshold = <0x28>; | |
| qcom,qpnp-lab-ps-enable; | |
| qcom,qpnp-lab-nfet-size = <0x64>; | |
| qcom,qpnp-lab-pfet-size = <0x64>; | |
| qcom,qpnp-lab-max-precharge-time = <0x1f4>; | |
| linux,phandle = <0x167>; | |
| phandle = <0x167>; | |
| }; | |
| }; | |
| qcom,leds@d800 { | |
| compatible = "qcom,qpnp-wled"; | |
| reg = <0xd800 0x100 0xd900 0x100 0xdc00 0x100 0xde00 0x100>; | |
| reg-names = "qpnp-wled-ctrl-base\0qpnp-wled-sink-base\0qpnp-wled-ibb-base\0qpnp-wled-lab-base"; | |
| interrupts = <0x03 0xd8 0x02>; | |
| interrupt-names = "sc-irq"; | |
| status = "okay"; | |
| linux,name = "wled"; | |
| linux,default-trigger = "bkl-trigger"; | |
| qcom,fdbk-output = "auto"; | |
| qcom,vref-mv = <0x15e>; | |
| qcom,switch-freq-khz = <0x320>; | |
| qcom,ovp-mv = <0x733c>; | |
| qcom,ilim-ma = <0x3d4>; | |
| qcom,boost-duty-ns = <0x1a>; | |
| qcom,mod-freq-khz = <0x2580>; | |
| qcom,dim-mode = "hybrid"; | |
| qcom,dim-method = "linear"; | |
| qcom,hyb-thres = <0x271>; | |
| qcom,sync-dly-us = <0x320>; | |
| qcom,fs-curr-ua = <0x61a8>; | |
| qcom,led-strings-list = [00 01]; | |
| qcom,en-ext-pfet-sc-pro; | |
| qcom,cons-sync-write-delay-us = <0x3e8>; | |
| qcom,en-cabc; | |
| }; | |
| qcom,leds@d300 { | |
| compatible = "qcom,qpnp-flash-led"; | |
| status = "okay"; | |
| reg = <0xd300 0x100>; | |
| label = "flash"; | |
| qcom,headroom = <0x1f4>; | |
| qcom,startup-dly = <0x80>; | |
| qcom,clamp-current = <0xc8>; | |
| qcom,pmic-charger-support; | |
| qcom,self-check-enabled; | |
| qcom,thermal-derate-enabled; | |
| qcom,thermal-derate-threshold = <0x64>; | |
| qcom,thermal-derate-rate = "5_PERCENT"; | |
| qcom,current-ramp-enabled; | |
| qcom,ramp_up_step = "6P7_US"; | |
| qcom,ramp_dn_step = "6P7_US"; | |
| qcom,vph-pwr-droop-enabled; | |
| qcom,vph-pwr-droop-threshold = <0xbb8>; | |
| qcom,vph-pwr-droop-debounce-time = <0x0a>; | |
| qcom,headroom-sense-ch0-enabled; | |
| qcom,headroom-sense-ch1-enabled; | |
| qcom,pmic-revid = <0x106>; | |
| qcom,flash_0 { | |
| label = "flash"; | |
| qcom,led-name = "led:flash_0"; | |
| qcom,default-led-trigger = "flash0_trigger"; | |
| qcom,max-current = <0x3e8>; | |
| qcom,duration = <0x500>; | |
| qcom,id = <0x00>; | |
| qcom,current = <0x271>; | |
| linux,phandle = <0x17d>; | |
| phandle = <0x17d>; | |
| }; | |
| qcom,flash_1 { | |
| label = "flash"; | |
| qcom,led-name = "led:flash_1"; | |
| qcom,default-led-trigger = "flash1_trigger"; | |
| qcom,max-current = <0x3e8>; | |
| qcom,duration = <0x500>; | |
| qcom,id = <0x01>; | |
| qcom,current = <0x271>; | |
| linux,phandle = <0x17e>; | |
| phandle = <0x17e>; | |
| }; | |
| qcom,torch_0 { | |
| label = "torch"; | |
| qcom,led-name = "led:torch_0"; | |
| qcom,default-led-trigger = "torch0_trigger"; | |
| qcom,max-current = <0xc8>; | |
| qcom,id = <0x00>; | |
| qcom,current = <0x78>; | |
| linux,phandle = <0x17f>; | |
| phandle = <0x17f>; | |
| }; | |
| qcom,torch_1 { | |
| label = "torch"; | |
| qcom,led-name = "led:torch_1"; | |
| qcom,default-led-trigger = "torch1_trigger"; | |
| qcom,max-current = <0xc8>; | |
| qcom,id = <0x01>; | |
| qcom,current = <0x78>; | |
| linux,phandle = <0x180>; | |
| phandle = <0x180>; | |
| }; | |
| qcom,switch { | |
| label = "switch"; | |
| qcom,led-name = "led:switch"; | |
| qcom,default-led-trigger = "switch_trigger"; | |
| qcom,max-current = <0x3e8>; | |
| qcom,duration = <0x500>; | |
| qcom,id = <0x02>; | |
| qcom,current = <0x271>; | |
| linux,phandle = <0x181>; | |
| phandle = <0x181>; | |
| reg0 { | |
| regulator-name = "pon_spare_reg"; | |
| }; | |
| }; | |
| }; | |
| qcom,haptic@c000 { | |
| compatible = "qcom,qpnp-haptic"; | |
| reg = <0xc000 0x100>; | |
| interrupts = <0x03 0xc0 0x00 0x03 0xc0 0x01>; | |
| interrupt-names = "sc-irq\0play-irq"; | |
| qcom,pmic-revid = <0x106>; | |
| vcc_pon-supply = <0x108>; | |
| qcom,play-mode = "direct"; | |
| qcom,wave-play-rate-us = <0x148f>; | |
| qcom,actuator-type = "erm"; | |
| qcom,wave-shape = "square"; | |
| qcom,vmax-mv = <0xa8c>; | |
| qcom,ilim-ma = <0x320>; | |
| qcom,sc-deb-cycles = <0x08>; | |
| qcom,int-pwm-freq-khz = <0x1f9>; | |
| qcom,en-brake; | |
| qcom,brake-pattern = <0x3030000>; | |
| qcom,use-play-irq; | |
| qcom,use-sc-irq; | |
| qcom,wave-samples = <0x3e3e3e3e 0x3e3e3e3e>; | |
| qcom,wave-rep-cnt = <0x01>; | |
| qcom,wave-samp-rep-cnt = <0x01>; | |
| }; | |
| }; | |
| }; | |
| qcom,inrush-current { | |
| compatible = "qcom,msm-inrush-current-mitigation"; | |
| qcom,dependent-subsystems = "modem\0adsp"; | |
| vdd-supply = <0x109>; | |
| }; | |
| qcom,mss@4080000 { | |
| compatible = "qcom,pil-q6v55-mss"; | |
| reg = <0x4080000 0x100 0x194f000 0x10 0x1950000 0x08 0x1951000 0x08 0x4020000 0x40 0x1871000 0x04>; | |
| reg-names = "qdsp6_base\0halt_q6\0halt_modem\0halt_nc\0rmb_base\0restart_reg"; | |
| interrupts = <0x00 0x18 0x01>; | |
| vdd_mss-supply = <0x10a>; | |
| vdd_cx-supply = <0xd2>; | |
| vdd_cx-voltage = <0x180>; | |
| vdd_mx-supply = <0xde>; | |
| vdd_mx-uV = <0x180>; | |
| vdd_pll-supply = <0xdf>; | |
| qcom,vdd_pll = <0x1b7740>; | |
| clocks = <0x2b 0xe97a8354 0x2b 0x111cde81 0x2b 0x67544d62 0x2b 0xde2adeb1>; | |
| clock-names = "xo\0iface_clk\0bus_clk\0mem_clk"; | |
| qcom,proxy-clock-names = "xo"; | |
| qcom,active-clock-names = "iface_clk\0bus_clk\0mem_clk"; | |
| qcom,pas-id = <0x05>; | |
| qcom,pil-mss-memsetup; | |
| qcom,firmware-name = "modem"; | |
| qcom,pil-self-auth; | |
| qcom,override-acc-1 = <0x80800000>; | |
| qcom,sysmon-id = <0x00>; | |
| qcom,ssctl-instance-id = <0x12>; | |
| qcom,qdsp6v56-1-8-inrush-current; | |
| qcom,gpio-err-fatal = <0x10b 0x00 0x00>; | |
| qcom,gpio-err-ready = <0x10b 0x01 0x00>; | |
| qcom,gpio-proxy-unvote = <0x10b 0x02 0x00>; | |
| qcom,gpio-stop-ack = <0x10b 0x03 0x00>; | |
| qcom,gpio-shutdown-ack = <0x10b 0x07 0x00>; | |
| qcom,gpio-force-stop = <0x10c 0x00 0x00>; | |
| memory-region = <0x10d>; | |
| }; | |
| qcom,memshare { | |
| compatible = "qcom,memshare"; | |
| qcom,client_1 { | |
| compatible = "qcom,memshare-peripheral"; | |
| qcom,peripheral-size = <0x200000>; | |
| qcom,client-id = <0x00>; | |
| qcom,allocate-boot-time; | |
| label = "modem"; | |
| }; | |
| qcom,client_2 { | |
| compatible = "qcom,memshare-peripheral"; | |
| qcom,peripheral-size = <0x300000>; | |
| qcom,client-id = <0x02>; | |
| label = "modem"; | |
| }; | |
| qcom,client_3 { | |
| compatible = "qcom,memshare-peripheral"; | |
| qcom,peripheral-size = <0x00>; | |
| qcom,client-id = <0x01>; | |
| label = "modem"; | |
| }; | |
| }; | |
| qcom,lpass@c200000 { | |
| compatible = "qcom,pil-tz-generic"; | |
| reg = <0xc200000 0x100>; | |
| interrupts = <0x00 0x125 0x01>; | |
| vdd_cx-supply = <0xd2>; | |
| qcom,proxy-reg-names = "vdd_cx"; | |
| qcom,vdd_cx-uV-uA = <0x180 0x186a0>; | |
| clocks = <0x2b 0xb72aa4c9 0x2b 0xd390d2 0x2b 0x94de4919 0x2b 0xd4415c9b 0x2b 0x37a21414>; | |
| clock-names = "xo\0scm_core_clk\0scm_iface_clk\0scm_bus_clk\0scm_core_clk_src"; | |
| qcom,proxy-clock-names = "xo\0scm_core_clk\0scm_iface_clk\0scm_bus_clk\0scm_core_clk_src"; | |
| qcom,scm_core_clk_src-freq = <0x4c4b400>; | |
| qcom,pas-id = <0x01>; | |
| qcom,proxy-timeout-ms = <0x2710>; | |
| qcom,smem-id = <0x1a7>; | |
| qcom,sysmon-id = <0x01>; | |
| qcom,ssctl-instance-id = <0x14>; | |
| qcom,firmware-name = "adsp"; | |
| qcom,gpio-err-fatal = <0x10e 0x00 0x00>; | |
| qcom,gpio-proxy-unvote = <0x10e 0x02 0x00>; | |
| qcom,gpio-err-ready = <0x10e 0x01 0x00>; | |
| qcom,gpio-stop-ack = <0x10e 0x03 0x00>; | |
| qcom,gpio-force-stop = <0x10f 0x00 0x00>; | |
| memory-region = <0x110>; | |
| }; | |
| qcom,pronto@a21b000 { | |
| compatible = "qcom,pil-tz-generic"; | |
| reg = <0xa21b000 0x3000>; | |
| interrupts = <0x00 0x95 0x01>; | |
| vdd_pronto_pll-supply = <0xdf>; | |
| proxy-reg-names = "vdd_pronto_pll"; | |
| vdd_pronto_pll-uV-uA = <0x1b7740 0x4650>; | |
| clocks = <0x2b 0x89dae6d0 0x2b 0xd390d2 0x2b 0x94de4919 0x2b 0xd4415c9b 0x2b 0x37a21414>; | |
| clock-names = "xo\0scm_core_clk\0scm_iface_clk\0scm_bus_clk\0scm_core_clk_src"; | |
| qcom,proxy-clock-names = "xo\0scm_core_clk\0scm_iface_clk\0scm_bus_clk\0scm_core_clk_src"; | |
| qcom,scm_core_clk_src = <0x4c4b400>; | |
| qcom,pas-id = <0x06>; | |
| qcom,proxy-timeout-ms = <0x2710>; | |
| qcom,smem-id = <0x1a6>; | |
| qcom,sysmon-id = <0x06>; | |
| qcom,ssctl-instance-id = <0x13>; | |
| qcom,firmware-name = "wcnss"; | |
| qcom,gpio-err-fatal = <0x111 0x00 0x00>; | |
| qcom,gpio-err-ready = <0x111 0x01 0x00>; | |
| qcom,gpio-proxy-unvote = <0x111 0x02 0x00>; | |
| qcom,gpio-stop-ack = <0x111 0x03 0x00>; | |
| qcom,gpio-force-stop = <0x112 0x00 0x00>; | |
| memory-region = <0x113>; | |
| }; | |
| qcom,venus@1de0000 { | |
| compatible = "qcom,pil-tz-generic"; | |
| reg = <0x1de0000 0x4000>; | |
| vdd-supply = <0xac>; | |
| qcom,proxy-reg-names = "vdd"; | |
| clocks = <0x2b 0xf76a02bb 0x2b 0x8d778c6 0x2b 0xcdf4c8f6 0x2b 0xd390d2 0x2b 0x94de4919 0x2b 0xd4415c9b 0x2b 0x37a21414>; | |
| clock-names = "core_clk\0iface_clk\0bus_clk\0scm_core_clk\0scm_iface_clk\0scm_bus_clk\0scm_core_clk_src"; | |
| qcom,proxy-clock-names = "core_clk\0iface_clk\0bus_clk\0scm_core_clk\0scm_iface_clk\0scm_bus_clk\0scm_core_clk_src"; | |
| qcom,scm_core_clk_src-freq = <0x4c4b400>; | |
| qcom,msm-bus,name = "pil-venus"; | |
| qcom,msm-bus,num-cases = <0x02>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x3f 0x200 0x00 0x00 0x3f 0x200 0x00 0x4a380>; | |
| qcom,pas-id = <0x09>; | |
| qcom,proxy-timeout-ms = <0x64>; | |
| qcom,firmware-name = "venus"; | |
| memory-region = <0x114>; | |
| }; | |
| qcom,msm-ssc-sensors { | |
| compatible = "qcom,msm-ssc-sensors"; | |
| }; | |
| regulator@01946004 { | |
| compatible = "qcom,mem-acc-regulator"; | |
| regulator-name = "mem_acc_corner"; | |
| regulator-min-microvolt = <0x01>; | |
| regulator-max-microvolt = <0x03>; | |
| qcom,acc-reg-addr-list = <0x1942138 0x1942130 0x1942120 0x1942124 0x1946000 0x1946004>; | |
| qcom,acc-init-reg-config = <0x01 0xff 0x02 0x5555 0x06 0x55>; | |
| qcom,num-acc-corners = <0x03>; | |
| qcom,boot-acc-corner = <0x02>; | |
| qcom,corner1-reg-config = <0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x03 0x1041041 0x04 0x1041 0x05 0x2020202 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x03 0x1041041 0x04 0x1041 0x05 0x2020202 0x03 0x00 0x04 0x00 0x05 0x00>; | |
| qcom,corner2-reg-config = <0x03 0x30c30c3 0x04 0x30c3 0x05 0x6060606 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x03 0x00 0x04 0x00 0x05 0x00>; | |
| qcom,corner3-reg-config = <0x03 0x1041041 0x04 0x1041 0x05 0x2020202 0x03 0x30c30c3 0x04 0x30c3 0x05 0x6060606 0x03 0x1041041 0x04 0x1041 0x05 0x2020202 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff>; | |
| linux,phandle = <0x116>; | |
| phandle = <0x116>; | |
| }; | |
| regulator@b018000 { | |
| compatible = "qcom,cpr-regulator"; | |
| reg = <0xb018000 0x1000 0xb011064 0x04 0xa4000 0x1000>; | |
| reg-names = "rbcpr\0rbcpr_clk\0efuse_addr"; | |
| interrupts = <0x00 0x0f 0x00>; | |
| regulator-name = "apc_corner"; | |
| regulator-min-microvolt = <0x01>; | |
| regulator-max-microvolt = <0x07>; | |
| qcom,cpr-fuse-corners = <0x03>; | |
| qcom,cpr-voltage-ceiling = <0x119fb8 0x12b128 0x149970>; | |
| qcom,cpr-voltage-floor = <0x100590 0x100590 0x10a1d0>; | |
| vdd-apc-supply = <0x115>; | |
| mem-acc-supply = <0x116>; | |
| qcom,cpr-ref-clk = <0x4b00>; | |
| qcom,cpr-timer-delay = <0x1388>; | |
| qcom,cpr-timer-cons-up = <0x00>; | |
| qcom,cpr-timer-cons-down = <0x02>; | |
| qcom,cpr-irq-line = <0x00>; | |
| qcom,cpr-step-quotient = <0x0a>; | |
| qcom,cpr-up-threshold = <0x02>; | |
| qcom,cpr-down-threshold = <0x04>; | |
| qcom,cpr-idle-clocks = <0x0f>; | |
| qcom,cpr-gcnt-time = <0x01>; | |
| qcom,vdd-apc-step-up-limit = <0x01>; | |
| qcom,vdd-apc-step-down-limit = <0x01>; | |
| qcom,cpr-apc-volt-step = <0x1388>; | |
| qcom,cpr-fuse-row = <0x43 0x00>; | |
| qcom,cpr-fuse-target-quot = <0x2a 0x18 0x06>; | |
| qcom,cpr-fuse-ro-sel = <0x3c 0x39 0x36>; | |
| qcom,cpr-init-voltage-ref = <0x119fb8 0x12b128 0x149970>; | |
| qcom,cpr-fuse-init-voltage = <0x43 0x24 0x06 0x00 0x43 0x12 0x06 0x00 0x43 0x00 0x06 0x00>; | |
| qcom,cpr-fuse-quot-offset = <0x47 0x1a 0x06 0x00 0x47 0x14 0x06 0x00 0x46 0x36 0x07 0x00>; | |
| qcom,cpr-fuse-quot-offset-scale = <0x05 0x05 0x05>; | |
| qcom,cpr-init-voltage-step = <0x2710>; | |
| qcom,cpr-corner-map = <0x01 0x02 0x03 0x03 0x03 0x03 0x03>; | |
| qcom,cpr-corner-frequency-map = <0x01 0x39387000 0x02 0x413b3800 0x03 0x48190800 0x04 0x4a62f800 0x05 0x501bd000 0x06 0x53819040 0x07 0x59439000>; | |
| qcom,speed-bin-fuse-sel = <0x25 0x22 0x03 0x00>; | |
| qcom,cpr-speed-bin-max-corners = <0x00 0x00 0x01 0x02 0x06 0x01 0x00 0x01 0x02 0x07 0x02 0x00 0x01 0x02 0x03>; | |
| qcom,cpr-fuse-revision = <0x45 0x27 0x03 0x00>; | |
| qcom,cpr-quot-adjust-scaling-factor-max = <0x00 0x578 0x578>; | |
| qcom,cpr-voltage-scaling-factor-max = <0x00 0x7d0 0x7d0>; | |
| qcom,cpr-scaled-init-voltage-as-ceiling; | |
| qcom,cpr-fuse-version-map = <0x00 0xffffffff 0x01 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x02 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x03 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff>; | |
| qcom,cpr-quotient-adjustment = <0xffffffec 0xffffffd8 0xffffffec 0x00 0xffffffd8 0x14 0x00 0x00 0x14 0x00 0x00 0x00>; | |
| qcom,cpr-init-voltage-adjustment = <0x00 0x00 0x00 0x2710 0x3a98 0x4e20 0x00 0x00 0x00 0x00 0x00 0x00>; | |
| qcom,cpr-enable; | |
| qcom,cpr-virtual-corner-init-voltage-adjustment = <0xc350 0xc350 0xc350 0xc350 0xc350 0x124f8 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0x124f8 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0x124f8 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0x124f8 0xc350>; | |
| qcom,cpr-virtual-corner-quotient-adjustment = <0x64 0x64 0x64 0x64 0x64 0x96 0x64 0x64 0x64 0x64 0x64 0x64 0x96 0x64 0x64 0x64 0x64 0x64 0x64 0x96 0x64 0x64 0x64 0x64 0x64 0x64 0x96 0x64>; | |
| linux,phandle = <0xd7>; | |
| phandle = <0xd7>; | |
| }; | |
| eldo2 { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "eldo2_pm8937"; | |
| startup-delay-us = <0x00>; | |
| enable-active-high; | |
| gpio = <0x117 0x07 0x00>; | |
| regulator-always-on; | |
| linux,phandle = <0xb5>; | |
| phandle = <0xb5>; | |
| }; | |
| adv_vreg { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "adv_vreg"; | |
| startup-delay-us = <0x190>; | |
| enable-active-high; | |
| gpio = <0x117 0x08 0x00>; | |
| }; | |
| qcom,gdsc@184c018 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_venus"; | |
| reg = <0x184c018 0x04>; | |
| status = "okay"; | |
| clock-names = "bus_clk\0core_clk"; | |
| clocks = <0x2b 0xcdf4c8f6 0x2b 0xf76a02bb>; | |
| linux,phandle = <0xac>; | |
| phandle = <0xac>; | |
| }; | |
| qcom,gdsc@184d078 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_mdss"; | |
| reg = <0x184d078 0x04>; | |
| status = "okay"; | |
| clock-names = "core_clk\0bus_clk"; | |
| clocks = <0x2b 0x22f3521f 0x2b 0x668f51de>; | |
| qcom,disallow-clear; | |
| linux,phandle = <0x109>; | |
| phandle = <0x109>; | |
| }; | |
| qcom,gdsc@185701c { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_jpeg"; | |
| reg = <0x185701c 0x04>; | |
| status = "okay"; | |
| clock-names = "core_clk\0bus_clk"; | |
| clocks = <0x2b 0x1ed3f032 0x2b 0x3e278896>; | |
| linux,phandle = <0x11b>; | |
| phandle = <0x11b>; | |
| }; | |
| qcom,gdsc@1858034 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_vfe"; | |
| reg = <0x1858034 0x04>; | |
| status = "okay"; | |
| clock-names = "core_clk\0bus_clk\0micro_clk\0csi_clk"; | |
| clocks = <0x2b 0xaaa3cd97 0x2b 0x77fe2384 0x2b 0xfbbee8cf 0x2b 0xcc73453c>; | |
| linux,phandle = <0x118>; | |
| phandle = <0x118>; | |
| }; | |
| qcom,gdsc@185806c { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_vfe1"; | |
| reg = <0x185806c 0x04>; | |
| status = "okay"; | |
| clock-names = "core_clk\0bus_clk\0micro_clk\0csi_clk"; | |
| clocks = <0x2b 0xcaf20d99 0x2b 0xaf7463b3 0x2b 0xfbbee8cf 0x2b 0xb1ef6e8b>; | |
| linux,phandle = <0x119>; | |
| phandle = <0x119>; | |
| }; | |
| qcom,gdsc@1858078 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_cpp"; | |
| reg = <0x1858078 0x04>; | |
| status = "okay"; | |
| clock-names = "core_clk\0bus_clk"; | |
| clocks = <0x2b 0x7118a0de 0x2b 0xbbf73861>; | |
| linux,phandle = <0x11c>; | |
| phandle = <0x11c>; | |
| }; | |
| qcom,gdsc@185901c { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_oxili_gx"; | |
| reg = <0x185901c 0x04>; | |
| status = "okay"; | |
| clock-names = "core_root_clk"; | |
| clocks = <0x2b 0x917f76ef>; | |
| qcom,enable-root-clk; | |
| qcom,clk-dis-wait-val = <0x05>; | |
| linux,phandle = <0x2e>; | |
| phandle = <0x2e>; | |
| }; | |
| qcom,gdsc@184c028 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_venus_core0"; | |
| reg = <0x184c028 0x04>; | |
| status = "okay"; | |
| qcom,support-hw-trigger; | |
| clock-names = "core0_clk"; | |
| clocks = <0x2b 0x83a7f549>; | |
| linux,phandle = <0xad>; | |
| phandle = <0xad>; | |
| }; | |
| qcom,gdsc@184c030 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_venus_core1"; | |
| reg = <0x184c030 0x04>; | |
| status = "disabled"; | |
| }; | |
| qcom,gdsc@185904c { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_oxili_cx"; | |
| reg = <0x1859044 0x04>; | |
| status = "okay"; | |
| clock-names = "core_clk"; | |
| clocks = <0x2b 0x49a51fd9>; | |
| linux,phandle = <0x2d>; | |
| phandle = <0x2d>; | |
| }; | |
| qcom,gdsc@183f078 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_usb30"; | |
| reg = <0x183f078 0x04>; | |
| status = "disabled"; | |
| }; | |
| qcom,msm-cam@1b00000 { | |
| compatible = "qcom,msm-cam"; | |
| reg = <0x1b00000 0x40000>; | |
| reg-names = "msm-cam"; | |
| status = "ok"; | |
| bus-vectors = "suspend\0svs\0nominal\0turbo"; | |
| qcom,bus-votes = <0x00 0x9896800 0x1312d000 0x1312d000>; | |
| }; | |
| qcom,csiphy@1b34000 { | |
| status = "ok"; | |
| cell-index = <0x00>; | |
| compatible = "qcom,csiphy-v3.4.2\0qcom,csiphy"; | |
| reg = <0x1b34000 0x1000 0x1b00030 0x04>; | |
| reg-names = "csiphy\0csiphy_clk_mux"; | |
| interrupts = <0x00 0x4e 0x00>; | |
| interrupt-names = "csiphy"; | |
| clocks = <0x2b 0x4e814a78 0x2b 0x3c0a858f 0x2b 0xc8a309be 0x2b 0xf8897589 0x2b 0xf92304fb 0x2b 0x9894b414>; | |
| clock-names = "camss_top_ahb_clk\0ispif_ahb_clk\0csiphy_timer_src_clk\0csiphy_timer_clk\0camss_ahb_src\0camss_ahb_clk"; | |
| qcom,clock-rates = <0x00 0x3ab06a0 0xbebc200 0x00 0x00 0x00>; | |
| }; | |
| qcom,csiphy@1b35000 { | |
| status = "ok"; | |
| cell-index = <0x01>; | |
| compatible = "qcom,csiphy-v3.4.2\0qcom,csiphy"; | |
| reg = <0x1b35000 0x1000 0x1b00038 0x04>; | |
| reg-names = "csiphy\0csiphy_clk_mux"; | |
| interrupts = <0x00 0x4f 0x00>; | |
| interrupt-names = "csiphy"; | |
| clocks = <0x2b 0x4e814a78 0x2b 0x3c0a858f 0x2b 0x7c0fe23a 0x2b 0x4d26438f 0x2b 0xf92304fb 0x2b 0x9894b414>; | |
| clock-names = "camss_top_ahb_clk\0ispif_ahb_clk\0csiphy_timer_src_clk\0csiphy_timer_clk\0camss_ahb_src\0camss_ahb_clk"; | |
| qcom,clock-rates = <0x00 0x3ab06a0 0xbebc200 0x00 0x00 0x00>; | |
| }; | |
| qcom,csid@1b30000 { | |
| status = "ok"; | |
| cell-index = <0x00>; | |
| compatible = "qcom,csid-v3.4.2\0qcom,csid"; | |
| reg = <0x1b30000 0x400>; | |
| reg-names = "csid"; | |
| interrupts = <0x00 0x33 0x00>; | |
| interrupt-names = "csid"; | |
| qcom,csi-vdd-voltage = <0x124f80>; | |
| qcom,mipi-csi-vdd-supply = <0xe7>; | |
| clocks = <0x2b 0x4e814a78 0x2b 0x3c0a858f 0x2b 0x175d672a 0x2b 0x227e65bc 0x2b 0x6a41ff7 0x2b 0x6b01b3e1 0x2b 0x61a8a930 0x2b 0x7053c7ae 0x2b 0x9894b414>; | |
| clock-names = "camss_top_ahb_clk\0ispif_ahb_clk\0csi_ahb_clk\0csi_src_clk\0csi0_phy_clk\0csi_clk\0csi_pix_clk\0csi_rdi_clk\0camss_ahb_clk"; | |
| qcom,clock-rates = <0x00 0x3ab06a0 0x00 0xbebc200 0x00 0x00 0x00 0x00 0x00>; | |
| }; | |
| qcom,csid@1b30400 { | |
| status = "ok"; | |
| cell-index = <0x01>; | |
| compatible = "qcom,csid-v3.4.2\0qcom,csid"; | |
| reg = <0x1b30400 0x400>; | |
| reg-names = "csid"; | |
| interrupts = <0x00 0x34 0x00>; | |
| interrupt-names = "csid"; | |
| qcom,csi-vdd-voltage = <0x124f80>; | |
| qcom,mipi-csi-vdd-supply = <0xe7>; | |
| clocks = <0x2b 0x4e814a78 0x2b 0x3c0a858f 0x2b 0x2c2dc261 0x2b 0x6a2a6c36 0x2b 0xfd1d1fa 0x2b 0x1aba4a8c 0x2b 0x87fc98d8 0x2b 0x6ac996fe 0x2b 0x9894b414>; | |
| clock-names = "camss_top_ahb_clk\0ispif_ahb_clk\0csi_ahb_clk\0csi_src_clk\0csi1_phy_clk\0csi_clk\0csi_pix_clk\0csi_rdi_clk\0camss_ahb_clk"; | |
| qcom,clock-rates = <0x00 0x3ab06a0 0x00 0xbebc200 0x00 0x00 0x00 0x00 0x00>; | |
| }; | |
| qcom,csid@1b30800 { | |
| status = "ok"; | |
| cell-index = <0x02>; | |
| compatible = "qcom,csid-v3.4.2\0qcom,csid"; | |
| reg = <0x1b30800 0x400>; | |
| reg-names = "csid"; | |
| interrupts = <0x00 0x99 0x00>; | |
| interrupt-names = "csid"; | |
| qcom,csi-vdd-voltage = <0x124f80>; | |
| qcom,mipi-csi-vdd-supply = <0xe7>; | |
| clocks = <0x2b 0x4e814a78 0x2b 0x3c0a858f 0x2b 0xf3f25940 0x2b 0x4113589f 0x2b 0xbeeffbcd 0x2b 0xb6857fa2 0x2b 0xa619561a 0x2b 0x19fd3f1 0x2b 0x9894b414>; | |
| clock-names = "camss_top_ahb_clk\0ispif_ahb_clk\0csi_ahb_clk\0csi_src_clk\0csi2_phy_clk\0csi_clk\0csi_pix_clk\0csi_rdi_clk\0camss_ahb_clk"; | |
| qcom,clock-rates = <0x00 0x3ab06a0 0x00 0xbebc200 0x00 0x00 0x00 0x00 0x00>; | |
| }; | |
| qcom,ispif@1b31000 { | |
| cell-index = <0x00>; | |
| compatible = "qcom,ispif-v3.0\0qcom,ispif"; | |
| reg = <0x1b31000 0x500 0x1b00020 0x10>; | |
| reg-names = "ispif\0csi_clk_mux"; | |
| interrupts = <0x00 0x37 0x00>; | |
| interrupt-names = "ispif"; | |
| qcom,num-isps = <0x02>; | |
| vfe0-vdd-supply = <0x118>; | |
| vfe1-vdd-supply = <0x119>; | |
| qcom,vdd-names = "vfe0-vdd\0vfe1-vdd"; | |
| clocks = <0x2b 0x3c0a858f 0x2b 0x9894b414 0x2b 0x4e814a78 0x2b 0xf92304fb 0x2b 0x227e65bc 0x2b 0x6b01b3e1 0x2b 0x7053c7ae 0x2b 0x61a8a930 0x2b 0x6a2a6c36 0x2b 0x1aba4a8c 0x2b 0x6ac996fe 0x2b 0x87fc98d8 0x2b 0x4113589f 0x2b 0xb6857fa2 0x2b 0x19fd3f1 0x2b 0xa619561a 0x2b 0xa0c2bd8f 0x2b 0xaaa3cd97 0x2b 0xcc73453c 0x2b 0x4e357366 0x2b 0xcaf20d99 0x2b 0xb1ef6e8b>; | |
| clock-names = "ispif_ahb_clk\0camss_ahb_clk\0camss_top_ahb_clk\0camss_ahb_src\0csi0_src_clk\0csi0_clk\0csi0_rdi_clk\0csi0_pix_clk\0csi1_src_clk\0csi1_clk\0csi1_rdi_clk\0csi1_pix_clk\0csi2_src_clk\0csi2_clk\0csi2_rdi_clk\0csi2_pix_clk\0vfe0_clk_src\0camss_vfe_vfe0_clk\0camss_csi_vfe0_clk\0vfe1_clk_src\0camss_vfe_vfe1_clk\0camss_csi_vfe1_clk"; | |
| qcom,clock-rates = <0x3ab06a0 0x00 0x00 0x00 0xbebc200 0x00 0x00 0x00 0xbebc200 0x00 0x00 0x00 0xbebc200 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>; | |
| qcom,clock-cntl-support; | |
| qcom,clock-control = "SET_RATE\0NO_SET_RATE\0NO_SET_RATE\0NO_SET_RATE\0SET_RATE\0NO_SET_RATE\0NO_SET_RATE\0NO_SET_RATE\0SET_RATE\0NO_SET_RATE\0NO_SET_RATE\0NO_SET_RATE\0SET_RATE\0NO_SET_RATE\0NO_SET_RATE\0NO_SET_RATE\0INIT_RATE\0NO_SET_RATE\0NO_SET_RATE\0INIT_RATE\0NO_SET_RATE\0NO_SET_RATE"; | |
| }; | |
| qcom,vfe0@1b10000 { | |
| cell-index = <0x00>; | |
| compatible = "qcom,vfe40"; | |
| reg = <0x1b10000 0x1000 0x1b40000 0x200>; | |
| reg-names = "vfe\0vfe_vbif"; | |
| interrupts = <0x00 0x39 0x00>; | |
| interrupt-names = "vfe"; | |
| vdd-supply = <0x118>; | |
| clocks = <0x2b 0x4e814a78 0x2b 0x9894b414 0x2b 0xa0c2bd8f 0x2b 0xaaa3cd97 0x2b 0xcc73453c 0x2b 0x4050f47a 0x2b 0x77fe2384 0x2b 0x3c0a858f>; | |
| clock-names = "camss_top_ahb_clk\0camss_ahb_clk\0vfe_clk_src\0camss_vfe_vfe_clk\0camss_csi_vfe_clk\0iface_clk\0bus_clk\0iface_ahb_clk"; | |
| qcom,clock-rates = <0x00 0x00 0xfe50fb0 0x00 0x00 0x00 0x00 0x00>; | |
| qos-entries = <0x08>; | |
| qos-regs = <0x2c4 0x2c8 0x2cc 0x2d0 0x2d4 0x2d8 0x2dc 0x2e0>; | |
| qos-settings = <0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55>; | |
| vbif-entries = <0x01>; | |
| vbif-regs = <0x124>; | |
| vbif-settings = <0x03>; | |
| ds-entries = <0x11>; | |
| ds-regs = <0x988 0x98c 0x990 0x994 0x998 0x99c 0x9a0 0x9a4 0x9a8 0x9ac 0x9b0 0x9b4 0x9b8 0x9bc 0x9c0 0x9c4 0x9c8>; | |
| ds-settings = <0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0x110>; | |
| max-clk-nominal = <0x17d78400>; | |
| max-clk-turbo = <0x19bfcc00>; | |
| }; | |
| qcom,vfe1@1b14000 { | |
| cell-index = <0x01>; | |
| compatible = "qcom,vfe40"; | |
| reg = <0x1b14000 0x1000 0x1ba0000 0x200>; | |
| reg-names = "vfe\0vfe_vbif"; | |
| interrupts = <0x00 0x1d 0x00>; | |
| interrupt-names = "vfe"; | |
| vdd-supply = <0x119>; | |
| clocks = <0x2b 0x4e814a78 0x2b 0x9894b414 0x2b 0x4e357366 0x2b 0xcaf20d99 0x2b 0xb1ef6e8b 0x2b 0x634a738a 0x2b 0xaf7463b3 0x2b 0x3c0a858f>; | |
| clock-names = "camss_top_ahb_clk\0camss_ahb_clk\0vfe_clk_src\0camss_vfe_vfe_clk\0camss_csi_vfe_clk\0iface_clk\0bus_clk\0iface_ahb_clk"; | |
| qcom,clock-rates = <0x00 0x00 0xfe50fb0 0x00 0x00 0x00 0x00 0x00>; | |
| qos-entries = <0x08>; | |
| qos-regs = <0x2c4 0x2c8 0x2cc 0x2d0 0x2d4 0x2d8 0x2dc 0x2e0>; | |
| qos-settings = <0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55>; | |
| vbif-entries = <0x01>; | |
| vbif-regs = <0x124>; | |
| vbif-settings = <0x03>; | |
| ds-entries = <0x11>; | |
| ds-regs = <0x988 0x98c 0x990 0x994 0x998 0x99c 0x9a0 0x9a4 0x9a8 0x9ac 0x9b0 0x9b4 0x9b8 0x9bc 0x9c0 0x9c4 0x9c8>; | |
| ds-settings = <0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0x110>; | |
| max-clk-nominal = <0x17d78400>; | |
| max-clk-turbo = <0x19bfcc00>; | |
| }; | |
| qcom,vfe { | |
| compatible = "qcom,vfe"; | |
| num_child = <0x02>; | |
| }; | |
| qcom,cam_smmu { | |
| status = "ok"; | |
| compatible = "qcom,msm-cam-smmu"; | |
| msm_cam_smmu_cb1 { | |
| compatible = "qcom,qsmmu-cam-cb"; | |
| iommus = <0x11a 0x400 0x11a 0x2400>; | |
| label = "vfe"; | |
| qcom,scratch-buf-support; | |
| }; | |
| msm_cam_smmu_cb2 { | |
| compatible = "qcom,qsmmu-cam-cb"; | |
| label = "vfe_secure"; | |
| qcom,secure-context; | |
| }; | |
| msm_cam_smmu_cb3 { | |
| compatible = "qcom,qsmmu-cam-cb"; | |
| iommus = <0x11a 0x1c00>; | |
| label = "cpp"; | |
| }; | |
| msm_cam_smmu_cb4 { | |
| compatible = "qcom,qsmmu-cam-cb"; | |
| iommus = <0x11a 0x1800>; | |
| label = "jpeg_enc0"; | |
| }; | |
| }; | |
| qcom,jpeg@1b1c000 { | |
| status = "ok"; | |
| cell-index = <0x00>; | |
| compatible = "qcom,jpeg"; | |
| reg = <0x1b1c000 0x400 0x1b60000 0xc30>; | |
| reg-names = "jpeg_hw\0jpeg_vbif"; | |
| interrupts = <0x00 0x3b 0x00>; | |
| interrupt-names = "jpeg"; | |
| vdd-supply = <0x11b>; | |
| qcom,vdd-names = "vdd"; | |
| clock-names = "core_clk\0iface_clk\0bus_clk0\0camss_top_ahb_clk\0camss_ahb_clk"; | |
| clocks = <0x2b 0x1ed3f032 0x2b 0x3bfa7603 0x2b 0x3e278896 0x2b 0x4e814a78 0x2b 0x9894b414>; | |
| qcom,clock-rates = <0xfe50fb0 0x00 0x00 0x00 0x00>; | |
| qcom,qos-reg-settings = <0x28 0x555e 0xc8 0x5555>; | |
| qcom,vbif-reg-settings = <0xc0 0x10101000 0xb0 0x10100010>; | |
| qcom,msm-bus,name = "msm_camera_jpeg0"; | |
| qcom,msm-bus,num-cases = <0x02>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x3e 0x200 0x00 0x00 0x3e 0x200 0xc3500 0xc3500>; | |
| }; | |
| qcom,irqrouter@1b00000 { | |
| status = "ok"; | |
| cell-index = <0x00>; | |
| compatible = "qcom,irqrouter"; | |
| reg = <0x1b00000 0x100>; | |
| reg-names = "irqrouter"; | |
| }; | |
| qcom,cpp@1b04000 { | |
| status = "ok"; | |
| cell-index = <0x00>; | |
| compatible = "qcom,cpp"; | |
| reg = <0x1b04000 0x100 0x1b80000 0x200 0x1b18000 0x18 0x1858078 0x04>; | |
| reg-names = "cpp\0cpp_vbif\0cpp_hw\0camss_cpp"; | |
| interrupts = <0x00 0x31 0x00>; | |
| interrupt-names = "cpp"; | |
| vdd-supply = <0x11c>; | |
| qcom,vdd-names = "vdd"; | |
| clocks = <0x2b 0x3c0a858f 0x2b 0x8382f56d 0x2b 0x4e814a78 0x2b 0x4ac95e14 0x2b 0xbbf73861 0x2b 0x7118a0de 0x2b 0xfbbee8cf 0x2b 0x9894b414>; | |
| clock-names = "ispif_ahb_clk\0cpp_core_clk\0camss_top_ahb_clk\0camss_vfe_cpp_ahb_clk\0camss_vfe_cpp_axi_clk\0camss_vfe_cpp_clk\0micro_iface_clk\0camss_ahb_clk"; | |
| qcom,clock-rates = <0x3ab06a0 0xaba9500 0x00 0x00 0x00 0xaba9500 0x00 0x00>; | |
| qcom,min-clock-rate = <0x7ed6b40>; | |
| qcom,bus-master = <0x01>; | |
| qcom,msm-bus,name = "msm_camera_cpp"; | |
| qcom,msm-bus,num-cases = <0x02>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x6a 0x200 0x00 0x00 0x6a 0x200 0x00 0x00>; | |
| qcom,msm-bus-vector-dyn-vote; | |
| qcom,cpp-fw-payload-info { | |
| qcom,stripe-base = <0x9c>; | |
| qcom,plane-base = <0x8d>; | |
| qcom,stripe-size = <0x1b>; | |
| qcom,plane-size = <0x05>; | |
| qcom,fe-ptr-off = <0x05>; | |
| qcom,we-ptr-off = <0x0b>; | |
| }; | |
| }; | |
| qcom,cci@1b0c000 { | |
| status = "ok"; | |
| cell-index = <0x00>; | |
| compatible = "qcom,cci"; | |
| reg = <0x1b0c000 0x4000>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg-names = "cci"; | |
| interrupts = <0x00 0x32 0x00>; | |
| interrupt-names = "cci"; | |
| clocks = <0x2b 0x3c0a858f 0x2b 0x822f3d97 0x2b 0xa81c11ba 0x2b 0xb7dd8824 0x2b 0x9894b414 0x2b 0x4e814a78>; | |
| clock-names = "ispif_ahb_clk\0cci_src_clk\0cci_ahb_clk\0camss_cci_clk\0camss_ahb_clk\0camss_top_ahb_clk"; | |
| qcom,clock-rates = <0x3ab06a0 0x124f800 0x00 0x00 0x00 0x00 0x3ab06a0 0x23c3460 0x00 0x00 0x00 0x00>; | |
| pinctrl-names = "cci_default\0cci_suspend"; | |
| pinctrl-0 = <0x11d 0x11e>; | |
| pinctrl-1 = <0x11f 0x120>; | |
| gpios = <0xa7 0x1d 0x00 0xa7 0x1e 0x00 0xa7 0x1f 0x00 0xa7 0x20 0x00>; | |
| qcom,gpio-tbl-num = <0x00 0x01 0x02 0x03>; | |
| qcom,gpio-tbl-flags = <0x01 0x01 0x01 0x01>; | |
| qcom,gpio-tbl-label = "CCI_I2C_DATA0\0CCI_I2C_CLK0\0CCI_I2C_DATA1\0CCI_I2C_CLK1"; | |
| qcom,i2c_standard_mode { | |
| status = "disabled"; | |
| qcom,hw-thigh = <0x4e>; | |
| qcom,hw-tlow = <0x72>; | |
| qcom,hw-tsu-sto = <0x1c>; | |
| qcom,hw-tsu-sta = <0x1c>; | |
| qcom,hw-thd-dat = <0x0a>; | |
| qcom,hw-thd-sta = <0x4d>; | |
| qcom,hw-tbuf = <0x76>; | |
| qcom,hw-scl-stretch-en = <0x00>; | |
| qcom,hw-trdhld = <0x06>; | |
| qcom,hw-tsp = <0x01>; | |
| }; | |
| qcom,i2c_fast_mode { | |
| status = "ok"; | |
| qcom,hw-thigh = <0x14>; | |
| qcom,hw-tlow = <0x1c>; | |
| qcom,hw-tsu-sto = <0x15>; | |
| qcom,hw-tsu-sta = <0x15>; | |
| qcom,hw-thd-dat = <0x0d>; | |
| qcom,hw-thd-sta = <0x12>; | |
| qcom,hw-tbuf = <0x20>; | |
| qcom,hw-scl-stretch-en = <0x00>; | |
| qcom,hw-trdhld = <0x06>; | |
| qcom,hw-tsp = <0x03>; | |
| }; | |
| qcom,i2c_custom_mode { | |
| status = "ok"; | |
| qcom,hw-thigh = <0x0f>; | |
| qcom,hw-tlow = <0x1c>; | |
| qcom,hw-tsu-sto = <0x15>; | |
| qcom,hw-tsu-sta = <0x15>; | |
| qcom,hw-thd-dat = <0x0d>; | |
| qcom,hw-thd-sta = <0x12>; | |
| qcom,hw-tbuf = <0x19>; | |
| qcom,hw-scl-stretch-en = <0x01>; | |
| qcom,hw-trdhld = <0x06>; | |
| qcom,hw-tsp = <0x03>; | |
| }; | |
| qcom,i2c_fast_plus_mode { | |
| status = "ok"; | |
| qcom,hw-thigh = <0x10>; | |
| qcom,hw-tlow = <0x16>; | |
| qcom,hw-tsu-sto = <0x11>; | |
| qcom,hw-tsu-sta = <0x12>; | |
| qcom,hw-thd-dat = <0x10>; | |
| qcom,hw-thd-sta = <0x0f>; | |
| qcom,hw-tbuf = <0x13>; | |
| qcom,hw-scl-stretch-en = <0x01>; | |
| qcom,hw-trdhld = <0x03>; | |
| qcom,hw-tsp = <0x03>; | |
| qcom,cci-clk-src = <0x23c3460>; | |
| }; | |
| qcom,actuator@0 { | |
| cell-index = <0x00>; | |
| reg = <0x00>; | |
| compatible = "qcom,actuator"; | |
| qcom,cci-master = <0x00>; | |
| cam_vaf-supply = <0x121>; | |
| qcom,cam-vreg-name = "cam_vaf"; | |
| qcom,cam-vreg-min-voltage = <0x2b7cd0>; | |
| qcom,cam-vreg-max-voltage = <0x2b7cd0>; | |
| qcom,cam-vreg-op-mode = <0x13880>; | |
| linux,phandle = <0x12e>; | |
| phandle = <0x12e>; | |
| }; | |
| qcom,eeprom@0 { | |
| cell-index = <0x00>; | |
| compatible = "qcom,eeprom"; | |
| qcom,cci-master = <0x00>; | |
| qcom,slave-addr = <0xb0>; | |
| reg = <0x00>; | |
| cam_vio-supply = <0x122>; | |
| cam_vdig-supply = <0x123>; | |
| cam_vaf-supply = <0x121>; | |
| qcom,cam-vreg-name = "cam_vio\0cam_vdig\0cam_vaf"; | |
| qcom,cam-vreg-min-voltage = <0x1b7740 0x124f80 0x2b7cd0>; | |
| qcom,cam-vreg-max-voltage = <0x1b7740 0x124f80 0x2b7cd0>; | |
| qcom,cam-vreg-op-mode = <0x13880 0x13880 0x186a0>; | |
| pinctrl-names = "cam_default\0cam_suspend"; | |
| pinctrl-0 = <0x124 0x125>; | |
| pinctrl-1 = <0x126 0x127>; | |
| gpios = <0xa7 0x1a 0x00 0xa7 0x1b 0x00 0xa7 0x24 0x00 0xa7 0x23 0x00 0xa7 0x27 0x00>; | |
| qcom,gpio-vio = <0x01>; | |
| qcom,gpio-reset = <0x02>; | |
| qcom,gpio-standby = <0x03>; | |
| qcom,gpio-vana = <0x04>; | |
| qcom,gpio-req-tbl-num = <0x00 0x01 0x02 0x03 0x04>; | |
| qcom,gpio-req-tbl-flags = <0x01 0x00 0x00 0x00 0x00>; | |
| qcom,gpio-req-tbl-label = "CAMIF_MCLK0\0CAM_VIO0\0CAM_RESET0\0CAM_STANDBY0\0CAM_VANA0"; | |
| status = "ok"; | |
| clocks = <0x2b 0x266b3853 0x2b 0x80902deb>; | |
| clock-names = "cam_src_clk\0cam_clk"; | |
| qcom,clock-rates = <0x124f800 0x00>; | |
| linux,phandle = <0x12d>; | |
| phandle = <0x12d>; | |
| }; | |
| qcom,eeprom@1 { | |
| cell-index = <0x01>; | |
| qcom,slave-addr = <0x20>; | |
| compatible = "qcom,eeprom"; | |
| reg = <0x01>; | |
| cam_vdig-supply = <0x123>; | |
| cam_vio-supply = <0x122>; | |
| qcom,cam-vreg-name = "cam_vdig\0cam_vio"; | |
| qcom,cam-vreg-min-voltage = <0x124f80 0x1b7740>; | |
| qcom,cam-vreg-max-voltage = <0x124f80 0x1b7740>; | |
| qcom,cam-vreg-op-mode = <0x186a0 0x186a0>; | |
| pinctrl-names = "cam_default\0cam_suspend"; | |
| pinctrl-0 = <0x128 0x129>; | |
| pinctrl-1 = <0x12a 0x12b>; | |
| gpios = <0xa7 0x1c 0x00 0xa7 0x1b 0x00 0xa7 0x28 0x00 0xa7 0x27 0x00>; | |
| qcom,gpio-vio = <0x01>; | |
| qcom,gpio-reset = <0x02>; | |
| qcom,gpio-vana = <0x03>; | |
| qcom,gpio-req-tbl-num = <0x00 0x01 0x02 0x03>; | |
| qcom,gpio-req-tbl-flags = <0x01 0x00 0x00 0x00>; | |
| qcom,gpio-req-tbl-label = "CAMIF_MCLK2\0CAM_VIO2\0CAM_RESET2\0CAM_VANA2"; | |
| qcom,cci-master = <0x00>; | |
| status = "ok"; | |
| clocks = <0x2b 0x42545468 0x2b 0x222f8fff>; | |
| clock-names = "cam_src_clk\0cam_clk"; | |
| qcom,clock-rates = <0x124f800 0x00>; | |
| linux,phandle = <0x12f>; | |
| phandle = <0x12f>; | |
| }; | |
| qcom,camera@0 { | |
| cell-index = <0x00>; | |
| compatible = "qcom,camera"; | |
| reg = <0x00>; | |
| qcom,csiphy-sd-index = <0x00>; | |
| qcom,csid-sd-index = <0x00>; | |
| qcom,mount-angle = <0x5a>; | |
| qcom,led-flash-src = <0x12c>; | |
| qcom,eeprom-src = <0x12d>; | |
| qcom,actuator-src = <0x12e>; | |
| cam_vio-supply = <0x122>; | |
| cam_vdig-supply = <0x123>; | |
| cam_vaf-supply = <0x121>; | |
| qcom,cam-vreg-name = "cam_vio\0cam_vdig\0cam_vaf"; | |
| qcom,cam-vreg-min-voltage = <0x1b7740 0x124f80 0x2b7cd0>; | |
| qcom,cam-vreg-max-voltage = <0x1b7740 0x124f80 0x2b7cd0>; | |
| qcom,cam-vreg-op-mode = <0x13880 0x13880 0x186a0>; | |
| pinctrl-names = "cam_default\0cam_suspend"; | |
| pinctrl-0 = <0x124 0x125>; | |
| pinctrl-1 = <0x126 0x127>; | |
| gpios = <0xa7 0x1a 0x00 0xa7 0x1b 0x00 0xa7 0x24 0x00 0xa7 0x23 0x00 0xa7 0x27 0x00>; | |
| qcom,gpio-vio = <0x01>; | |
| qcom,gpio-reset = <0x02>; | |
| qcom,gpio-standby = <0x03>; | |
| qcom,gpio-vana = <0x04>; | |
| qcom,gpio-req-tbl-num = <0x00 0x01 0x02 0x03 0x04>; | |
| qcom,gpio-req-tbl-flags = <0x01 0x00 0x00 0x00 0x00>; | |
| qcom,gpio-req-tbl-label = "CAMIF_MCLK0\0CAM_VIO0\0CAM_RESET0\0CAM_STANDBY0\0CAM_VANA0"; | |
| qcom,sensor-position = <0x00>; | |
| qcom,sensor-mode = <0x00>; | |
| qcom,cci-master = <0x00>; | |
| status = "ok"; | |
| clocks = <0x2b 0x266b3853 0x2b 0x80902deb>; | |
| clock-names = "cam_src_clk\0cam_clk"; | |
| qcom,clock-rates = <0x16e3600 0x00>; | |
| }; | |
| qcom,camera@1 { | |
| cell-index = <0x01>; | |
| compatible = "qcom,camera"; | |
| reg = <0x01>; | |
| qcom,csiphy-sd-index = <0x01>; | |
| qcom,csid-sd-index = <0x01>; | |
| qcom,eeprom-src = <0x12f>; | |
| qcom,mount-angle = <0x10e>; | |
| cam_vdig-supply = <0x123>; | |
| cam_vio-supply = <0x122>; | |
| qcom,cam-vreg-name = "cam_vdig\0cam_vio"; | |
| qcom,cam-vreg-min-voltage = <0x124f80 0x1b7740>; | |
| qcom,cam-vreg-max-voltage = <0x124f80 0x1b7740>; | |
| qcom,cam-vreg-op-mode = <0x186a0 0x186a0>; | |
| pinctrl-names = "cam_default\0cam_suspend"; | |
| pinctrl-0 = <0x128 0x129>; | |
| pinctrl-1 = <0x12a 0x12b>; | |
| gpios = <0xa7 0x1c 0x00 0xa7 0x1b 0x00 0xa7 0x28 0x00 0xa7 0x27 0x00>; | |
| qcom,gpio-vio = <0x01>; | |
| qcom,gpio-reset = <0x02>; | |
| qcom,gpio-vana = <0x03>; | |
| qcom,gpio-req-tbl-num = <0x00 0x01 0x02 0x03>; | |
| qcom,gpio-req-tbl-flags = <0x01 0x00 0x00 0x00>; | |
| qcom,gpio-req-tbl-label = "CAMIF_MCLK2\0CAM_VIO2\0CAM_RESET2\0CAM_VANA2"; | |
| qcom,sensor-position = <0x01>; | |
| qcom,sensor-mode = <0x00>; | |
| qcom,cci-master = <0x00>; | |
| status = "ok"; | |
| clocks = <0x2b 0x42545468 0x2b 0x222f8fff>; | |
| clock-names = "cam_src_clk\0cam_clk"; | |
| qcom,clock-rates = <0x16e3600 0x00>; | |
| }; | |
| }; | |
| qcom,msm-pcm { | |
| compatible = "qcom,msm-pcm-dsp"; | |
| qcom,msm-pcm-dsp-id = <0x00>; | |
| linux,phandle = <0x135>; | |
| phandle = <0x135>; | |
| }; | |
| qcom,msm-pcm-routing { | |
| compatible = "qcom,msm-pcm-routing"; | |
| linux,phandle = <0x13f>; | |
| phandle = <0x13f>; | |
| }; | |
| qcom,msm-ultra-low-latency { | |
| compatible = "qcom,msm-pcm-dsp"; | |
| qcom,msm-pcm-dsp-id = <0x02>; | |
| qcom,msm-pcm-low-latency; | |
| qcom,latency-level = "ultra"; | |
| linux,phandle = <0x137>; | |
| phandle = <0x137>; | |
| }; | |
| qcom,msm-pcm-low-latency { | |
| compatible = "qcom,msm-pcm-dsp"; | |
| qcom,msm-pcm-dsp-id = <0x01>; | |
| qcom,msm-pcm-low-latency; | |
| qcom,latency-level = "regular"; | |
| linux,phandle = <0x136>; | |
| phandle = <0x136>; | |
| }; | |
| qcom,msm-cpe-lsm { | |
| compatible = "qcom,msm-cpe-lsm"; | |
| }; | |
| qcom,msm-pcm-lpa { | |
| compatible = "qcom,msm-pcm-lpa"; | |
| linux,phandle = <0x140>; | |
| phandle = <0x140>; | |
| }; | |
| qcom,msm-compress-dsp { | |
| compatible = "qcom,msm-compress-dsp"; | |
| linux,phandle = <0x13b>; | |
| phandle = <0x13b>; | |
| }; | |
| qcom,msm-voip-dsp { | |
| compatible = "qcom,msm-voip-dsp"; | |
| linux,phandle = <0x138>; | |
| phandle = <0x138>; | |
| }; | |
| qcom,msm-pcm-voice { | |
| compatible = "qcom,msm-pcm-voice"; | |
| qcom,destroy-cvd; | |
| linux,phandle = <0x139>; | |
| phandle = <0x139>; | |
| }; | |
| qcom,msm-stub-codec { | |
| compatible = "qcom,msm-stub-codec"; | |
| linux,phandle = <0x15c>; | |
| phandle = <0x15c>; | |
| }; | |
| qcom,msm-dai-fe { | |
| compatible = "qcom,msm-dai-fe"; | |
| }; | |
| qcom,msm-pcm-afe { | |
| compatible = "qcom,msm-pcm-afe"; | |
| linux,phandle = <0x13d>; | |
| phandle = <0x13d>; | |
| }; | |
| qcom,msm-pcm-loopback { | |
| compatible = "qcom,msm-pcm-loopback"; | |
| linux,phandle = <0x13a>; | |
| phandle = <0x13a>; | |
| }; | |
| qcom,msm-dai-mi2s { | |
| compatible = "qcom,msm-dai-mi2s"; | |
| qcom,msm-dai-q6-mi2s-prim { | |
| compatible = "qcom,msm-dai-q6-mi2s"; | |
| qcom,msm-dai-q6-mi2s-dev-id = <0x00>; | |
| qcom,msm-mi2s-rx-lines = <0x03>; | |
| qcom,msm-mi2s-tx-lines = <0x00>; | |
| linux,phandle = <0x142>; | |
| phandle = <0x142>; | |
| }; | |
| qcom,msm-dai-q6-mi2s-sec { | |
| compatible = "qcom,msm-dai-q6-mi2s"; | |
| qcom,msm-dai-q6-mi2s-dev-id = <0x01>; | |
| qcom,msm-mi2s-rx-lines = <0x01>; | |
| qcom,msm-mi2s-tx-lines = <0x00>; | |
| linux,phandle = <0x143>; | |
| phandle = <0x143>; | |
| }; | |
| qcom,msm-dai-q6-mi2s-quat { | |
| compatible = "qcom,msm-dai-q6-mi2s"; | |
| qcom,msm-dai-q6-mi2s-dev-id = <0x03>; | |
| qcom,msm-mi2s-rx-lines = <0x01>; | |
| qcom,msm-mi2s-tx-lines = <0x02>; | |
| linux,phandle = <0x145>; | |
| phandle = <0x145>; | |
| }; | |
| qcom,msm-dai-q6-mi2s-tert { | |
| compatible = "qcom,msm-dai-q6-mi2s"; | |
| qcom,msm-dai-q6-mi2s-dev-id = <0x02>; | |
| qcom,msm-mi2s-rx-lines = <0x00>; | |
| qcom,msm-mi2s-tx-lines = <0x03>; | |
| linux,phandle = <0x144>; | |
| phandle = <0x144>; | |
| }; | |
| qcom,msm-dai-q6-mi2s-quin { | |
| compatible = "qcom,msm-dai-q6-mi2s"; | |
| qcom,msm-dai-q6-mi2s-dev-id = <0x05>; | |
| qcom,msm-mi2s-rx-lines = <0x01>; | |
| qcom,msm-mi2s-tx-lines = <0x02>; | |
| linux,phandle = <0x146>; | |
| phandle = <0x146>; | |
| }; | |
| qcom,msm-dai-q6-mi2s-senary { | |
| compatible = "qcom,msm-dai-q6-mi2s"; | |
| qcom,msm-dai-q6-mi2s-dev-id = <0x06>; | |
| qcom,msm-mi2s-rx-lines = <0x00>; | |
| qcom,msm-mi2s-tx-lines = <0x03>; | |
| linux,phandle = <0x147>; | |
| phandle = <0x147>; | |
| }; | |
| }; | |
| qcom,msm-lsm-client { | |
| compatible = "qcom,msm-lsm-client"; | |
| linux,phandle = <0x13e>; | |
| phandle = <0x13e>; | |
| }; | |
| qcom,msm-dai-q6 { | |
| compatible = "qcom,msm-dai-q6"; | |
| qcom,msm-dai-q6-sb-0-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4000>; | |
| linux,phandle = <0x148>; | |
| phandle = <0x148>; | |
| }; | |
| qcom,msm-dai-q6-sb-0-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4001>; | |
| linux,phandle = <0x149>; | |
| phandle = <0x149>; | |
| }; | |
| qcom,msm-dai-q6-sb-1-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4002>; | |
| linux,phandle = <0x14a>; | |
| phandle = <0x14a>; | |
| }; | |
| qcom,msm-dai-q6-sb-1-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4003>; | |
| linux,phandle = <0x14b>; | |
| phandle = <0x14b>; | |
| }; | |
| qcom,msm-dai-q6-sb-2-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4004>; | |
| }; | |
| qcom,msm-dai-q6-sb-2-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4005>; | |
| }; | |
| qcom,msm-dai-q6-sb-3-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4006>; | |
| linux,phandle = <0x14c>; | |
| phandle = <0x14c>; | |
| }; | |
| qcom,msm-dai-q6-sb-3-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4007>; | |
| linux,phandle = <0x14d>; | |
| phandle = <0x14d>; | |
| }; | |
| qcom,msm-dai-q6-sb-4-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4008>; | |
| linux,phandle = <0x14e>; | |
| phandle = <0x14e>; | |
| }; | |
| qcom,msm-dai-q6-sb-4-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4009>; | |
| linux,phandle = <0x14f>; | |
| phandle = <0x14f>; | |
| }; | |
| qcom,msm-dai-q6-sb-5-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x400b>; | |
| }; | |
| qcom,msm-dai-q6-sb-5-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x400a>; | |
| }; | |
| qcom,msm-dai-q6-bt-sco-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x3000>; | |
| linux,phandle = <0x150>; | |
| phandle = <0x150>; | |
| }; | |
| qcom,msm-dai-q6-bt-sco-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x3001>; | |
| linux,phandle = <0x151>; | |
| phandle = <0x151>; | |
| }; | |
| qcom,msm-dai-q6-int-fm-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x3004>; | |
| linux,phandle = <0x152>; | |
| phandle = <0x152>; | |
| }; | |
| qcom,msm-dai-q6-int-fm-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x3005>; | |
| linux,phandle = <0x153>; | |
| phandle = <0x153>; | |
| }; | |
| qcom,msm-dai-q6-be-afe-pcm-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0xe0>; | |
| linux,phandle = <0x154>; | |
| phandle = <0x154>; | |
| }; | |
| qcom,msm-dai-q6-be-afe-pcm-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0xe1>; | |
| linux,phandle = <0x155>; | |
| phandle = <0x155>; | |
| }; | |
| qcom,msm-dai-q6-afe-proxy-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0xf1>; | |
| linux,phandle = <0x156>; | |
| phandle = <0x156>; | |
| }; | |
| qcom,msm-dai-q6-afe-proxy-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0xf0>; | |
| linux,phandle = <0x157>; | |
| phandle = <0x157>; | |
| }; | |
| qcom,msm-dai-q6-afe-loopback-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x6001>; | |
| }; | |
| qcom,msm-dai-q6-incall-record-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x8003>; | |
| linux,phandle = <0x158>; | |
| phandle = <0x158>; | |
| }; | |
| qcom,msm-dai-q6-incall-record-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x8004>; | |
| linux,phandle = <0x159>; | |
| phandle = <0x159>; | |
| }; | |
| qcom,msm-dai-q6-incall-music-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x8005>; | |
| linux,phandle = <0x15a>; | |
| phandle = <0x15a>; | |
| }; | |
| qcom,msm-dai-q6-incall-music-2-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x8002>; | |
| linux,phandle = <0x15b>; | |
| phandle = <0x15b>; | |
| }; | |
| qcom,msm-dai-q6-sb-6-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x400c>; | |
| }; | |
| }; | |
| qcom,msm-pcm-hostless { | |
| compatible = "qcom,msm-pcm-hostless"; | |
| linux,phandle = <0x13c>; | |
| phandle = <0x13c>; | |
| }; | |
| qcom,msm-pri-auxpcm { | |
| compatible = "qcom,msm-auxpcm-dev"; | |
| qcom,msm-cpudai-auxpcm-mode = <0x00 0x00>; | |
| qcom,msm-cpudai-auxpcm-sync = <0x01 0x01>; | |
| qcom,msm-cpudai-auxpcm-frame = <0x05 0x04>; | |
| qcom,msm-cpudai-auxpcm-quant = <0x02 0x02>; | |
| qcom,msm-cpudai-auxpcm-num-slots = <0x01 0x01>; | |
| qcom,msm-cpudai-auxpcm-slot-mapping = <0x01 0x01>; | |
| qcom,msm-cpudai-auxpcm-data = <0x00 0x00>; | |
| qcom,msm-cpudai-auxpcm-pcm-clk-rate = <0x1f4000 0x1f4000>; | |
| qcom,msm-auxpcm-interface = "primary"; | |
| linux,phandle = <0x141>; | |
| phandle = <0x141>; | |
| }; | |
| qcom,msm-hdmi-dba-codec-rx { | |
| compatible = "qcom,msm-hdmi-dba-codec-rx"; | |
| qcom,dba-bridge-chip = "adv7533"; | |
| }; | |
| qcom,msm-audio-ion { | |
| compatible = "qcom,msm-audio-ion"; | |
| qcom,smmu-version = <0x01>; | |
| qcom,smmu-enabled; | |
| iommus = <0x130 0x01>; | |
| }; | |
| qcom,msm-adsp-loader { | |
| compatible = "qcom,adsp-loader"; | |
| qcom,adsp-state = <0x00>; | |
| }; | |
| qcom,avtimer@c0a300c { | |
| compatible = "qcom,avtimer"; | |
| reg = <0xc0a300c 0x04 0xc0a3010 0x04>; | |
| reg-names = "avtimer_lsb_addr\0avtimer_msb_addr"; | |
| qcom,clk-div = <0x1b>; | |
| }; | |
| sound { | |
| status = "okay"; | |
| compatible = "qcom,msm8952-audio-codec"; | |
| qcom,model = "msm8952-snd-card"; | |
| reg = <0xc051000 0x04 0xc051004 0x04 0xc055000 0x04 0xc052000 0x04>; | |
| reg-names = "csr_gp_io_mux_mic_ctl\0csr_gp_io_mux_spkr_ctl\0csr_gp_io_lpaif_pri_pcm_pri_mode_muxsel\0csr_gp_io_mux_quin_ctl"; | |
| qcom,msm-ext-pa = "primary"; | |
| qcom,msm-mclk-freq = <0x927c00>; | |
| qcom,msm-mbhc-hphl-swh = <0x01>; | |
| qcom,msm-mbhc-gnd-swh = <0x01>; | |
| qcom,msm-hs-micbias-type = "internal"; | |
| qcom,audio-routing = "RX_BIAS\0MCLK\0SPK_RX_BIAS\0MCLK\0INT_LDO_H\0MCLK\0MIC BIAS External\0Handset Mic\0MIC BIAS Internal2\0Headset Mic\0MIC BIAS External\0Secondary Mic\0AMIC1\0MIC BIAS External\0AMIC2\0MIC BIAS Internal2\0AMIC3\0MIC BIAS External"; | |
| qcom,msm-gpios = "pri_i2s"; | |
| qcom,pinctrl-names = "all_off\0pri_i2s_act"; | |
| pinctrl-names = "all_off\0pri_i2s_act"; | |
| pinctrl-0 = <0x131 0x132>; | |
| pinctrl-1 = <0x133 0x134>; | |
| asoc-platform = <0x135 0x136 0x137 0x138 0x139 0x13a 0x13b 0x13c 0x13d 0x13e 0x13f 0x140>; | |
| asoc-platform-names = "msm-pcm-dsp.0\0msm-pcm-dsp.1\0msm-pcm-dsp.2\0msm-voip-dsp\0msm-pcm-voice\0msm-pcm-loopback\0msm-compress-dsp\0msm-pcm-hostless\0msm-pcm-afe\0msm-lsm-client\0msm-pcm-routing\0msm-pcm-lpa"; | |
| asoc-cpu = <0x141 0x142 0x143 0x144 0x145 0x146 0x147 0x148 0x149 0x14a 0x14b 0x14c 0x14d 0x14e 0x14f 0x150 0x151 0x152 0x153 0x154 0x155 0x156 0x157 0x158 0x159 0x15a 0x15b>; | |
| asoc-cpu-names = "msm-dai-q6-auxpcm.1\0msm-dai-q6-mi2s.0\0msm-dai-q6-mi2s.1\0msm-dai-q6-mi2s.2\0msm-dai-q6-mi2s.3\0msm-dai-q6-mi2s.5\0msm-dai-q6-mi2s.6\0msm-dai-q6-dev.16384\0msm-dai-q6-dev.16385\0msm-dai-q6-dev.16386\0msm-dai-q6-dev.16387\0msm-dai-q6-dev.16390\0msm-dai-q6-dev.16391\0msm-dai-q6-dev.16392\0msm-dai-q6-dev.16393\0msm-dai-q6-dev.12288\0msm-dai-q6-dev.12289\0msm-dai-q6-dev.12292\0msm-dai-q6-dev.12293\0msm-dai-q6-dev.224\0msm-dai-q6-dev.225\0msm-dai-q6-dev.241\0msm-dai-q6-dev.240\0msm-dai-q6-dev.32771\0msm-dai-q6-dev.32772\0msm-dai-q6-dev.32773\0msm-dai-q6-dev.32770"; | |
| asoc-codec = <0x15c 0x15d>; | |
| asoc-codec-names = "msm-stub-codec.1\0cajon_codec"; | |
| }; | |
| wcd9xxx-irq { | |
| status = "disabled"; | |
| compatible = "qcom,wcd9xxx-irq"; | |
| interrupt-controller; | |
| #interrupt-cells = <0x01>; | |
| interrupt-names = "cdc-int"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x15e>; | |
| interrupt-parent = <0xa7>; | |
| interrupts = <0x49 0x00>; | |
| qcom,gpio-connect = <0xa7 0x49 0x00>; | |
| linux,phandle = <0xb2>; | |
| phandle = <0xb2>; | |
| }; | |
| wcd_gpio_ctrl { | |
| status = "disabled"; | |
| compatible = "qcom,wcd-gpio-ctrl"; | |
| pinctrl-names = "aud_active\0aud_sleep"; | |
| pinctrl-0 = <0x15f>; | |
| pinctrl-1 = <0x160>; | |
| qcom,cdc-rst-n-gpio = <0xa7 0x44 0x00>; | |
| linux,phandle = <0xb3>; | |
| phandle = <0xb3>; | |
| }; | |
| audio_ext_clk { | |
| status = "disabled"; | |
| compatible = "qcom,audio-ref-clk"; | |
| clock-names = "osr_clk"; | |
| qcom,node_has_rpm_clock; | |
| #clock-cells = <0x01>; | |
| qcom,audio-ref-clk-gpio = <0x117 0x01 0x00>; | |
| clocks = <0x2b 0xd454019f>; | |
| linux,phandle = <0xb4>; | |
| phandle = <0xb4>; | |
| }; | |
| qcom,mdss_mdp@1a00000 { | |
| compatible = "qcom,mdss_mdp"; | |
| reg = <0x1a00000 0x90000 0x1ab0000 0x1040>; | |
| reg-names = "mdp_phys\0vbif_phys"; | |
| interrupts = <0x00 0x48 0x00>; | |
| vdd-supply = <0x109>; | |
| qcom,msm-bus,name = "mdss_mdp"; | |
| qcom,msm-bus,num-cases = <0x03>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x16 0x200 0x00 0x00 0x16 0x200 0x00 0x61a800 0x16 0x200 0x00 0x61a800>; | |
| qcom,mdss-ab-factor = <0x01 0x01>; | |
| qcom,mdss-ib-factor = <0x01 0x01>; | |
| qcom,mdss-clk-factor = <0x69 0x64>; | |
| qcom,max-mixer-width = <0x800>; | |
| qcom,max-pipe-width = <0x800>; | |
| qcom,mdss-vbif-qos-rt-setting = <0x01 0x02 0x02 0x02>; | |
| qcom,mdss-vbif-qos-nrt-setting = <0x01 0x01 0x01 0x01>; | |
| qcom,mdss-has-panic-ctrl; | |
| qcom,mdss-per-pipe-panic-luts = <0x0f 0xffff 0xfffc 0xff00>; | |
| qcom,mdss-mdp-reg-offset = <0x1000>; | |
| qcom,max-bandwidth-low-kbps = <0x2f4d60>; | |
| qcom,max-bandwidth-high-kbps = <0x2f4d60>; | |
| qcom,max-bandwidth-per-pipe-kbps = <0x231860>; | |
| qcom,max-bw-settings = <0x01 0x2f4d60 0x02 0x19f0a0>; | |
| qcom,max-clk-rate = <0x1312d000>; | |
| qcom,mdss-default-ot-rd-limit = <0x20>; | |
| qcom,mdss-default-ot-wr-limit = <0x10>; | |
| qcom,mdss-pipe-vig-off = <0x5000>; | |
| qcom,mdss-pipe-rgb-off = <0x15000 0x17000>; | |
| qcom,mdss-pipe-dma-off = <0x25000>; | |
| qcom,mdss-pipe-cursor-off = <0x35000>; | |
| qcom,mdss-pipe-vig-xin-id = <0x00>; | |
| qcom,mdss-pipe-rgb-xin-id = <0x01 0x05>; | |
| qcom,mdss-pipe-dma-xin-id = <0x02>; | |
| qcom,mdss-pipe-cursor-xin-id = <0x07>; | |
| qcom,mdss-pipe-vig-clk-ctrl-offsets = <0x2ac 0x00 0x00>; | |
| qcom,mdss-pipe-rgb-clk-ctrl-offsets = <0x2ac 0x04 0x08 0x2b4 0x04 0x08>; | |
| qcom,mdss-pipe-dma-clk-ctrl-offsets = <0x2ac 0x08 0x0c>; | |
| qcom,mdss-pipe-cursor-clk-ctrl-offsets = <0x3a8 0x10 0x0f>; | |
| qcom,mdss-ctl-off = <0x2000 0x2200 0x2400>; | |
| qcom,mdss-mixer-intf-off = <0x45000 0x46000>; | |
| qcom,mdss-dspp-off = <0x55000>; | |
| qcom,mdss-wb-off = <0x65000 0x66000>; | |
| qcom,mdss-intf-off = <0x00 0x6b800 0x6c000>; | |
| qcom,mdss-pingpong-off = <0x71000 0x71800>; | |
| qcom,mdss-slave-pingpong-off = "\0\a0"; | |
| qcom,mdss-cdm-off = <0x7a200>; | |
| qcom,mdss-wfd-mode = "intf"; | |
| qcom,mdss-highest-bank-bit = <0x01>; | |
| qcom,mdss-has-decimation; | |
| qcom,mdss-has-non-scalar-rgb; | |
| qcom,mdss-has-rotator-downscale; | |
| qcom,mdss-rot-downscale-min = <0x02>; | |
| qcom,mdss-rot-downscale-max = <0x10>; | |
| qcom,mdss-idle-power-collapse-enabled; | |
| qcom,mdss-rot-block-size = <0x40>; | |
| clocks = <0x2b 0xbfb92ed3 0x2b 0x668f51de 0x2b 0x6dc1f8f1 0x161 0x588460a4 0x2b 0x32a09f1f>; | |
| clock-names = "iface_clk\0bus_clk\0core_clk_src\0core_clk\0vsync_clk"; | |
| qcom,mdp-settings = <0x506c 0x00 0x1506c 0x00 0x1706c 0x00 0x2506c 0x00>; | |
| qcom,vbif-settings = <0xd0 0x10>; | |
| qcom,regs-dump-mdp = <0x1000 0x1454 0x2000 0x2064 0x2200 0x2264 0x2400 0x2464 0x5000 0x5150 0x5200 0x5230 0x15000 0x15150 0x17000 0x17150 0x25000 0x25150 0x35000 0x35150 0x45000 0x452bc 0x46000 0x462bc 0x55000 0x5522c 0x65000 0x652c0 0x66000 0x662c0 0x6b800 0x6ba68 0x6c000 0x6c268 0x71000 0x710d4 0x71800 0x718d4>; | |
| qcom,regs-dump-names-mdp = "MDP\0CTL_0\0CTL_1\0CTL_2\0VIG0_SSPP\0VIG0\0RGB0_SSPP\0RGB1_SSPP\0DMA0_SSPP\0CURSOR0_SSPP\0LAYER_0\0LAYER_1\0DSPP_0\0WB_0\0WB_2\0INTF_1\0INTF_2\0PP_0\0PP_1"; | |
| qcom,mdss-prefill-outstanding-buffer-bytes = <0x00>; | |
| qcom,mdss-prefill-y-buffer-bytes = <0x00>; | |
| qcom,mdss-prefill-scaler-buffer-lines-bilinear = <0x02>; | |
| qcom,mdss-prefill-scaler-buffer-lines-caf = <0x04>; | |
| qcom,mdss-prefill-post-scaler-buffer-pixels = <0x800>; | |
| qcom,mdss-prefill-pingpong-buffer-pixels = <0x1000>; | |
| qcom,mdss-pref-prim-intf = "dsi"; | |
| linux,phandle = <0x165>; | |
| phandle = <0x165>; | |
| qcom,mdss-pp-offsets { | |
| qcom,mdss-sspp-mdss-igc-lut-off = <0x2000>; | |
| qcom,mdss-sspp-vig-pcc-off = <0x1780>; | |
| qcom,mdss-sspp-rgb-pcc-off = <0x380>; | |
| qcom,mdss-sspp-dma-pcc-off = <0x380>; | |
| qcom,mdss-lm-pgc-off = <0x3c0>; | |
| qcom,mdss-dspp-pcc-off = <0x1700>; | |
| qcom,mdss-dspp-pgc-off = <0x17c0>; | |
| }; | |
| qcom,mdss-reg-bus { | |
| qcom,msm-bus,name = "mdss_reg"; | |
| qcom,msm-bus,num-cases = <0x04>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,active-only; | |
| qcom,msm-bus,vectors-KBps = <0x01 0x24e 0x00 0x00 0x01 0x24e 0x00 0x12c00 0x01 0x24e 0x00 0x27100 0x01 0x24e 0x00 0x4e200>; | |
| }; | |
| qcom,mdss-hw-rt-bus { | |
| qcom,msm-bus,name = "mdss_hw_rt"; | |
| qcom,msm-bus,num-cases = <0x02>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x16 0x200 0x00 0x00 0x16 0x200 0x00 0x3e8>; | |
| }; | |
| qcom,smmu_mdp_unsec_cb { | |
| compatible = "qcom,smmu_mdp_unsec"; | |
| }; | |
| qcom,smmu_mdp_sec_cb { | |
| compatible = "qcom,smmu_mdp_sec"; | |
| }; | |
| qcom,mdss_fb_primary { | |
| cell-index = <0x00>; | |
| compatible = "qcom,mdss-fb"; | |
| linux,phandle = <0x163>; | |
| phandle = <0x163>; | |
| qcom,cont-splash-memory { | |
| linux,contiguous-region = <0x162>; | |
| }; | |
| }; | |
| qcom,mdss_fb_wfd { | |
| cell-index = <0x01>; | |
| compatible = "qcom,mdss-fb"; | |
| linux,phandle = <0x16b>; | |
| phandle = <0x16b>; | |
| }; | |
| qcom,mdss_fb_secondary { | |
| cell-index = <0x02>; | |
| compatible = "qcom,mdss-fb"; | |
| linux,phandle = <0x164>; | |
| phandle = <0x164>; | |
| }; | |
| qcom,mdss_dsi_mot_dummy_qhd_video { | |
| qcom,mdss-dsi-panel-name = "mipi_mot_video_dummy_qhd"; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x00>; | |
| qcom,mdss-dsi-stream = <0x00>; | |
| qcom,mdss-dsi-panel-width = <0x21c>; | |
| qcom,mdss-dsi-panel-height = <0x3c0>; | |
| qcom,mdss-pan-physical-width-dimension = <0x36>; | |
| qcom,mdss-pan-physical-height-dimension = <0x5f>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-back-porch = <0x04>; | |
| qcom,mdss-dsi-h-pulse-width = <0x20>; | |
| qcom,mdss-dsi-h-sync-skew = <0x00>; | |
| qcom,mdss-dsi-v-back-porch = <0x10>; | |
| qcom,mdss-dsi-v-front-porch = <0x0f>; | |
| qcom,mdss-dsi-v-pulse-width = <0x01>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x00>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-h-sync-pulse = <0x00>; | |
| qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-tx-eot-append; | |
| qcom,mdss-dsi-panel-timings = <0x821c1200 0x4042161e 0x14030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x1b>; | |
| qcom,mdss-dsi-t-clk-pre = <0x1b>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-reset-sequence = <0x01 0x00>; | |
| qcom,mdss-dsi-bl-min-level = <0x01>; | |
| qcom,mdss-dsi-bl-max-level = <0xff>; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; | |
| qcom,mdss-dsi-panel-timings-phy-v2 = <0x1e1b0406 0x20304a0 0x1e1b0406 0x20304a0 0x1e1b0406 0x20304a0 0x1e1b0406 0x20304a0 0x1e0d0405 0x20304a0>; | |
| }; | |
| qcom,mdss_dsi_mot_tianma_497_1080p_video_v0 { | |
| compatible = "qcom,mdss-dsi-panel"; | |
| qcom,mdss-dsi-panel-name = "mipi_mot_vid_tianma_1080p_497"; | |
| qcom,mdss-dsi-panel-supplier = "tianma"; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x00>; | |
| qcom,mdss-dsi-stream = <0x00>; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-panel-height = <0x780>; | |
| qcom,mdss-pan-physical-width-dimension = <0x3e>; | |
| qcom,mdss-pan-physical-height-dimension = <0x6e>; | |
| qcom,mdss-dsi-panel-clockrate = <0x37e57900>; | |
| qcom,mdss-dsi-h-front-porch = <0x78>; | |
| qcom,mdss-dsi-h-back-porch = <0x78>; | |
| qcom,mdss-dsi-h-pulse-width = <0x14>; | |
| qcom,mdss-dsi-h-sync-skew = <0x00>; | |
| qcom,mdss-dsi-v-back-porch = <0x08>; | |
| qcom,mdss-dsi-v-front-porch = <0x0e>; | |
| qcom,mdss-dsi-v-pulse-width = <0x02>; | |
| qcom,mdss-dsi-h-left-border = <0x00>; | |
| qcom,mdss-dsi-h-right-border = <0x00>; | |
| qcom,mdss-dsi-v-top-border = <0x00>; | |
| qcom,mdss-dsi-v-bottom-border = <0x00>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x00>; | |
| qcom,mdss-dsi-on-command = [15 00 00 00 00 00 02 ff ee 15 01 00 00 0a 00 02 18 40 15 01 00 00 0a 00 02 18 00 15 00 00 00 00 00 02 ff 00 15 00 00 00 00 00 02 fb 01 15 00 00 00 00 00 02 d3 0a 15 00 00 00 00 00 02 d4 0e 05 01 00 00 78 00 01 11 15 00 00 00 00 00 02 51 cc 15 00 00 00 00 00 02 53 2c 15 00 00 00 00 00 02 55 01 05 01 00 00 00 00 01 29]; | |
| qcom,mdss-dsi-off-command = <0x5000000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-cabc-ui-command = [15 01 00 00 00 00 02 55 01]; | |
| qcom,mdss-dsi-cabc-ui-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-cabc-mv-command = [15 01 00 00 00 00 02 55 03]; | |
| qcom,mdss-dsi-cabc-mv-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-cabc-dis-command = [15 01 00 00 00 00 02 55 00]; | |
| qcom,mdss-dsi-cabc-dis-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-hbm-on-command = [15 01 00 00 00 00 02 51 ff]; | |
| qcom,mdss-dsi-hbm-on-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-hbm-off-command = [15 01 00 00 00 00 02 51 cc]; | |
| qcom,mdss-dsi-hbm-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-hbm-type = "lcd-dcs-wled"; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-h-sync-pulse = <0x00>; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-timings = <0xf23a2800 0x6c702c3e 0x2e030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x02>; | |
| qcom,mdss-dsi-t-clk-pre = <0x2d>; | |
| qcom,mdss-dsi-bl-min-level = <0x01>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-dsi-reset-sequence = <0x01 0x02 0x00 0x02 0x01 0x02 0x00 0x02 0x01 0x14>; | |
| qcom,mdss-dsi-lp11-init; | |
| qcom,mdss-dsi-tx-eot-append; | |
| qcom,esd-check-enabled; | |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; | |
| qcom,mdss-dsi-panel-status-read-length = <0x01>; | |
| qcom,mdss-dsi-panel-status-command = <0x6010001 0x10a>; | |
| qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-panel-status-value = <0x9c>; | |
| linux,phandle = <0x166>; | |
| phandle = <0x166>; | |
| qcom,panel-supply-entries { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| qcom,panel-supply-entry@0 { | |
| reg = <0x00>; | |
| qcom,supply-name = "vddio_disp"; | |
| qcom,supply-min-voltage = <0x1b7740>; | |
| qcom,supply-max-voltage = <0x1b7740>; | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-disable-load = <0x64>; | |
| qcom,supply-pre-on-sleep = <0x00>; | |
| qcom,supply-post-on-sleep = <0x01>; | |
| qcom,supply-pre-off-sleep = <0x00>; | |
| qcom,supply-post-off-sleep = <0x01>; | |
| }; | |
| qcom,panel-supply-entry@1 { | |
| reg = <0x01>; | |
| qcom,supply-name = "vsp_disp"; | |
| qcom,supply-min-voltage = <0x53ec60>; | |
| qcom,supply-max-voltage = <0x53ec60>; | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-disable-load = <0x64>; | |
| qcom,supply-pre-on-sleep = <0x00>; | |
| qcom,supply-post-on-sleep = <0x01>; | |
| qcom,supply-pre-off-sleep = <0x00>; | |
| qcom,supply-post-off-sleep = <0x01>; | |
| }; | |
| qcom,panel-supply-entry@2 { | |
| reg = <0x02>; | |
| qcom,supply-name = "vsn_disp"; | |
| qcom,supply-min-voltage = <0x53ec60>; | |
| qcom,supply-max-voltage = <0x53ec60>; | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-disable-load = <0x64>; | |
| qcom,supply-pre-on-sleep = <0x00>; | |
| qcom,supply-post-on-sleep = <0x0b>; | |
| qcom,supply-pre-off-sleep = <0x00>; | |
| qcom,supply-post-off-sleep = <0x01>; | |
| }; | |
| }; | |
| }; | |
| qcom,mdss_dsi_mot_inx_497_1080p_video_v0 { | |
| compatible = "qcom,mdss-dsi-panel"; | |
| qcom,mdss-dsi-panel-name = "mipi_mot_vid_inx_1080p_497"; | |
| qcom,mdss-dsi-panel-supplier = "inx"; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x00>; | |
| qcom,mdss-dsi-stream = <0x00>; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-panel-height = <0x780>; | |
| qcom,mdss-pan-physical-width-dimension = <0x3e>; | |
| qcom,mdss-pan-physical-height-dimension = <0x6e>; | |
| qcom,mdss-dsi-panel-clockrate = <0x37e57900>; | |
| qcom,mdss-dsi-h-front-porch = <0x78>; | |
| qcom,mdss-dsi-h-back-porch = <0x78>; | |
| qcom,mdss-dsi-h-pulse-width = <0x14>; | |
| qcom,mdss-dsi-h-sync-skew = <0x00>; | |
| qcom,mdss-dsi-v-back-porch = <0x08>; | |
| qcom,mdss-dsi-v-front-porch = <0x0e>; | |
| qcom,mdss-dsi-v-pulse-width = <0x02>; | |
| qcom,mdss-dsi-h-left-border = <0x00>; | |
| qcom,mdss-dsi-h-right-border = <0x00>; | |
| qcom,mdss-dsi-v-top-border = <0x00>; | |
| qcom,mdss-dsi-v-bottom-border = <0x00>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x00>; | |
| qcom,mdss-dsi-on-command = [15 00 00 00 00 00 02 ff ee 15 01 00 00 0a 00 02 18 40 15 01 00 00 0a 00 02 18 00 15 00 00 00 00 00 02 ff 00 15 00 00 00 00 00 02 fb 01 15 00 00 00 00 00 02 d3 0a 15 00 00 00 00 00 02 d4 0e 05 01 00 00 78 00 01 11 15 00 00 00 00 00 02 51 cc 15 00 00 00 00 00 02 53 2c 15 00 00 00 00 00 02 55 01 05 01 00 00 00 00 01 29]; | |
| qcom,mdss-dsi-off-command = <0x5000000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-cabc-ui-command = [15 01 00 00 00 00 02 55 01]; | |
| qcom,mdss-dsi-cabc-ui-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-cabc-mv-command = [15 01 00 00 00 00 02 55 03]; | |
| qcom,mdss-dsi-cabc-mv-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-cabc-dis-command = [15 01 00 00 00 00 02 55 00]; | |
| qcom,mdss-dsi-cabc-dis-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-hbm-on-command = [15 01 00 00 00 00 02 51 ff]; | |
| qcom,mdss-dsi-hbm-on-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-hbm-off-command = [15 01 00 00 00 00 02 51 cc]; | |
| qcom,mdss-dsi-hbm-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-hbm-type = "lcd-dcs-wled"; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-h-sync-pulse = <0x00>; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-timings = <0xf23a2800 0x6c702c3e 0x2e030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x02>; | |
| qcom,mdss-dsi-t-clk-pre = <0x2d>; | |
| qcom,mdss-dsi-bl-min-level = <0x01>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-dsi-reset-sequence = <0x01 0x02 0x00 0x02 0x01 0x02 0x00 0x02 0x01 0x14>; | |
| qcom,mdss-dsi-lp11-init; | |
| qcom,mdss-dsi-tx-eot-append; | |
| qcom,esd-check-enabled; | |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; | |
| qcom,mdss-dsi-panel-status-read-length = <0x01>; | |
| qcom,mdss-dsi-panel-status-command = <0x6010001 0x10a>; | |
| qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-panel-status-value = <0x9c>; | |
| qcom,panel-supply-entries { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| qcom,panel-supply-entry@0 { | |
| reg = <0x00>; | |
| qcom,supply-name = "vddio_disp"; | |
| qcom,supply-min-voltage = <0x1b7740>; | |
| qcom,supply-max-voltage = <0x1b7740>; | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-disable-load = <0x64>; | |
| qcom,supply-pre-on-sleep = <0x00>; | |
| qcom,supply-post-on-sleep = <0x01>; | |
| qcom,supply-pre-off-sleep = <0x00>; | |
| qcom,supply-post-off-sleep = <0x01>; | |
| }; | |
| qcom,panel-supply-entry@1 { | |
| reg = <0x01>; | |
| qcom,supply-name = "vsp_disp"; | |
| qcom,supply-min-voltage = <0x53ec60>; | |
| qcom,supply-max-voltage = <0x53ec60>; | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-disable-load = <0x64>; | |
| qcom,supply-pre-on-sleep = <0x00>; | |
| qcom,supply-post-on-sleep = <0x01>; | |
| qcom,supply-pre-off-sleep = <0x00>; | |
| qcom,supply-post-off-sleep = <0x01>; | |
| }; | |
| qcom,panel-supply-entry@2 { | |
| reg = <0x02>; | |
| qcom,supply-name = "vsn_disp"; | |
| qcom,supply-min-voltage = <0x53ec60>; | |
| qcom,supply-max-voltage = <0x53ec60>; | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-disable-load = <0x64>; | |
| qcom,supply-pre-on-sleep = <0x00>; | |
| qcom,supply-post-on-sleep = <0x0b>; | |
| qcom,supply-pre-off-sleep = <0x00>; | |
| qcom,supply-post-off-sleep = <0x01>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| qcom,mdss_dsi@0 { | |
| compatible = "qcom,mdss-dsi"; | |
| hw-config = "single_dsi"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| gdsc-supply = <0x109>; | |
| vdda-supply = <0xe7>; | |
| vddio-supply = <0x122>; | |
| qcom,msm-bus,name = "mdss_dsi"; | |
| qcom,msm-bus,num-cases = <0x02>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x16 0x200 0x00 0x00 0x16 0x200 0x00 0x3e8>; | |
| ranges = <0x1a94000 0x1a94000 0x300 0x1a94400 0x1a94400 0x280 0x1a94b80 0x1a94b80 0x30 0x193e000 0x193e000 0x30 0x1a96000 0x1a96000 0x300 0x1a96400 0x1a96400 0x280 0x1a96b80 0x1a96b80 0x30 0x193e000 0x193e000 0x30>; | |
| clocks = <0x161 0x588460a4 0x2b 0xbfb92ed3 0x2b 0x668f51de 0x161 0xfb32f31e 0x161 0x585ef6d4 0x161 0x87c1612 0x161 0x8067c5a3>; | |
| clock-names = "mdp_core_clk\0iface_clk\0bus_clk\0ext_byte0_clk\0ext_byte1_clk\0ext_pixel0_clk\0ext_pixel1_clk"; | |
| qcom,mmss-ulp-clamp-ctrl-offset = <0x20>; | |
| qcom,mmss-phyreset-ctrl-offset = <0x24>; | |
| qcom,mdss-fb-map-prim = <0x163>; | |
| qcom,mdss-fb-map-sec = <0x164>; | |
| qcom,core-supply-entries { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| qcom,core-supply-entry@0 { | |
| reg = <0x00>; | |
| qcom,supply-name = "gdsc"; | |
| qcom,supply-min-voltage = <0x00>; | |
| qcom,supply-max-voltage = <0x00>; | |
| qcom,supply-enable-load = <0x00>; | |
| qcom,supply-disable-load = <0x00>; | |
| }; | |
| }; | |
| qcom,ctrl-supply-entries { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| qcom,ctrl-supply-entry@0 { | |
| reg = <0x00>; | |
| qcom,supply-name = "vdda"; | |
| qcom,supply-min-voltage = <0x124f80>; | |
| qcom,supply-max-voltage = <0x124f80>; | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-disable-load = <0x64>; | |
| qcom,supply-post-on-sleep = <0x14>; | |
| }; | |
| }; | |
| qcom,phy-supply-entries { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| qcom,phy-supply-entry@0 { | |
| reg = <0x00>; | |
| qcom,supply-name = "vddio"; | |
| qcom,supply-min-voltage = <0x1b7740>; | |
| qcom,supply-max-voltage = <0x1b7740>; | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-disable-load = <0x64>; | |
| }; | |
| }; | |
| qcom,mdss_dsi_ctrl0@1a94000 { | |
| compatible = "qcom,mdss-dsi-ctrl"; | |
| label = "MDSS DSI CTRL->0"; | |
| cell-index = <0x00>; | |
| reg = <0x1a94000 0x300 0x1a94400 0x280 0x1a94b80 0x30 0x193e000 0x30>; | |
| reg-names = "dsi_ctrl\0dsi_phy\0dsi_phy_regulator\0mmss_misc_phys"; | |
| qcom,timing-db-mode; | |
| qcom,mdss-mdp = <0x165>; | |
| vdd-supply = <0x121>; | |
| vddio-supply = <0x122>; | |
| clocks = <0x161 0x35da7862 0x161 0xcc5c5c77 0x2b 0xaec5cb25 0x161 0x75cc885b 0x161 0xccac1f35>; | |
| clock-names = "byte_clk\0pixel_clk\0core_clk\0byte_clk_rcg\0pixel_clk_rcg"; | |
| qcom,platform-strength-ctrl = [ff 06]; | |
| qcom,platform-bist-ctrl = [00 00 b1 ff 00 00]; | |
| qcom,platform-regulator-settings = [03 08 07 00 20 07 01]; | |
| qcom,platform-lane-config = [01 c0 00 00 00 00 00 01 97 01 c0 00 00 05 00 00 01 97 01 c0 00 00 0a 00 00 01 97 01 c0 00 00 0f 00 00 01 97 00 40 00 00 00 00 00 01 ff]; | |
| qcom,display-id = "primary"; | |
| qcom,dsi-pref-prim-pan = <0x166>; | |
| vddio_disp-supply = <0x122>; | |
| vsp_disp-supply = <0x167>; | |
| vsn_disp-supply = <0x168>; | |
| pinctrl-names = "mdss_default\0mdss_sleep"; | |
| pinctrl-0 = <0x169>; | |
| pinctrl-1 = <0x16a>; | |
| qcom,platform-reset-gpio = <0xa7 0x3c 0x00>; | |
| }; | |
| qcom,mdss_dsi_ctrl1@1a96000 { | |
| compatible = "qcom,mdss-dsi-ctrl"; | |
| label = "MDSS DSI CTRL->1"; | |
| cell-index = <0x01>; | |
| reg = <0x1a96000 0x300 0x1a96400 0x280 0x1a94b80 0x30 0x193e000 0x30>; | |
| reg-names = "dsi_ctrl\0dsi_phy\0dsi_phy_regulator\0mmss_misc_phys"; | |
| qcom,mdss-mdp = <0x165>; | |
| vdd-supply = <0x121>; | |
| vddio-supply = <0x122>; | |
| clocks = <0x161 0x41f97fd8 0x161 0x9a9c430d 0x2b 0x34653cc7 0x161 0x63c2c955 0x161 0x90f68ac>; | |
| clock-names = "byte_clk\0pixel_clk\0core_clk\0byte_clk_rcg\0pixel_clk_rcg"; | |
| qcom,platform-strength-ctrl = [ff 06]; | |
| qcom,platform-bist-ctrl = [00 00 b1 ff 00 00]; | |
| qcom,platform-regulator-settings = [03 08 07 00 20 07 01]; | |
| qcom,platform-lane-config = [01 c0 00 00 00 00 00 01 97 01 c0 00 00 05 00 00 01 97 01 c0 00 00 0a 00 00 01 97 01 c0 00 00 0f 00 00 01 97 00 40 00 00 00 00 00 01 ff]; | |
| }; | |
| }; | |
| qcom,mdss_wb_panel { | |
| compatible = "qcom,mdss_wb"; | |
| qcom,mdss_pan_res = <0x280 0x280>; | |
| qcom,mdss_pan_bpp = <0x18>; | |
| qcom,mdss-fb-map = <0x16b>; | |
| }; | |
| qcom,mdss_rotator { | |
| compatible = "qcom,mdss_rotator"; | |
| qcom,mdss-wb-count = <0x01>; | |
| qcom,mdss-has-downscale; | |
| qcom,mdss-has-ubwc; | |
| qcom,msm-bus,name = "mdss_rotator"; | |
| qcom,msm-bus,num-cases = <0x03>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x16 0x200 0x00 0x00 0x16 0x200 0x00 0x61a800 0x16 0x200 0x00 0x61a800>; | |
| rot-vdd-supply = <0x109>; | |
| qcom,supply-names = "rot-vdd"; | |
| qcom,mdss-has-reg-bus; | |
| clocks = <0x2b 0xbfb92ed3 0x161 0x5b1f675e>; | |
| clock-names = "iface_clk\0rot_core_clk"; | |
| qcom,mdss-rot-reg-bus { | |
| qcom,msm-bus,name = "mdss_rot_reg"; | |
| qcom,msm-bus,num-cases = <0x02>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,active-only; | |
| qcom,msm-bus,vectors-KBps = <0x01 0x24e 0x00 0x00 0x01 0x24e 0x00 0x12c00>; | |
| }; | |
| }; | |
| qcom,mdss_dsi_pll@1a94a00 { | |
| compatible = "qcom,mdss_dsi_pll_8937"; | |
| label = "MDSS DSI 0 PLL"; | |
| cell-index = <0x00>; | |
| #clock-cells = <0x01>; | |
| reg = <0x1a94a00 0xd4 0x184d074 0x08>; | |
| reg-names = "pll_base\0gdsc_base"; | |
| gdsc-supply = <0x109>; | |
| vddio-supply = <0x122>; | |
| clocks = <0x2b 0xbfb92ed3>; | |
| clock-names = "iface_clk"; | |
| clock-rate = <0x00>; | |
| qcom,dsi-pll-ssc-en; | |
| qcom,dsi-pll-ssc-mode = "down-spread"; | |
| qcom,ssc-frequency-hz = <0x7530>; | |
| qcom,ssc-ppm = <0x1388>; | |
| linux,phandle = <0xd5>; | |
| phandle = <0xd5>; | |
| qcom,platform-supply-entries { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| qcom,platform-supply-entry@0 { | |
| reg = <0x00>; | |
| qcom,supply-name = "gdsc"; | |
| qcom,supply-min-voltage = <0x00>; | |
| qcom,supply-max-voltage = <0x00>; | |
| qcom,supply-enable-load = <0x00>; | |
| qcom,supply-disable-load = <0x00>; | |
| }; | |
| qcom,platform-supply-entry@1 { | |
| reg = <0x01>; | |
| qcom,supply-name = "vddio"; | |
| qcom,supply-min-voltage = <0x1b7740>; | |
| qcom,supply-max-voltage = <0x1b7740>; | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-disable-load = <0x64>; | |
| }; | |
| }; | |
| }; | |
| qcom,mdss_dsi_pll@1a96a00 { | |
| compatible = "qcom,mdss_dsi_pll_8937"; | |
| label = "MDSS DSI 1 PLL"; | |
| cell-index = <0x01>; | |
| #clock-cells = <0x01>; | |
| reg = <0x1a96a00 0xd4 0x184d074 0x08>; | |
| reg-names = "pll_base\0gdsc_base"; | |
| gdsc-supply = <0x109>; | |
| vddio-supply = <0x122>; | |
| clocks = <0x2b 0xbfb92ed3>; | |
| clock-names = "iface_clk"; | |
| clock-rate = <0x00>; | |
| qcom,dsi-pll-ssc-en; | |
| qcom,dsi-pll-ssc-mode = "down-spread"; | |
| qcom,ssc-frequency-hz = <0x7530>; | |
| qcom,ssc-ppm = <0x1388>; | |
| linux,phandle = <0xd6>; | |
| phandle = <0xd6>; | |
| qcom,platform-supply-entries { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| qcom,platform-supply-entry@0 { | |
| reg = <0x00>; | |
| qcom,supply-name = "gdsc"; | |
| qcom,supply-min-voltage = <0x00>; | |
| qcom,supply-max-voltage = <0x00>; | |
| qcom,supply-enable-load = <0x00>; | |
| qcom,supply-disable-load = <0x00>; | |
| }; | |
| qcom,platform-supply-entry@1 { | |
| reg = <0x01>; | |
| qcom,supply-name = "vddio"; | |
| qcom,supply-min-voltage = <0x1b7740>; | |
| qcom,supply-max-voltage = <0x1b7740>; | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-disable-load = <0x64>; | |
| }; | |
| }; | |
| }; | |
| alsa_to_h2w { | |
| compatible = "mmi,alsa-to-h2w"; | |
| }; | |
| spi@7af7000 { | |
| compatible = "qcom,spi-qup-v2"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg-names = "spi_physical\0spi_bam_physical"; | |
| reg = <0x7af7000 0x600 0x7ac4000 0x1f000>; | |
| interrupt-names = "spi_irq\0spi_bam_irq"; | |
| interrupts = <0x00 0x12d 0x00 0x00 0xef 0x00>; | |
| spi-max-frequency = <0x124f800>; | |
| pinctrl-names = "spi_default\0spi_sleep"; | |
| pinctrl-0 = <0x16c 0x16d>; | |
| pinctrl-1 = <0x16e 0x16f>; | |
| clocks = <0x2b 0x8f283c1d 0x2b 0xc68509d6>; | |
| clock-names = "iface_clk\0core_clk"; | |
| qcom,infinite-mode = <0x00>; | |
| qcom,use-bam; | |
| qcom,use-pinctrl; | |
| qcom,ver-reg-exists; | |
| qcom,bam-consumer-pipe-index = <0x08>; | |
| qcom,bam-producer-pipe-index = <0x09>; | |
| qcom,master-id = <0x54>; | |
| status = "/chosen\0mmi,dtv\0true"; | |
| fc8180@0 { | |
| status = "/chosen\0mmi,dtv\0true"; | |
| compatible = "fci,isdbt"; | |
| reg = <0x00>; | |
| spi-max-frequency = <0x124f800>; | |
| irq-gpio = <0xa7 0x32 0x00>; | |
| anten-gpio = <0xa7 0x60 0x00>; | |
| enable-gpio = <0xa7 0x5e 0x00>; | |
| enable-active-high; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x170 0x171>; | |
| clocks = <0x2b 0xfe15cb87>; | |
| clock-names = "dtv_refclk"; | |
| isdbt_vdd-supply = <0x122>; | |
| qcom,vdd-min-max-voltage = <0x1b7740 0x1b7740>; | |
| qcom,bbm-xtal-freq = <0x6590>; | |
| }; | |
| }; | |
| sys_temp_support { | |
| compatible = "mmi,sys-temp"; | |
| mmi,temperature-names = "front_temp\0back_temp"; | |
| status = "ok"; | |
| }; | |
| spi@78b8000 { | |
| compatible = "qcom,spi-qup-v2"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg-names = "spi_physical\0spi_bam_physical"; | |
| reg = <0x78b8000 0x600 0x7884000 0x1f000>; | |
| interrupt-names = "spi_irq\0spi_bam_irq"; | |
| interrupts = <0x00 0x62 0x00 0x00 0xee 0x00>; | |
| spi-max-frequency = <0x124f800>; | |
| pinctrl-names = "spi_default\0spi_sleep"; | |
| pinctrl-0 = <0x172 0x173>; | |
| pinctrl-1 = <0x174 0x175>; | |
| clock-names = "iface_clk\0core_clk"; | |
| clocks = <0x2b 0x8caa5b4f 0x2b 0x80f8722f>; | |
| qcom,infinite-mode = <0x00>; | |
| qcom,use-bam; | |
| qcom,use-pinctrl; | |
| qcom,ver-reg-exists; | |
| qcom,bam-consumer-pipe-index = <0x0a>; | |
| qcom,bam-producer-pipe-index = <0x0b>; | |
| qcom,master-id = <0x56>; | |
| status = "okay"; | |
| stml0xx@0 { | |
| compatible = "stm,stml0xx"; | |
| stml0xx_fw_version = "stml05x"; | |
| status = "okay"; | |
| reg = <0x00>; | |
| spi-max-frequency = <0x7a1200>; | |
| gpios = <0xa7 0x2a 0x00 0xa7 0x2b 0x00 0xa7 0x2c 0x00 0xa7 0x2d 0x00 0xa7 0x7c 0x00 0xa7 0x7e 0x00 0xa7 0x29 0x00>; | |
| lux_table = <0x05 0x32 0x64 0x5dc 0xbb8 0x1f40>; | |
| brightness_table = <0x09 0x0e 0x12 0x2e 0x43 0x5d 0x8c>; | |
| bslen_pin_active_value = <0x01>; | |
| ct406_detect_threshold = <0x6a4>; | |
| ct406_undetect_threshold = <0x578>; | |
| ct406_recalibrate_threshold = <0x58c>; | |
| ct406_pulse_count = <0x02>; | |
| ct406_prox_gain = <0x11>; | |
| ct406_als_lux1_c0_mult = <0x02>; | |
| ct406_als_lux1_c1_mult = <0xfa>; | |
| ct406_als_lux1_div = <0x743>; | |
| ct406_als_lux2_c0_mult = <0x388>; | |
| ct406_als_lux2_c1_mult = <0x388>; | |
| ct406_als_lux2_div = <0x1ec>; | |
| dsp_iface_enable = <0x00>; | |
| headset_detect_enable = <0x00>; | |
| headset_hw_version = <0x02>; | |
| headset_insertion_debounce = <0x1f4>; | |
| headset_removal_debounce = <0x80>; | |
| headset_button_down_debounce = <0x32>; | |
| headset_button_up_debounce = <0x32>; | |
| headset_button_0-1_threshold = <0x9d>; | |
| headset_button_1-2_threshold = <0x145>; | |
| headset_button_2-3_threshold = <0x201>; | |
| headset_button_3-upper_threshold = <0x3b0>; | |
| headset_button_1_keycode = <0xe2>; | |
| headset_button_2_keycode = <0x246>; | |
| headset_button_3_keycode = <0x73>; | |
| headset_button_4_keycode = <0x72>; | |
| cover_detect_polarity = <0x01>; | |
| reset_hw_type = <0x01>; | |
| accel_orientation_1 = <0x07>; | |
| accel_orientation_2 = <0x01>; | |
| accel_swap = <0x00>; | |
| mag_layout = <0x03>; | |
| sensor1-supply = <0xca>; | |
| sensor2-supply = <0xb6>; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x176 0x177 0x178 0x179>; | |
| }; | |
| }; | |
| gpio_keys { | |
| compatible = "gpio-keys"; | |
| input-name = "gpio-keys"; | |
| pinctrl-names = "tlmm_gpio_key_active\0tlmm_gpio_key_suspend"; | |
| pinctrl-0 = <0x17a>; | |
| pinctrl-1 = <0x17b>; | |
| vol_up { | |
| label = "volume_up"; | |
| gpios = <0xa7 0x5b 0x01>; | |
| linux,input-type = <0x01>; | |
| linux,code = <0x73>; | |
| debounce-interval = <0x0f>; | |
| }; | |
| }; | |
| ramoops { | |
| compatible = "ramoops"; | |
| status = "ok"; | |
| android,ramoops-buffer-start = <0xae000000>; | |
| android,ramoops-buffer-size = <0x80000>; | |
| android,ramoops-console-size = <0x40000>; | |
| android,ramoops-record-size = <0x3f800>; | |
| android,ramoops-annotate-size = <0x800>; | |
| android,ramoops-dump-oops = <0x01>; | |
| linux,contiguous-region = <0x17c>; | |
| }; | |
| qcom,camera-flash { | |
| cell-index = <0x00>; | |
| compatible = "qcom,camera-flash"; | |
| qcom,flash-type = <0x01>; | |
| qcom,flash-source = <0x17d 0x17e>; | |
| qcom,torch-source = <0x17f 0x180>; | |
| qcom,switch-source = <0x181>; | |
| linux,phandle = <0x12c>; | |
| phandle = <0x12c>; | |
| }; | |
| spi@7af6000 { | |
| compatible = "qcom,spi-qup-v2"; | |
| status = "ok"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg-names = "spi_physical"; | |
| reg = <0x7af6000 0x600>; | |
| interrupt-names = "spi_irq"; | |
| interrupts = <0x00 0x12c 0x00>; | |
| spi-max-frequency = <0x124f800>; | |
| pinctrl-names = "spi_default\0spi_sleep"; | |
| pinctrl-0 = <0x182>; | |
| pinctrl-1 = <0x183>; | |
| qcom,infinite-mode = <0x00>; | |
| qcom,master-id = <0x54>; | |
| qcom,use-pinctrl; | |
| fpc_fpc1020@0 { | |
| compatible = "fpc,fpc1020"; | |
| status = "ok"; | |
| reg = <0x00>; | |
| interrupts = <0x80 0x00>; | |
| spi-max-frequency = "\0I>"; | |
| fpc,gpio_irq = <0xa7 0x80 0x00>; | |
| fpc,gpio_rst = <0xa7 0x7f 0x00>; | |
| fpc,gpio_ldo_en = <0xa7 0x84 0x00>; | |
| fpc,wakelock_time = <0x5dc>; | |
| pinctrl-names = "default\0suspend"; | |
| pinctrl-0 = <0x184 0x185 0x186>; | |
| pinctrl-1 = <0x187 0x188 0x189>; | |
| fpc,txout_boost_enable; | |
| clock-names = "iface_clk\0core_clk"; | |
| clocks = <0x2b 0x8f283c1d 0x2b 0xbf54ca6d>; | |
| }; | |
| }; | |
| vdda_touch_vreg { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "vdda_touch"; | |
| gpio = <0xa7 0x3b 0x00>; | |
| startup-delay-us = <0x12c>; | |
| enable-active-high; | |
| linux,phandle = <0xd1>; | |
| phandle = <0xd1>; | |
| }; | |
| }; | |
| chosen { | |
| mmi,reserve = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>; | |
| mmi,ecompass = "false"; | |
| mmi,nfc = "false"; | |
| mmi,dtv = "false"; | |
| mmi,fps = "true"; | |
| mmi,imager = "13MP"; | |
| mmi,display_auto_detect = <0x00>; | |
| mmi,panel_ver = <0x00 0xc4d01a>; | |
| mmi,panel_name = "mipi_mot_video_tianma_1080p_497"; | |
| mmi,msm_hw = "MSM8937"; | |
| mmi,prod_id = <0x42>; | |
| linux,serialhigh = <0x6906fc92>; | |
| linux,seriallow = <0x00>; | |
| linux,hwrev = <0x8500>; | |
| mmi,boot_seq = <0x00>; | |
| mmi,mbmversion = <0xb831>; | |
| mmi,powerup_reason = <0x4000>; | |
| linux,initrd-end = <0x2376b777>; | |
| linux,initrd-start = "#`\0"; | |
| bootargs = "sched_enable_hmp=1 console=null androidboot.hardware=qcom user_debug=30 msm_rtb.filter=0x237 ehci-hcd.park=3 androidboot.bootdevice=7824900.sdhci lpm_levels.sleep_disabled=1 earlycon=msm_hsl_uart,0x78B0000 vmalloc=400M buildvariant=user androidboot.emmc=true androidboot.serialno=0123456789 androidboot.baseband=msm androidboot.mode=normal androidboot.device=cedric androidboot.hwrev=0x8500 androidboot.radio=EMEA androidboot.powerup_reason=0x00004000 androidboot.bootreason=reboot msm_poweroff.download_mode=0 androidboot.fsg-id= androidboot.wifimacaddr=FF:FF:FF:FF:FF:FF,FF:FF:FF:FF:FF:FF androidboot.btmacaddr=FF:FF:FF:FF:FF:FF mdss_mdp.panel=1:dsi:0:qcom,mdss_dsi_mot_tianma_497_1080p_video_v0 androidboot.bootloader=0xB831 androidboot.carrier=reteu androidboot.poweroff_alarm=0 androidboot.build_vars=NA androidboot.hardware.sku=XT1676 androidboot.secure_hardware=1 androidboot.bl_state=2 androidboot.cid=0x32 androidboot.uid=6906FC9200000000000000000000 androidboot.write_protect=0 androidboot.verifiedbootstate=orange androidboot.veritymode=enforcing androidboot.ssm_data=000000000200BBB1 androidboot.dualsim=true"; | |
| mmi,bl_sigs { | |
| mmi,reserve = <0x00 0x00 0x03 0x15 0x6814 0x636d6e6c 0x69623634 0x2e676974 0x3d336638 0x37613436 0x00 0x03 0x13 0x6812 0x636d6e6c 0x69622e67 0x69743d33 0x66383761 0x34360000 0x03 0x16 0x6810 0x6b65796d 0x61737465 0x722e6769 0x743d3366 0x38376134 0x36000000 0x03 0x13 0x680e 0x64657663 0x66672e67 0x69743d33 0x66383761 0x34360000 0x03 0x0f 0x680c 0x747a2e67 0x69743d33 0x66383761 0x34360000 0x03>; | |
| 8 = "aboot.git=MBM-NG-VB8.31-0-g0b9dae9"; | |
| 7 = "prov.git=3f87a46"; | |
| 6 = "cmnlib64.git=3f87a46"; | |
| 5 = "cmnlib.git=3f87a46"; | |
| 4 = "keymaster.git=3f87a46"; | |
| 3 = "devcfg.git=3f87a46"; | |
| 2 = "tz.git=3f87a46"; | |
| 1 = "rpm.git=bd76357-dirty"; | |
| 0 = "sbl1.git=MBM-NG-VB8.31-0-g77d3670"; | |
| }; | |
| mmi,storage { | |
| mmi,reserve = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>; | |
| firmware = "000000000000000D"; | |
| product = "RE1BMB"; | |
| manufacturer = "SAMSUNG"; | |
| size = "16GB"; | |
| type = "eMMC"; | |
| }; | |
| }; | |
| aliases { | |
| smd1 = "/soc/qcom,smdtty/qcom,smdtty-apps-fm"; | |
| smd2 = "/soc/qcom,smdtty/smdtty-apps-riva-bt-acl"; | |
| smd3 = "/soc/qcom,smdtty/qcom,smdtty-apps-riva-bt-cmd"; | |
| smd4 = "/soc/qcom,smdtty/qcom,smdtty-mbalbridge"; | |
| smd5 = "/soc/qcom,smdtty/smdtty-apps-riva-ant-cmd"; | |
| smd6 = "/soc/qcom,smdtty/smdtty-apps-riva-ant-data"; | |
| smd7 = "/soc/qcom,smdtty/qcom,smdtty-data1"; | |
| smd8 = "/soc/qcom,smdtty/qcom,smdtty-data4"; | |
| smd11 = "/soc/qcom,smdtty/qcom,smdtty-data11"; | |
| smd21 = "/soc/qcom,smdtty/qcom,smdtty-data21"; | |
| smd36 = "/soc/qcom,smdtty/smdtty-loopback"; | |
| i2c2 = "/soc/i2c@78b6000"; | |
| sdhc1 = "/soc/sdhci@7824900"; | |
| sdhc2 = "/soc/sdhci@7864900"; | |
| i2c3 = "/soc/i2c@78b7000"; | |
| spi4 = "/soc/spi@78b8000"; | |
| spi7 = "/soc/spi@7af7000"; | |
| spi6 = "/soc/spi@7af6000"; | |
| }; | |
| memory { | |
| device_type = "memory"; | |
| reg = <0x00 0x20000000 0x00 0x60000000 0x00 0x80000000 0x00 0x60000000>; | |
| }; | |
| firmware { | |
| android { | |
| compatible = "android,firmware"; | |
| fstab { | |
| compatible = "android,fstab"; | |
| system { | |
| compatible = "android,system"; | |
| dev = "/dev/block/platform/soc/7824900.sdhci/by-name/system"; | |
| type = "ext4"; | |
| mnt_flags = "ro,barrier=1,discard"; | |
| fsmgr_flags = <0x77616974 0x00 0x00>; | |
| status = "ok"; | |
| }; | |
| }; | |
| }; | |
| }; | |
| reserved-memory { | |
| #address-cells = <0x02>; | |
| #size-cells = <0x02>; | |
| ranges; | |
| other_ext_region@0 { | |
| compatible = "removed-dma-pool"; | |
| no-map; | |
| reg = <0x00 0x84300000 0x00 0x2500000>; | |
| }; | |
| modem_region@0 { | |
| compatible = "removed-dma-pool"; | |
| no-map; | |
| reg = <0x00 0x86800000 0x00 0x5000000>; | |
| linux,phandle = <0x10d>; | |
| phandle = <0x10d>; | |
| }; | |
| adsp_fw_region@0 { | |
| compatible = "removed-dma-pool"; | |
| no-map; | |
| reg = <0x00 0x8b800000 0x00 0x1100000>; | |
| linux,phandle = <0x110>; | |
| phandle = <0x110>; | |
| }; | |
| wcnss_fw_region@0 { | |
| compatible = "removed-dma-pool"; | |
| no-map; | |
| reg = <0x00 0x8c900000 0x00 0x700000>; | |
| linux,phandle = <0x113>; | |
| phandle = <0x113>; | |
| }; | |
| venus_region@0 { | |
| compatible = "shared-dma-pool"; | |
| reusable; | |
| alloc-ranges = <0x00 0x80000000 0x00 0x10000000>; | |
| alignment = <0x00 0x400000>; | |
| size = <0x00 0x800000>; | |
| linux,phandle = <0x114>; | |
| phandle = <0x114>; | |
| }; | |
| secure_region@0 { | |
| compatible = "shared-dma-pool"; | |
| reusable; | |
| alignment = <0x00 0x400000>; | |
| size = <0x00 0x7000000>; | |
| linux,phandle = <0x31>; | |
| phandle = <0x31>; | |
| }; | |
| qseecom_region@0 { | |
| compatible = "shared-dma-pool"; | |
| reusable; | |
| alignment = <0x00 0x400000>; | |
| size = <0x00 0x1000000>; | |
| linux,phandle = <0x32>; | |
| phandle = <0x32>; | |
| }; | |
| adsp_region@0 { | |
| compatible = "shared-dma-pool"; | |
| reusable; | |
| alignment = <0x00 0x400000>; | |
| size = <0x00 0x400000>; | |
| linux,phandle = <0xee>; | |
| phandle = <0xee>; | |
| }; | |
| splash_region@83000000 { | |
| reg = <0x00 0x90000000 0x00 0x1400000>; | |
| linux,phandle = <0x162>; | |
| phandle = <0x162>; | |
| }; | |
| ramoops_mem_region { | |
| no-map; | |
| reg = <0x00 0xae000000 0x00 0x80000>; | |
| label = "ramoops_mem"; | |
| linux,phandle = <0x17c>; | |
| phandle = <0x17c>; | |
| }; | |
| tzlog_bck_region { | |
| no-map; | |
| reg = <0x00 0xae400000 0x00 0x2000>; | |
| label = "tzlog_bck_mem"; | |
| linux,phandle = <0xed>; | |
| phandle = <0xed>; | |
| }; | |
| wdog_cpuctx_region { | |
| no-map; | |
| reg = <0x00 0xae800000 0x00 0x1a000>; | |
| label = "wdog_cpuctx_mem"; | |
| linux,phandle = <0xec>; | |
| phandle = <0xec>; | |
| }; | |
| }; | |
| psci { | |
| compatible = "arm,psci-1.0"; | |
| method = "smc"; | |
| }; | |
| utags { | |
| compatible = "mmi,utags"; | |
| mmi,main-utags = "/dev/block/bootdevice/by-name/utags"; | |
| mmi,backup-utags = "/dev/block/bootdevice/by-name/utagsBackup"; | |
| }; | |
| hw { | |
| compatible = "mmi,utags"; | |
| mmi,dir-name = "hw"; | |
| mmi,main-utags = "/dev/block/bootdevice/by-name/hw"; | |
| }; | |
| qcom,battery-data { | |
| qcom,batt-id-range-pct = <0x64>; | |
| df-serialnum = "SNN5976A"; | |
| linux,phandle = <0x107>; | |
| phandle = <0x107>; | |
| qcom,gk40-atl { | |
| serialnum = "SNN5976A"; | |
| qcom,max-voltage-uv = <0x432380>; | |
| qcom,nom-batt-capacity-mah = <0xaf0>; | |
| qcom,batt-id-kohm = <0x00>; | |
| qcom,battery-beta = <0xd6b>; | |
| qcom,battery-type = "GK40-ATL-2800mah"; | |
| qcom,chg-rslow-comp-c1 = <0x30df9f>; | |
| qcom,chg-rslow-comp-c2 = <0x42c844>; | |
| qcom,chg-rs-to-rslow = <0x1086fb>; | |
| qcom,chg-rslow-comp-thr = <0xa2>; | |
| qcom,checksum = <0xf2c1>; | |
| qcom,gui-version = "PMI8950GUI - 2.0.0.16"; | |
| qcom,fg-profile-data = <0xee83547d 0x7d81047c 0x5c832367 0x2e83d48d 0x57824098 0xe0b575c1 0x58140088 0x8c7d9281 0x97c5383 0x696a9e78 0x27865882 0x63999ebc 0x58c9590e 0x3c0bf759 0x1470d9fd 0x5c3ef43c 0x6e330000 0x545bb2a 0xae350000 0x00 0x00 0x4e70f86a 0xae714b88 0x426e985b 0x3564ab78 0xa86d0a60 0xf46f8fa2 0x157f63b7 0x64a0710c 0x2800ff36 0xf0113003 0x0c>; | |
| }; | |
| }; | |
| }; |
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment