Stackmap legalisation

blurb.md

Stackmap legalisation

Goal

The goal is to fix llvm/llvm-project#21657

TLDR: Passing illegally-typed live variable operands to llvm.experimental.stackmap (at -O1 or above) will make LLVM crash by an assertion failure.

The issue is that stackmap operands are emitted directly to target nodes in the selection DAG, which means their operands don't get legalised.

The diff below introduces a (non-target) stackmap DAG node, so that the stackmap node and its operands can take part in regular legalisations.

Progress

It works for some kinds of live variable, e.g. the failing example in the github issue now (appears to) work:

$ cat reg.ll
declare void @llvm.experimental.stackmap(i64, i32, ...)

define dso_local i32 @main(i32 %argc, i8** %argv) {
entry:
  %boom = icmp eq i32 %argc, 1
  call void (i64, i32, ...) @llvm.experimental.stackmap(i64 0, i32 0, i1 %boom)
  ret i32 0
}

Gives the stackmaps:

$ llvm-readelf a.out
LLVM StackMap Version: 3
Num Functions: 1
  Function address: 4400, stack size: 8, callsite record count: 1
Num Constants: 0
Num Records: 1
  Record ID: 0, instruction offset: 10
    1 locations:
      #1: Register R#0, size: 1
    0 live-outs: [ ]

And memory operands seem to work too:

declare void @llvm.experimental.stackmap(i64, i32, ...)

define dso_local i32 @main(i32 %argc, i8** %argv) {
entry:
  ;%boom = icmp eq i32 %argc, 1
  %a = alloca i32
  call void (i64, i32, ...) @llvm.experimental.stackmap(i64 0, i32 0, i32 %argc, i32* %a)
  ret i32 0
}

Gives:

LLVM StackMap Version: 3
Num Functions: 1
  Function address: 4400, stack size: 24, callsite record count: 1
Num Constants: 0
Num Records: 1
  Record ID: 0, instruction offset: 8
    2 locations:
      #1: Register R#5, size: 4
      #2: Direct R#6 + -4, size: 8
    0 live-outs: [ ]

The problem

Constant operands don't appear to work.

declare void @llvm.experimental.stackmap(i64, i32, ...)

define dso_local i32 @main(i32 %argc, i8** %argv) {
entry:
  call void (i64, i32, ...) @llvm.experimental.stackmap(i64 0, i32 0, i16 2)
  ret i32 0
}

Gives:

warning: overriding the module target triple with x86_64-unknown-linux-gnu [-Woverride-module]
Stackmap instr:  STACKMAP 0, 0, 2, implicit-def dead early-clobber $r11
Constant operand: implicit-def dead early-clobber $r11
clang-15: /home/vext01/research/ykllvm/llvm/lib/CodeGen/StackMaps.cpp:220: const llvm::MachineOperand* llvm::StackMaps::parseOperand(llvm::MachineInstr::const_mop_iterator, llvm::MachineInstr::const_mop_iterator, llvm::StackMaps::LocationVec&, llvm::StackMaps::LiveOutVec&) const: Assertion `MOI->isImm() && "Expected constant operand."' failed.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace, preprocessed source, and associated run script.
Stack dump:
0.	Program arguments: /home/vext01/research/ykllvm/build/bin/clang-15 -cc1 -triple x86_64-unknown-linux-gnu -emit-obj --mrelax-relocations -disable-free -clear-ast-before-backend -main-file-name const.ll -mrelocation-model pic -pic-level 2 -pic-is-pie -mframe-pointer=none -fmath-errno -ffp-contract=on -fno-rounding-math -mconstructor-aliases -funwind-tables=2 -target-cpu x86-64 -tune-cpu generic -mllvm -treat-scalable-fixed-error-as-warning -debugger-tuning=gdb -fcoverage-compilation-dir=/home/vext01/research/ykllvm -resource-dir /home/vext01/research/ykllvm/build/lib/clang/15.0.0 -O2 -fdebug-compilation-dir=/home/vext01/research/ykllvm -ferror-limit 19 -fgnuc-version=4.2.1 -vectorize-loops -vectorize-slp -faddrsig -D__GCC_HAVE_DWARF2_CFI_ASM=1 -o /tmp/const-d8a0ee.o -x ir const.ll
1.	Code generation
2.	Running pass 'Function Pass Manager' on module 'const.ll'.
3.	Running pass 'X86 Assembly Printer' on function '@main'
 #0 0x000055dd46dc7270 PrintStackTraceSignalHandler(void*) Signals.cpp:0:0
 #1 0x000055dd46dc4abc SignalHandler(int) Signals.cpp:0:0
 #2 0x00007f76cc797140 __restore_rt (/lib/x86_64-linux-gnu/libpthread.so.0+0x14140)
 #3 0x00007f76cc27ace1 raise ./signal/../sysdeps/unix/sysv/linux/raise.c:51:1
 #4 0x00007f76cc264537 abort ./stdlib/abort.c:81:7
 #5 0x00007f76cc26440f get_sysdep_segment_value ./intl/loadmsgcat.c:509:8
 #6 0x00007f76cc26440f _nl_load_domain ./intl/loadmsgcat.c:970:34
 #7 0x00007f76cc273662 (/lib/x86_64-linux-gnu/libc.so.6+0x34662)
 #8 0x000055dd46197140 llvm::StackMaps::parseOperand(llvm::MachineOperand const*, llvm::MachineOperand const*, llvm::SmallVector<llvm::StackMaps::Location, 8u>&, llvm::SmallVector<llvm::StackMaps::LiveOutReg, 8u>&) const (/home/vext01/research/ykllvm/build/bin/clang-15+0x2ec8140)
 #9 0x000055dd46199549 llvm::StackMaps::recordStackMapOpers(llvm::MCSymbol const&, llvm::MachineInstr const&, unsigned long, llvm::MachineOperand const*, llvm::MachineOperand const*, bool) (/home/vext01/research/ykllvm/build/bin/clang-15+0x2eca549)
#10 0x000055dd4619ab3d llvm::StackMaps::recordStackMap(llvm::MCSymbol const&, llvm::MachineInstr const&) (/home/vext01/research/ykllvm/build/bin/clang-15+0x2ecbb3d)
#11 0x000055dd4572a60e llvm::X86AsmPrinter::LowerSTACKMAP(llvm::MachineInstr const&) (/home/vext01/research/ykllvm/build/bin/clang-15+0x245b60e)
#12 0x000055dd45730a03 llvm::X86AsmPrinter::emitInstruction(llvm::MachineInstr const*) (/home/vext01/research/ykllvm/build/bin/clang-15+0x2461a03)
#13 0x000055dd47bd544f llvm::AsmPrinter::emitFunctionBody() (/home/vext01/research/ykllvm/build/bin/clang-15+0x490644f)
#14 0x000055dd4572244b llvm::X86AsmPrinter::runOnMachineFunction(llvm::MachineFunction&) (/home/vext01/research/ykllvm/build/bin/clang-15+0x245344b)
#15 0x000055dd45f702c0 llvm::MachineFunctionPass::runOnFunction(llvm::Function&) (/home/vext01/research/ykllvm/build/bin/clang-15+0x2ca12c0)
#16 0x000055dd46490e34 llvm::FPPassManager::runOnFunction(llvm::Function&) (/home/vext01/research/ykllvm/build/bin/clang-15+0x31c1e34)
#17 0x000055dd46491051 llvm::FPPassManager::runOnModule(llvm::Module&) (/home/vext01/research/ykllvm/build/bin/clang-15+0x31c2051)
#18 0x000055dd46491ce5 llvm::legacy::PassManagerImpl::run(llvm::Module&) (/home/vext01/research/ykllvm/build/bin/clang-15+0x31c2ce5)
#19 0x000055dd4714124e clang::EmitBackendOutput(clang::DiagnosticsEngine&, clang::HeaderSearchOptions const&, clang::CodeGenOptions const&, clang::TargetOptions const&, clang::LangOptions const&, llvm::StringRef, llvm::Module*, clang::BackendAction, std::unique_ptr<llvm::raw_pwrite_stream, std::default_delete<llvm::raw_pwrite_stream> >) (/home/vext01/research/ykllvm/build/bin/clang-15+0x3e7224e)
#20 0x000055dd47f87312 clang::CodeGenAction::ExecuteAction() (/home/vext01/research/ykllvm/build/bin/clang-15+0x4cb8312)
#21 0x000055dd47873f99 clang::FrontendAction::Execute() (/home/vext01/research/ykllvm/build/bin/clang-15+0x45a4f99)
#22 0x000055dd477fda86 clang::CompilerInstance::ExecuteAction(clang::FrontendAction&) (/home/vext01/research/ykllvm/build/bin/clang-15+0x452ea86)
#23 0x000055dd47935c48 clang::ExecuteCompilerInvocation(clang::CompilerInstance*) (/home/vext01/research/ykllvm/build/bin/clang-15+0x4666c48)
#24 0x000055dd444d256a cc1_main(llvm::ArrayRef<char const*>, char const*, void*) (/home/vext01/research/ykllvm/build/bin/clang-15+0x120356a)
#25 0x000055dd444cde84 ExecuteCC1Tool(llvm::SmallVectorImpl<char const*>&) driver.cpp:0:0
#26 0x000055dd4442408a main (/home/vext01/research/ykllvm/build/bin/clang-15+0x115508a)
#27 0x00007f76cc265d0a __libc_start_main ./csu/../csu/libc-start.c:308:16
#28 0x000055dd444cd82a _start (/home/vext01/research/ykllvm/build/bin/clang-15+0x11fe82a)
clang-15: error: unable to execute command: Aborted
clang-15: error: clang frontend command failed due to signal (use -v to see invocation)
clang version 15.0.0 (https://vext01@github.com/vext01/llvm-project.git 11c4199f6bb49be3aacc6e84cb49e073612f5f68)
Target: x86_64-unknown-linux-gnu
Thread model: posix
InstalledDir: /home/vext01/research/ykllvm/build/bin
clang-15: note: diagnostic msg: Error generating preprocessed source(s) - no preprocessable inputs.

As the debug prints show, the constant live variable operand has been put into a register:

Stackmap instr:  STACKMAP 0, 0, 2, implicit-def dead early-clobber $r11
Constant operand: implicit-def dead early-clobber $r11

This seems to happen at some point after the selection stage. The post-select, pre-scheduling DAG (llc -view-sched-dags) looks OK to me: https://theunixzoo.co.uk/random/sm-const-dag.png

Note that operand 2 of the stackmap node is a constant. But by code-gen it has changed to a register operand, and LLVM dislikes this.

What happened?

Other questions

• Why is the stackmap wrapped in a CALLSEQ when building the initial DAG?
• What are the red glue edges for? They are only briefly mentioned in passing in the docs.

sm-legal.diff

diff --git a/llvm/include/llvm/CodeGen/ISDOpcodes.h b/llvm/include/llvm/CodeGen/ISDOpcodes.h
index ea1d3170acba..531edff27c70 100644
--- a/llvm/include/llvm/CodeGen/ISDOpcodes.h
+++ b/llvm/include/llvm/CodeGen/ISDOpcodes.h
@@ -1269,6 +1269,9 @@ enum NodeType {
 #define BEGIN_REGISTER_VP_SDNODE(VPSDID, ...) VPSDID,
 #include "llvm/IR/VPIntrinsics.def"
 
+  // The `llvm.experimental.stackmap` intrinsic.
+  STACKMAP,
+
   /// BUILTIN_OP_END - This must be the last enum value in this list.
   /// The target-specific pre-isel opcode values start here.
   BUILTIN_OP_END
diff --git a/llvm/include/llvm/CodeGen/SelectionDAGISel.h b/llvm/include/llvm/CodeGen/SelectionDAGISel.h
index 35fb0bc80593..87df6d1b1604 100644
--- a/llvm/include/llvm/CodeGen/SelectionDAGISel.h
+++ b/llvm/include/llvm/CodeGen/SelectionDAGISel.h
@@ -321,6 +321,7 @@ private:
 
   void Select_FREEZE(SDNode *N);
   void Select_ARITH_FENCE(SDNode *N);
+  void Select_STACKMAP(SDNode *N);
 
 private:
   void DoInstructionSelection();
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
index a1ddb02563e3..9295c6b6b1a0 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
@@ -24,6 +24,7 @@
 #include "llvm/Support/KnownBits.h"
 #include "llvm/Support/raw_ostream.h"
 #include <algorithm>
+#include <vector>
 using namespace llvm;
 
 #define DEBUG_TYPE "legalize-types"
@@ -1683,6 +1684,9 @@ bool DAGTypeLegalizer::PromoteIntegerOperand(SDNode *N, unsigned OpNo) {
     break;
 
   case ISD::SET_ROUNDING: Res = PromoteIntOp_SET_ROUNDING(N); break;
+  case ISD::STACKMAP:
+    Res = PromoteIntOp_STACKMAP(N, OpNo);
+    break;
   }
 
   // If the result is null, the sub-method took care of registering results etc.
@@ -2246,6 +2250,20 @@ SDValue DAGTypeLegalizer::PromoteIntOp_SET_ROUNDING(SDNode *N) {
   return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0), Op), 0);
 }
 
+SDValue DAGTypeLegalizer::PromoteIntOp_STACKMAP(SDNode *N, unsigned OpNo) {
+  assert(OpNo > 1); // Because the first two arguments are guaranteed legal.
+
+  // XXX: There must be a more efficient way?
+  std::vector<SDValue> NewOps = {N->getOperand(0), N->getOperand(1)};
+  for (size_t i = 2; i < N->getNumOperands(); i++)
+    if (i == OpNo)
+      NewOps.push_back(ZExtPromotedInteger(N->getOperand(i)));
+    else
+      NewOps.push_back(N->getOperand(i));
+
+  return SDValue(DAG.UpdateNodeOperands(N, NewOps), 0);
+}
+
 //===----------------------------------------------------------------------===//
 //  Integer Result Expansion
 //===----------------------------------------------------------------------===//
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
index 5642908961bf..84633a84a782 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
@@ -403,6 +403,7 @@ private:
   SDValue PromoteIntOp_VECREDUCE(SDNode *N);
   SDValue PromoteIntOp_VP_REDUCE(SDNode *N, unsigned OpNo);
   SDValue PromoteIntOp_SET_ROUNDING(SDNode *N);
+  SDValue PromoteIntOp_STACKMAP(SDNode *N, unsigned OpNo);
 
   void PromoteSetCCOperands(SDValue &LHS,SDValue &RHS, ISD::CondCode Code);
 
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 170fa25a2960..805455a02211 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -9376,16 +9376,15 @@ static void addStackMapLiveVars(const CallBase &Call, unsigned StartIdx,
   }
 }
 
-/// Lower llvm.experimental.stackmap directly to its target opcode.
+/// Lower llvm.experimental.stackmap.
 void SelectionDAGBuilder::visitStackmap(const CallInst &CI) {
-  // void @llvm.experimental.stackmap(i32 <id>, i32 <numShadowBytes>,
+  // void @llvm.experimental.stackmap(i64 <id>, i32 <numShadowBytes>,
   //                                  [live variables...])
 
   assert(CI.getType()->isVoidTy() && "Stackmap cannot return a value.");
-
-  SDValue Chain, InFlag, Callee, NullPtr;
   SmallVector<SDValue, 32> Ops;
 
+  SDValue Chain, InFlag, Callee, NullPtr;
   SDLoc DL = getCurSDLoc();
   Callee = getValue(CI.getCalledOperand());
   NullPtr = DAG.getIntPtrConstant(0, DL, true);
@@ -9403,29 +9402,18 @@ void SelectionDAGBuilder::visitStackmap(const CallInst &CI) {
   Chain = DAG.getCALLSEQ_START(getRoot(), 0, 0, DL);
   InFlag = Chain.getValue(1);
 
-  // Add the <id> and <numBytes> constants.
-  SDValue IDVal = getValue(CI.getOperand(PatchPointOpers::IDPos));
-  Ops.push_back(DAG.getTargetConstant(
-                  cast<ConstantSDNode>(IDVal)->getZExtValue(), DL, MVT::i64));
-  SDValue NBytesVal = getValue(CI.getOperand(PatchPointOpers::NBytesPos));
-  Ops.push_back(DAG.getTargetConstant(
-                  cast<ConstantSDNode>(NBytesVal)->getZExtValue(), DL,
-                  MVT::i32));
-
-  // Push live variables for the stack map.
-  addStackMapLiveVars(CI, 2, DL, Ops, *this);
-
-  // We are not pushing any register mask info here on the operands list,
-  // because the stackmap doesn't clobber anything.
+  // Create nodes for the operands, starting with DAG house-keeping.
+  std::vector<SDValue> Operands;
+  Operands.push_back(Chain);
+  Operands.push_back(InFlag);
 
-  // Push the chain and the glue flag.
-  Ops.push_back(Chain);
-  Ops.push_back(InFlag);
+  // Pass through the <id>, <numBytes> and live variables arguments.
+  for (unsigned I = 0; I < CI.arg_size(); I++)
+    Operands.push_back(getValue(CI.getArgOperand(I)));
 
   // Create the STACKMAP node.
   SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
-  SDNode *SM = DAG.getMachineNode(TargetOpcode::STACKMAP, DL, NodeTys, Ops);
-  Chain = SDValue(SM, 0);
+  Chain = DAG.getNode(ISD::STACKMAP, DL, NodeTys, Operands);
   InFlag = Chain.getValue(1);
 
   Chain = DAG.getCALLSEQ_END(Chain, NullPtr, NullPtr, InFlag, DL);
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
index 60a3c02e38cf..6effa2987bda 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
@@ -490,6 +490,8 @@ std::string SDNode::getOperationName(const SelectionDAG *G) const {
   case ISD::SDID:                                                              \
     return #NAME;
 #include "llvm/IR/VPIntrinsics.def"
+
+  case ISD::STACKMAP:                   return "stackmap";
   }
 }
 
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 2b6524223546..8b47aba8aaaf 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -51,6 +51,7 @@
 #include "llvm/CodeGen/SchedulerRegistry.h"
 #include "llvm/CodeGen/SelectionDAG.h"
 #include "llvm/CodeGen/SelectionDAGNodes.h"
+#include "llvm/CodeGen/StackMaps.h"
 #include "llvm/CodeGen/StackProtector.h"
 #include "llvm/CodeGen/SwiftErrorValueTracking.h"
 #include "llvm/CodeGen/TargetInstrInfo.h"
@@ -2238,6 +2239,60 @@ void SelectionDAGISel::Select_ARITH_FENCE(SDNode *N) {
                        N->getOperand(0));
 }
 
+void SelectionDAGISel::Select_STACKMAP(SDNode *N) {
+  std::vector<SDValue> Ops;
+  auto *It = N->op_begin();
+  SDLoc DL(N);
+
+  // Stash the chain and glue operands so we cna move them to the end.
+  SDValue Chain = *It++;
+  SDValue InFlag = *It++;
+
+  // <id> operand.
+  SDValue ID = It->get();
+  assert(ID.getOpcode() == ISD::Constant);
+  assert(ID.getValueType() == MVT::i64);
+  SDValue IDConst = CurDAG->getTargetConstant(
+          cast<ConstantSDNode>(ID)->getZExtValue(),
+          DL, ID.getValueType());
+  Ops.push_back(IDConst);
+  It++;
+
+  // <numBytes> operand.
+  SDValue Shad = It->get();
+  assert(Shad.getOpcode() == ISD::Constant);
+  assert(Shad.getValueType() == MVT::i32);
+  SDValue ShadConst = CurDAG->getTargetConstant(
+          cast<ConstantSDNode>(Shad)->getZExtValue(),
+          DL, Shad.getValueType());
+  Ops.push_back(ShadConst);
+  It++;
+
+  // Live variable operands.
+  for (;It != N->op_end(); It++) {
+    SDNode *OpNode = It->getNode();
+    SDValue O;
+    if (OpNode->getOpcode() == ISD::Constant) {
+      O = CurDAG->getTargetConstant(cast<ConstantSDNode>(OpNode)->getZExtValue(),
+                  DL, It->getValueType());
+    } else if (OpNode->getOpcode() == ISD::FrameIndex) {
+        FrameIndexSDNode *FI = cast<FrameIndexSDNode>(OpNode);
+        O = CurDAG->getTargetFrameIndex(FI->getIndex(), It->getValueType());
+    } else {
+        // Otherwise it's a register.
+        // XXX ^^ is this true?
+        O = *It; // XXX Also does this guarantee register selection?
+    }
+    Ops.push_back(O);
+  }
+
+  Ops.push_back(Chain);
+  Ops.push_back(InFlag);
+
+  SDVTList NodeTys = CurDAG->getVTList(MVT::Other, MVT::Glue);
+  CurDAG->SelectNodeTo(N, TargetOpcode::STACKMAP, NodeTys, Ops);
+}
+
 /// GetVBR - decode a vbr encoding whose top bit is set.
 LLVM_ATTRIBUTE_ALWAYS_INLINE static uint64_t
 GetVBR(uint64_t Val, const unsigned char *MatcherTable, unsigned &Idx) {
@@ -2792,6 +2847,9 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
   case ISD::ARITH_FENCE:
     Select_ARITH_FENCE(NodeToMatch);
     return;
+  case ISD::STACKMAP:
+    Select_STACKMAP(NodeToMatch);
+    return;
   }
 
   assert(!NodeToMatch->isMachineOpcode() && "Node already selected!");
diff --git a/llvm/lib/CodeGen/StackMaps.cpp b/llvm/lib/CodeGen/StackMaps.cpp
index 36e8f129ea15..a5c3da3b2012 100644
--- a/llvm/lib/CodeGen/StackMaps.cpp
+++ b/llvm/lib/CodeGen/StackMaps.cpp
@@ -216,6 +216,7 @@ StackMaps::parseOperand(MachineInstr::const_mop_iterator MOI,
     }
     case StackMaps::ConstantOp: {
       ++MOI;
+      errs() << "Constant operand: "; MOI->dump();
       assert(MOI->isImm() && "Expected constant operand.");
       int64_t Imm = MOI->getImm();
       Locs.emplace_back(Location::Constant, sizeof(int64_t), 0, Imm);
@@ -459,6 +460,7 @@ void StackMaps::recordStackMapOpers(const MCSymbol &MILabel,
                                     MachineInstr::const_mop_iterator MOI,
                                     MachineInstr::const_mop_iterator MOE,
                                     bool recordResult) {
+  errs() << "Stackmap instr:"; MI.dump();
   MCContext &OutContext = AP.OutStreamer->getContext();
 
   LocationVec Locations;
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 14e8f2d3f934..e3bfc0544781 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -2209,6 +2209,8 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
       if (isOperationExpand(Op, MVT::f32))
         setOperationAction(Op, MVT::f32, Promote);
 
+  setOperationAction(ISD::STACKMAP, MVT::Any, Custom);
+
   // We have target-specific dag combine patterns for the following nodes:
   setTargetDAGCombine({ISD::VECTOR_SHUFFLE,
                        ISD::SCALAR_TO_VECTOR,

As pointed out by Tim, setOperationAction(ISD::STACKMAP, MVT::Any, Custom); can go.