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April 2, 2012 09:28
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STM32 USB / Other issue
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| This is definitely due to an error in the STM32 USB lib in device mode: | |
| As soon as you load the first time an IN endpoint (non-zero - done in the function DCD_EP_Tx), then the function USB_OTG_EPStartXfer will set the corresponding bit for this endpoint number in the register DREGS->DIEPEMPMSK to 1. | |
| After this, every time, when the transmit FIFO is empty for this endpoint, there will come an interrupt. | |
| The error in STM32 USB lib is, that this interrupt mask bit is never reset again (if you look for DIEPEMPMSK in the project files, you will see that it comes only once, at this "set" point - it is never cleared). | |
| After this time, you are therefore "flooded" with such "empty FIFO" interrupts - even after the transfer is completed (flag TXFE in DIEPINTx register - this flag can neither be reset or masked out directly - only possibility to get rid of this interrupt, is to kill the corresponding bit in the DIEPEMPMSK register, as I see it). | |
| To avoid this, please add the following code in the function DCD_WriteEmptyTxFifo (this function handles the "Empty TX FIFO" interrupt): | |
| In the while loop, at the end of this function, you find the 2 lines: | |
| ep->xfer_buff += len; | |
| ep->xfer_count += len; | |
| After this, please insert the following code (to reset the DIEPEMPMSK-Bit, if all bytes have been transferred to the TX FIFO): | |
| if( ep->xfer_count >= ep->xfer_len){ | |
| uint32_t fifoemptymsk = 1 << ep->num; | |
| USB_OTG_MODIFY_REG32(&pdev->regs.DREGS->DIEPEMPMSK, fifoemptymsk, 0); | |
| break; | |
| } | |
| (the "break;" is not important - the while loop anyway will quit on next while condition - it just saves you checking this next while condition). |
Thank you very much! It solved my same issue.
Author
Seems that nothing changed in the STM32 library for those years. Although I submitted the fix to their forum and their support.
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Thanks for this. It solved my interrupt storm issue nicely.