Created
December 24, 2015 16:48
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| /dts-v1/; | |
| / { | |
| #address-cells = <0x2>; | |
| #size-cells = <0x2>; | |
| compatible = "nvidia,st8", "nvidia,tegra124"; | |
| interrupt-parent = <0x1>; | |
| model = "NVIDIA SHIELD Tablet"; | |
| nvidia,boardids = "1761:1270:4"; | |
| chosen { | |
| bootargs = "tegraid=40.0.0.00.00 console=tty1 gpt fbcon=rotate:2 video=tegrafb earlyprintk clk_ignore_unused"; | |
| stdout-path = "/framebuffer@ad012000"; | |
| }; | |
| aliases { | |
| ehci0 = "/ehci@0,7d000000"; | |
| ehci1 = "/ehci@0,7d004000"; | |
| ehci2 = "/ehci@0,7d008000"; | |
| i2c0 = "/i2c@0,7000c000"; | |
| i2c1 = "/i2c@0,7000c400"; | |
| i2c2 = "/i2c@0,7000c500"; | |
| i2c3 = "/i2c@0,7000c700"; | |
| i2c4 = "/i2c@0,7000d000"; | |
| i2c5 = "/i2c@0,7000d100"; | |
| serial0 = "/serial@0,70006000"; | |
| serial1 = "/serial@0,70006040"; | |
| serial2 = "/serial@0,70006200"; | |
| serial3 = "/serial@0,70006300"; | |
| spi0 = "/spi@0,7000d400"; | |
| spi1 = "/spi@0,7000d600"; | |
| spi2 = "/spi@0,7000d800"; | |
| spi3 = "/spi@0,7000da00"; | |
| spi4 = "/spi@0,7000dc00"; | |
| spi5 = "/spi@0,7000de00"; | |
| udc0 = "/udc@0,7d000000"; | |
| rtc0 = "/i2c@0,7000d000/tps65913/rtc"; | |
| rtc1 = "/rtc@0,7000e000"; | |
| display0 = "/host1x@0,50000000/dc@0,54200000"; | |
| display1 = "/host1x@0,50000000/dc@0,54240000"; | |
| framebuffer0 = "/framebuffer@ad012000"; | |
| }; | |
| memory { | |
| device_type = "memory"; | |
| reg = <0x0 0x80000000 0x0 0x2d000000 0x0 0xae000000 0x0 0x30000000>; | |
| }; | |
| pcie-controller@0,01003000 { | |
| compatible = "nvidia,tegra124-pcie"; | |
| device_type = "pci"; | |
| reg = <0x0 0x1003000 0x0 0x800 0x0 0x1003800 0x0 0x800 0x0 0x2000000 0x0 0x10000000>; | |
| reg-names = "pads", "afi", "cs"; | |
| interrupts = <0x0 0x62 0x4 0x0 0x63 0x4>; | |
| interrupt-names = "intr", "msi"; | |
| #interrupt-cells = <0x1>; | |
| interrupt-map-mask = <0x0 0x0 0x0 0x0>; | |
| interrupt-map = <0x0 0x0 0x0 0x0 0x1 0x0 0x62 0x4>; | |
| bus-range = <0x0 0xff>; | |
| #address-cells = <0x3>; | |
| #size-cells = <0x2>; | |
| ranges = <0x82000000 0x0 0x1000000 0x0 0x1000000 0x0 0x1000 0x82000000 0x0 0x1001000 0x0 0x1001000 0x0 0x1000 0x81000000 0x0 0x0 0x0 0x12000000 0x0 0x10000 0x82000000 0x0 0x13000000 0x0 0x13000000 0x0 0xd000000 0xc2000000 0x0 0x20000000 0x0 0x20000000 0x0 0x20000000>; | |
| clocks = <0x2 0x46 0x2 0x48 0x2 0xe7 0x2 0x10c>; | |
| clock-names = "pex", "afi", "pll_e", "cml"; | |
| resets = <0x2 0x46 0x2 0x48 0x2 0x4a>; | |
| reset-names = "pex", "afi", "pcie_x"; | |
| status = "disabled"; | |
| phys = <0x3 0x0>; | |
| phy-names = "pcie"; | |
| pci@1,0 { | |
| device_type = "pci"; | |
| assigned-addresses = <0x82000800 0x0 0x1000000 0x0 0x1000>; | |
| reg = <0x800 0x0 0x0 0x0 0x0>; | |
| status = "disabled"; | |
| #address-cells = <0x3>; | |
| #size-cells = <0x2>; | |
| ranges; | |
| nvidia,num-lanes = <0x2>; | |
| }; | |
| pci@2,0 { | |
| device_type = "pci"; | |
| assigned-addresses = <0x82001000 0x0 0x1001000 0x0 0x1000>; | |
| reg = <0x1000 0x0 0x0 0x0 0x0>; | |
| status = "disabled"; | |
| #address-cells = <0x3>; | |
| #size-cells = <0x2>; | |
| ranges; | |
| nvidia,num-lanes = <0x1>; | |
| }; | |
| }; | |
| host1x@0,50000000 { | |
| compatible = "nvidia,tegra124-host1x", "simple-bus"; | |
| reg = <0x0 0x50000000 0x0 0x34000>; | |
| interrupts = <0x0 0x41 0x4 0x0 0x43 0x4>; | |
| clocks = <0x2 0x1c>; | |
| resets = <0x2 0x1c>; | |
| reset-names = "host1x"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ranges = <0x53000000 0x0 0x53000000 0x6000000 0x60001000 0x0 0x60001000 0xe200>; | |
| power-domains = <0x4>; | |
| wakeup-capable; | |
| iommus = <0x5 0x4 0x5 0x6 0x5 0x7 0x5 0x11>; | |
| status = "okay"; | |
| linux,phandle = <0x31>; | |
| phandle = <0x31>; | |
| dc@0,54200000 { | |
| compatible = "nvidia,tegra124-dc"; | |
| reg = <0x54200000 0x40000>; | |
| interrupts = <0x0 0x49 0x4>; | |
| clocks = <0x2 0x1b 0x2 0xd3>; | |
| clock-names = "dc", "parent"; | |
| resets = <0x2 0x1b>; | |
| reset-names = "dc"; | |
| iommus = <0x5 0x2 0x5 0xa>; | |
| nvidia,head = <0x0>; | |
| power-domains = <0x6>; | |
| status = "okay"; | |
| nvidia,dc-flags = <0x1>; | |
| nvidia,emc-clk-rate = <0xc28cb00>; | |
| nvidia,cmu-enable = <0x1>; | |
| nvidia,low-v-win = <0x2>; | |
| nvidia,fb-bpp = <0x20>; | |
| nvidia,fb-flags = <0x1>; | |
| linux,phandle = <0x39>; | |
| phandle = <0x39>; | |
| rgb { | |
| status = "disabled"; | |
| }; | |
| }; | |
| dc@0,54240000 { | |
| compatible = "nvidia,tegra124-dc"; | |
| reg = <0x54240000 0x40000>; | |
| interrupts = <0x0 0x4a 0x4>; | |
| clocks = <0x2 0x1a 0x2 0xd3>; | |
| clock-names = "dc", "parent"; | |
| resets = <0x2 0x1a>; | |
| reset-names = "dc"; | |
| iommus = <0x5 0x3>; | |
| nvidia,head = <0x1>; | |
| power-domains = <0x6>; | |
| status = "okay"; | |
| nvidia,dc-flags = <0x1>; | |
| nvidia,emc-clk-rate = <0x11e1a300>; | |
| nvidia,cmu-enable = <0x1>; | |
| nvidia,fb-bpp = <0x20>; | |
| nvidia,fb-flags = <0x1>; | |
| rgb { | |
| status = "disabled"; | |
| }; | |
| }; | |
| hdmi@0,54280000 { | |
| compatible = "nvidia,tegra124-hdmi"; | |
| reg = <0x54280000 0x40000>; | |
| interrupts = <0x0 0x4b 0x4>; | |
| clocks = <0x2 0x33 0x2 0xdd>; | |
| clock-names = "hdmi", "parent"; | |
| resets = <0x2 0x33>; | |
| reset-names = "hdmi"; | |
| status = "okay"; | |
| nvidia,ddc-i2c-bus = <0x7>; | |
| nvidia,hpd-gpio = <0x8 0x6f 0x0>; | |
| hdmi-display { | |
| status = "okay"; | |
| compatible = "hdmi,display"; | |
| disp-default-out { | |
| nvidia,out-type = <0x1>; | |
| nvidia,out-flags = <0x0>; | |
| nvidia,out-parent-clk = "pll_d2"; | |
| nvidia,out-max-pixclk = <0xd27>; | |
| nvidia,out-align = <0x0>; | |
| nvidia,out-order = <0x0>; | |
| nvidia,out-xres = <0x780>; | |
| nvidia,out-yres = <0x438>; | |
| }; | |
| tmds-config { | |
| tmds-cfg@0 { | |
| version = <0x1 0x0>; | |
| pclk = <0x19bfcc0>; | |
| pll0 = <0x1003010>; | |
| pll1 = <0x301b00>; | |
| pe-current = <0x0>; | |
| drive-current = <0x1c1c1c1c>; | |
| peak-current = <0x0>; | |
| pad-ctls0-mask = <0xfffff0ff>; | |
| pad-ctls0-setting = <0x400>; | |
| }; | |
| tmds-cfg@1 { | |
| version = <0x1 0x0>; | |
| pclk = <0x46cf710>; | |
| pll0 = <0x1003110>; | |
| pll1 = <0x301500>; | |
| pe-current = <0x0>; | |
| drive-current = <0x23232323>; | |
| peak-current = <0x0>; | |
| pad-ctls0-mask = <0xfffff0ff>; | |
| pad-ctls0-setting = <0x400>; | |
| }; | |
| tmds-cfg@2 { | |
| version = <0x1 0x0>; | |
| pclk = <0x8d9ee20>; | |
| pll0 = <0x1003310>; | |
| pll1 = <0x10300f00>; | |
| pe-current = <0x0>; | |
| drive-current = <0x2a2c2c2a>; | |
| peak-current = <0x0>; | |
| pad-ctls0-mask = <0xfffff0ff>; | |
| pad-ctls0-setting = <0x400>; | |
| }; | |
| tmds-cfg@3 { | |
| version = <0x1 0x0>; | |
| pclk = <0x7fffffff>; | |
| pll0 = <0x1003f10>; | |
| pll1 = <0x10300700>; | |
| pe-current = <0x0>; | |
| drive-current = <0x30323333>; | |
| peak-current = <0x10101010>; | |
| pad-ctls0-mask = <0xfffff0ff>; | |
| pad-ctls0-setting = <0x600>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| sor@0,54540000 { | |
| compatible = "nvidia,tegra124-sor"; | |
| reg = <0x54540000 0x40000>; | |
| interrupts = <0x0 0x4c 0x4>; | |
| clocks = <0x2 0xb6 0x2 0xdb 0x2 0x10f 0x2 0xc9>; | |
| clock-names = "sor", "parent", "dp", "safe"; | |
| resets = <0x2 0xb6>; | |
| reset-names = "sor"; | |
| status = "disabled"; | |
| prod-settings { | |
| prod_c_dp { | |
| prod = <0x5c 0xf0fff0ef 0x1000310 0x60 0xfcfffeff 0x100 0x68 0xffffdfff 0x2000 0x70 0x0 0x0 0x180 0xfffffffe 0x1>; | |
| }; | |
| }; | |
| }; | |
| dpaux@0,545c0000 { | |
| compatible = "nvidia,tegra124-dpaux"; | |
| reg = <0x545c0000 0x40000>; | |
| interrupts = <0x0 0x9f 0x4>; | |
| clocks = <0x2 0xb5 0x2 0x10f>; | |
| clock-names = "dpaux", "parent"; | |
| resets = <0x2 0xb5>; | |
| reset-names = "dpaux"; | |
| status = "disabled"; | |
| }; | |
| vi { | |
| compatible = "nvidia,tegra124-vi"; | |
| power-domains = <0x9>; | |
| reg = <0x54080000 0x40000>; | |
| interrupts = <0x0 0x45 0x4>; | |
| iommus = <0x5 0x12>; | |
| status = "okay"; | |
| }; | |
| isp@0,54600000 { | |
| compatible = "nvidia,tegra124-isp"; | |
| power-domains = <0x9>; | |
| reg = <0x54600000 0x40000>; | |
| interrupts = <0x0 0x47 0x4>; | |
| iommus = <0x5 0x8 0x5 0x1d>; | |
| status = "okay"; | |
| }; | |
| isp@0,54680000 { | |
| compatible = "nvidia,tegra124-isp"; | |
| power-domains = <0x9>; | |
| reg = <0x54680000 0x40000>; | |
| interrupts = <0x0 0x46 0x4>; | |
| iommus = <0x5 0x8 0x5 0x1d>; | |
| status = "okay"; | |
| }; | |
| dsi@0,54300000 { | |
| compatible = "nvidia,tegra124-dsi"; | |
| reg = <0x54300000 0x40000 0x54400000 0x40000>; | |
| status = "okay"; | |
| nvidia,dsi-controller-vs = <0x1>; | |
| panel-a-wuxga-8-0 { | |
| status = "okay"; | |
| compatible = "a,wuxga-8-0"; | |
| nvidia,dsi-instance = <0x0>; | |
| nvidia,dsi-n-data-lanes = <0x4>; | |
| nvidia,dsi-pixel-format = <0x3>; | |
| nvidia,dsi-refresh-rate = <0x3c>; | |
| nvidia,dsi-video-data-type = <0x0>; | |
| nvidia,dsi-video-clock-mode = <0x1>; | |
| nvidia,dsi-video-burst-mode = <0x0>; | |
| nvidia,dsi-virtual-channel = <0x0>; | |
| nvidia,dsi-panel-reset = <0x1>; | |
| nvidia,dsi-power-saving-suspend = <0x1>; | |
| nvidia,dsi-ulpm-not-support = <0x1>; | |
| nvidia,dsi-boardinfo = <0x6e1 0x0 0x0 0x1>; | |
| nvidia,panel-rst-gpio = <0x8 0x6c 0x0>; | |
| nvidia,panel-bl-pwm-gpio = <0x8 0x39 0x0>; | |
| disp-default-out { | |
| nvidia,out-type = <0x2>; | |
| nvidia,out-width = <0x6b>; | |
| nvidia,out-height = <0xac>; | |
| nvidia,out-flags = <0x0 0x40>; | |
| nvidia,out-parent-clk = "pll_d_out0"; | |
| nvidia,out-xres = <0x4b0>; | |
| nvidia,out-yres = <0x780>; | |
| nvidia,out-rotation = <0xb4>; | |
| }; | |
| display-timings { | |
| 1200x1920-32 { | |
| clock-frequency = <0x948edc0>; | |
| hactive = <0x4b0>; | |
| vactive = <0x780>; | |
| hfront-porch = <0x40>; | |
| hback-porch = <0x36>; | |
| hsync-len = <0xa>; | |
| vfront-porch = <0x3>; | |
| vback-porch = <0x1e>; | |
| vsync-len = <0x2>; | |
| nvidia,h-ref-to-sync = <0x4>; | |
| nvidia,v-ref-to-sync = <0x1>; | |
| }; | |
| }; | |
| smartdimmer { | |
| status = "okay"; | |
| nvidia,turn-off-brightness = <0x32>; | |
| nvidia,turn-on-brightness = <0x4b>; | |
| nvidia,use-auto-pwm = <0x0>; | |
| nvidia,hw-update-delay = <0x0>; | |
| nvidia,bin-width = <0xffffffff>; | |
| nvidia,aggressiveness = <0x5>; | |
| nvidia,use-vid-luma = <0x0>; | |
| nvidia,phase-in-settings = <0x0>; | |
| nvidia,phase-in-adjustments = <0x0>; | |
| nvidia,k-limit-enable = <0x1>; | |
| nvidia,k-limit = <0xc8>; | |
| nvidia,sd-window-enable = <0x0>; | |
| nvidia,soft-clipping-enable = <0x1>; | |
| nvidia,soft-clipping-threshold = <0x80>; | |
| nvidia,smooth-k-enable = <0x1>; | |
| nvidia,smooth-k-incr = <0x4>; | |
| nvidia,coeff = <0x5 0x9 0x2>; | |
| nvidia,fc = <0x0 0x0>; | |
| nvidia,blp = <0x400 0xff>; | |
| nvidia,bltf = <0x39 0x41 0x49 0x52 0x5c 0x67 0x72 0x7d 0x8a 0x96 0xa4 0xb2 0xc1 0xd0 0xe0 0xf1>; | |
| nvidia,lut = <0xff 0xff 0xff 0xc7 0xc7 0xc7 0x99 0x99 0x99 0x74 0x74 0x74 0x55 0x55 0x55 0x3b 0x3b 0x3b 0x24 0x24 0x24 0x11 0x11 0x11 0x0 0x0 0x0>; | |
| nvidia,use-vpulse2 = <0x1>; | |
| nvidia,bl-device-name = "pwm-backlight"; | |
| }; | |
| cmu { | |
| nvidia,cmu-csc = <0xf7 0x3f2 0x16 0x3f4 0x101 0x3e2 0x3ff 0x3ff 0xde>; | |
| nvidia,cmu-lut2 = <0x0 0x1 0x3 0x4 0x6 0x7 0x8 0x9 0xb 0xc 0xd 0xe 0xf 0x10 0x11 0x12 0x13 0x13 0x14 0x15 0x16 0x16 0x17 0x17 0x18 0x19 0x19 0x1a 0x1a 0x1a 0x1b 0x1b 0x1c 0x1c 0x1c 0x1d 0x1d 0x1d 0x1e 0x1e 0x1e 0x1f 0x1f 0x1f 0x1f 0x20 0x20 0x20 0x21 0x21 0x21 0x21 0x22 0x22 0x22 0x23 0x23 0x23 0x23 0x24 0x24 0x24 0x25 0x25 0x25 0x25 0x26 0x26 0x26 0x26 0x27 0x27 0x27 0x28 0x28 0x28 0x28 0x29 0x29 0x29 0x2a 0x2a 0x2a 0x2a 0x2b 0x2b 0x2b 0x2b 0x2c 0x2c 0x2c 0x2c 0x2d 0x2d 0x2d 0x2d 0x2e 0x2e 0x2e 0x2e 0x2f 0x2f 0x2f 0x2f 0x30 0x30 0x30 0x30 0x31 0x31 0x31 0x31 0x32 0x32 0x32 0x32 0x32 0x33 0x33 0x33 0x33 0x34 0x34 0x34 0x34 0x34 0x35 0x35 0x35 0x35 0x35 0x36 0x36 0x36 0x36 0x36 0x37 0x37 0x37 0x37 0x37 0x37 0x38 0x38 0x38 0x38 0x38 0x39 0x39 0x39 0x39 0x39 0x39 0x3a 0x3a 0x3a 0x3a 0x3a 0x3a 0x3b 0x3b 0x3b 0x3b 0x3b 0x3b 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3d 0x3d 0x3d 0x3d 0x3d 0x3d 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x40 0x40 0x40 0x40 0x40 0x40 0x41 0x41 0x41 0x41 0x41 0x41 0x41 0x42 0x42 0x42 0x42 0x42 0x42 0x43 0x43 0x43 0x43 0x43 0x43 0x43 0x44 0x44 0x44 0x44 0x44 0x44 0x44 0x45 0x45 0x45 0x45 0x45 0x45 0x46 0x46 0x46 0x46 0x46 0x46 0x46 0x47 0x47 0x47 0x47 0x47 0x47 0x47 0x48 0x48 0x48 0x48 0x48 0x48 0x48 0x49 0x49 0x49 0x49 0x49 0x49 0x49 0x4a 0x4a 0x4a 0x4a 0x4a 0x4a 0x4a 0x4a 0x4b 0x4b 0x4b 0x4b 0x4b 0x4b 0x4b 0x4c 0x4c 0x4c 0x4c 0x4c 0x4c 0x4c 0x4d 0x4d 0x4d 0x4d 0x4d 0x4d 0x4d 0x4d 0x4e 0x4e 0x4e 0x4e 0x4e 0x4e 0x4e 0x4e 0x4f 0x4f 0x4f 0x4f 0x4f 0x4f 0x4f 0x4f 0x50 0x50 0x50 0x50 0x50 0x50 0x50 0x50 0x51 0x51 0x51 0x51 0x51 0x51 0x51 0x51 0x51 0x52 0x52 0x52 0x52 0x52 0x52 0x52 0x52 0x52 0x53 0x53 0x53 0x53 0x53 0x53 0x53 0x53 0x53 0x54 0x54 0x54 0x54 0x54 0x54 0x54 0x54 0x54 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x56 0x56 0x56 0x56 0x56 0x56 0x56 0x56 0x56 0x56 0x57 0x57 0x57 0x57 0x57 0x57 0x57 0x57 0x57 0x57 0x58 0x58 0x58 0x58 0x58 0x58 0x58 0x58 0x58 0x58 0x58 0x59 0x59 0x59 0x59 0x59 0x59 0x59 0x59 0x59 0x59 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5b 0x5b 0x5b 0x5b 0x5b 0x5b 0x5b 0x5b 0x5b 0x5b 0x5b 0x5c 0x5c 0x5c 0x5c 0x5c 0x5c 0x5c 0x5c 0x5c 0x5c 0x5c 0x5d 0x5d 0x5d 0x5d 0x5d 0x5d 0x5d 0x5d 0x5d 0x5d 0x5d 0x5d 0x5e 0x5e 0x5e 0x5e 0x5e 0x5e 0x5e 0x5e 0x5e 0x5e 0x5e 0x5f 0x5f 0x5f 0x5f 0x5f 0x5f 0x5f 0x5f 0x5f 0x5f 0x5f 0x60 0x60 0x60 0x60 0x60 0x60 0x60 0x60 0x60 0x60 0x60 0x61 0x61 0x61 0x61 0x61 0x61 0x61 0x61 0x61 0x61 0x61 0x61 0x62 0x62 0x62 0x62 0x62 0x62 0x62 0x62 0x62 0x62 0x62 0x63 0x63 0x63 0x63 0x63 0x63 0x63 0x63 0x63 0x63 0x63 0x64 0x64 0x64 0x64 0x65 0x66 0x67 0x67 0x68 0x69 0x69 0x6a 0x6b 0x6c 0x6c 0x6d 0x6e 0x6e 0x6f 0x70 0x70 0x71 0x72 0x72 0x73 0x73 0x74 0x75 0x75 0x76 0x77 0x77 0x78 0x78 0x79 0x79 0x7a 0x7b 0x7b 0x7c 0x7c 0x7d 0x7d 0x7e 0x7e 0x7f 0x7f 0x80 0x80 0x81 0x81 0x82 0x82 0x83 0x83 0x84 0x84 0x85 0x85 0x86 0x86 0x87 0x87 0x88 0x88 0x89 0x89 0x89 0x8a 0x8a 0x8b 0x8b 0x8c 0x8c 0x8d 0x8d 0x8e 0x8e 0x8e 0x8f 0x8f 0x90 0x90 0x91 0x91 0x92 0x92 0x93 0x93 0x94 0x94 0x95 0x95 0x95 0x96 0x96 0x97 0x97 0x98 0x98 0x99 0x99 0x9a 0x9a 0x9a 0x9b 0x9b 0x9c 0x9c 0x9d 0x9d 0x9e 0x9e 0x9e 0x9f 0x9f 0xa0 0xa0 0xa0 0xa1 0xa1 0xa2 0xa2 0xa2 0xa3 0xa3 0xa3 0xa4 0xa4 0xa5 0xa5 0xa5 0xa6 0xa6 0xa6 0xa7 0xa7 0xa7 0xa8 0xa8 0xa8 0xa9 0xa9 0xa9 0xaa 0xaa 0xaa 0xab 0xab 0xab 0xac 0xac 0xac 0xad 0xad 0xad 0xae 0xae 0xae 0xaf 0xaf 0xaf 0xb0 0xb0 0xb1 0xb1 0xb1 0xb2 0xb2 0xb2 0xb3 0xb3 0xb3 0xb4 0xb4 0xb5 0xb5 0xb5 0xb6 0xb6 0xb7 0xb7 0xb7 0xb8 0xb8 0xb8 0xb9 0xb9 0xba 0xba 0xba 0xbb 0xbb 0xbc 0xbc 0xbc 0xbd 0xbd 0xbd 0xbe 0xbe 0xbf 0xbf 0xbf 0xc0 0xc0 0xc0 0xc1 0xc1 0xc1 0xc2 0xc2 0xc2 0xc3 0xc3 0xc4 0xc4 0xc4 0xc5 0xc5 0xc5 0xc6 0xc6 0xc6 0xc6 0xc7 0xc7 0xc7 0xc8 0xc8 0xc8 0xc9 0xc9 0xc9 0xca 0xca 0xca 0xcb 0xcb 0xcb 0xcb 0xcc 0xcc 0xcc 0xcd 0xcd 0xcd 0xcd 0xce 0xce 0xce 0xcf 0xcf 0xcf 0xcf 0xd0 0xd0 0xd0 0xd1 0xd1 0xd1 0xd1 0xd2 0xd2 0xd2 0xd3 0xd3 0xd3 0xd3 0xd4 0xd4 0xd4 0xd4 0xd5 0xd5 0xd5 0xd6 0xd6 0xd6 0xd6 0xd7 0xd7 0xd7 0xd7 0xd8 0xd8 0xd8 0xd9 0xd9 0xd9 0xd9 0xda 0xda 0xda 0xda 0xdb 0xdb 0xdb 0xdb 0xdc 0xdc 0xdc 0xdc 0xdd 0xdd 0xdd 0xde 0xde 0xde 0xde 0xdf 0xdf 0xdf 0xdf 0xe0 0xe0 0xe0 0xe0 0xe1 0xe1 0xe1 0xe1 0xe2 0xe2 0xe2 0xe2 0xe3 0xe3 0xe3 0xe3 0xe4 0xe4 0xe4 0xe4 0xe5 0xe5 0xe5 0xe6 0xe6 0xe6 0xe6 0xe7 0xe7 0xe7 0xe7 0xe8 0xe8 0xe8 0xe8 0xe9 0xe9 0xe9 0xe9 0xea 0xea 0xea 0xea 0xeb 0xeb 0xeb 0xeb 0xec 0xec 0xec 0xec 0xed 0xed 0xed 0xed 0xee 0xee 0xee 0xee 0xee 0xef 0xef 0xef 0xef 0xf0 0xf0 0xf0 0xf0 0xf1 0xf1 0xf1 0xf1 0xf2 0xf2 0xf2 0xf2 0xf3 0xf3 0xf3 0xf3 0xf3 0xf4 0xf4 0xf4 0xf4 0xf5 0xf5 0xf5 0xf5 0xf6 0xf6 0xf6 0xf6 0xf6 0xf7 0xf7 0xf7 0xf7 0xf8 0xf8 0xf8 0xf8 0xf8 0xf9 0xf9 0xf9 0xf9 0xf9 0xfa 0xfa 0xfa 0xfa 0xfb 0xfb 0xfb 0xfb 0xfb 0xfc 0xfc 0xfc 0xfc 0xfc 0xfd 0xfd 0xfd 0xfd 0xfd 0xfe 0xfe 0xfe 0xfe 0xfe 0xff 0xff 0xff 0xff 0xff>; | |
| }; | |
| }; | |
| }; | |
| vic { | |
| compatible = "nvidia,tegra124-vic"; | |
| power-domains = <0xa>; | |
| reg = <0x54340000 0x40000>; | |
| iommus = <0x5 0x13>; | |
| status = "okay"; | |
| }; | |
| msenc { | |
| compatible = "nvidia,tegra124-msenc"; | |
| power-domains = <0xb>; | |
| reg = <0x544c0000 0x40000>; | |
| iommus = <0x5 0xb>; | |
| status = "okay"; | |
| }; | |
| tsec { | |
| compatible = "nvidia,tegra124-tsec"; | |
| power-domains = <0xc>; | |
| reg = <0x54500000 0x40000>; | |
| iommus = <0x5 0x17>; | |
| status = "okay"; | |
| }; | |
| nvavp { | |
| compatible = "nvidia,tegra124-nvavp"; | |
| power-domains = <0xd>; | |
| interrupts = <0x0 0x4 0x4>; | |
| reg = <0x60001000 0xe200>; | |
| status = "okay"; | |
| }; | |
| }; | |
| interrupt-controller@0,50041000 { | |
| compatible = "arm,cortex-a15-gic"; | |
| #interrupt-cells = <0x3>; | |
| interrupt-controller; | |
| reg = <0x0 0x50041000 0x0 0x1000 0x0 0x50042000 0x0 0x100>; | |
| interrupts = <0x1 0x9 0xf04>; | |
| interrupt-parent = <0x1>; | |
| status = "okay"; | |
| linux,phandle = <0x1>; | |
| phandle = <0x1>; | |
| }; | |
| gpu@0,57000000 { | |
| compatible = "nvidia,gk20a"; | |
| reg = <0x0 0x57000000 0x0 0x1000000 0x0 0x58000000 0x0 0x1000000>; | |
| interrupts = <0x0 0x9d 0x4 0x0 0x9e 0x4>; | |
| interrupt-names = "stall", "nonstall"; | |
| clocks = <0x2 0xb8 0x2 0x10b>; | |
| clock-names = "gpu", "pwr"; | |
| resets = <0x2 0xb8>; | |
| reset-names = "gpu"; | |
| iommus = <0xe 0x1e>; | |
| status = "disabled"; | |
| }; | |
| interrupt-controller@0,60004000 { | |
| compatible = "nvidia,tegra-gic"; | |
| reg = <0x0 0x60004000 0x0 0x40 0x0 0x60004100 0x0 0x40 0x0 0x60004200 0x0 0x40 0x0 0x60004300 0x0 0x40 0x0 0x60004400 0x0 0x40>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x3>; | |
| interrupt-parent = <0x1>; | |
| num-ictrls = <0x5>; | |
| status = "okay"; | |
| }; | |
| timer@0,60005000 { | |
| compatible = "nvidia,tegra-nvtimer"; | |
| reg = <0x0 0x60005000 0x0 0x400>; | |
| interrupts = <0x0 0x0 0x4 0x0 0x1 0x4 0x0 0x29 0x4 0x0 0x2a 0x4 0x0 0x79 0x4 0x0 0x97 0x4 0x0 0x98 0x4 0x0 0x99 0x4 0x0 0x9a 0x4 0x0 0x9b 0x4 0x0 0x7a 0x4>; | |
| clocks = <0x2 0x5>; | |
| status = "okay"; | |
| }; | |
| clock@0,60006000 { | |
| compatible = "nvidia,tegra124-car"; | |
| reg = <0x0 0x60006000 0x0 0x1000>; | |
| #clock-cells = <0x1>; | |
| #reset-cells = <0x1>; | |
| nvidia,external-memory-controller = <0xf>; | |
| status = "okay"; | |
| linux,phandle = <0x2>; | |
| phandle = <0x2>; | |
| }; | |
| flow-controller@0,60007000 { | |
| compatible = "nvidia,tegra124-flowctrl"; | |
| reg = <0x0 0x60007000 0x0 0x1000>; | |
| }; | |
| actmon@0,6000c800 { | |
| compatible = "nvidia,tegra124-actmon"; | |
| reg = <0x0 0x6000c800 0x0 0x400>; | |
| interrupts = <0x0 0x2d 0x4>; | |
| clocks = <0x2 0x77 0x2 0x39>; | |
| clock-names = "actmon", "emc"; | |
| resets = <0x2 0x77>; | |
| reset-names = "actmon"; | |
| }; | |
| gpio@0,6000d000 { | |
| compatible = "nvidia,tegra124-gpio", "nvidia,tegra30-gpio"; | |
| reg = <0x0 0x6000d000 0x0 0x1000>; | |
| interrupts = <0x0 0x20 0x4 0x0 0x21 0x4 0x0 0x22 0x4 0x0 0x23 0x4 0x0 0x37 0x4 0x0 0x57 0x4 0x0 0x59 0x4 0x0 0x7d 0x4>; | |
| #gpio-cells = <0x2>; | |
| gpio-controller; | |
| #interrupt-cells = <0x2>; | |
| interrupt-controller; | |
| gpio-ranges = <0x10 0x0 0x0 0xfb>; | |
| status = "okay"; | |
| gpio-init-names = "default"; | |
| gpio-init-0 = <0x11>; | |
| linux,phandle = <0x8>; | |
| phandle = <0x8>; | |
| default { | |
| gpio-input = <0x17 0x3c 0x41 0x46 0x48 0x50 0x52 0x55 0x6f 0x75 0x80 0x85 0x86 0x87 0x8c 0x90 0xa4 0xa5 0xa6 0xa8 0xa9 0xb3 0xbb>; | |
| gpio-output-low = <0x3b 0x3d 0x40 0x51 0x54 0x56 0x6d 0x76 0x88 0x89 0x8a 0x8d 0x93 0x94 0xbf 0xdb 0xdd 0xde 0xdf 0xf1>; | |
| gpio-output-high = <0x3a 0x6c>; | |
| linux,phandle = <0x11>; | |
| phandle = <0x11>; | |
| }; | |
| }; | |
| dma@0,60020000 { | |
| compatible = "nvidia,tegra124-apbdma"; | |
| reg = <0x0 0x60020000 0x0 0x1400>; | |
| interrupts = <0x0 0x68 0x4 0x0 0x69 0x4 0x0 0x6a 0x4 0x0 0x6b 0x4 0x0 0x6c 0x4 0x0 0x6d 0x4 0x0 0x6e 0x4 0x0 0x6f 0x4 0x0 0x70 0x4 0x0 0x71 0x4 0x0 0x72 0x4 0x0 0x73 0x4 0x0 0x74 0x4 0x0 0x75 0x4 0x0 0x76 0x4 0x0 0x77 0x4 0x0 0x80 0x4 0x0 0x81 0x4 0x0 0x82 0x4 0x0 0x83 0x4 0x0 0x84 0x4 0x0 0x85 0x4 0x0 0x86 0x4 0x0 0x87 0x4 0x0 0x88 0x4 0x0 0x89 0x4 0x0 0x8a 0x4 0x0 0x8b 0x4 0x0 0x8c 0x4 0x0 0x8d 0x4 0x0 0x8e 0x4 0x0 0x8f 0x4>; | |
| clocks = <0x2 0x22>; | |
| resets = <0x2 0x22>; | |
| reset-names = "dma"; | |
| #dma-cells = <0x1>; | |
| power-domains = <0x6>; | |
| status = "okay"; | |
| linux,phandle = <0x12>; | |
| phandle = <0x12>; | |
| }; | |
| apbmisc@0,70000800 { | |
| compatible = "nvidia,tegra124-apbmisc", "nvidia,tegra20-apbmisc"; | |
| reg = <0x0 0x70000800 0x0 0x64 0x0 0x7000e864 0x0 0x4>; | |
| }; | |
| pinmux@0,70000868 { | |
| compatible = "nvidia,tegra124-pinmux"; | |
| reg = <0x0 0x70000868 0x0 0x164 0x0 0x70003000 0x0 0x434 0x0 0x70000820 0x0 0x8>; | |
| #gpio-range-cells = <0x3>; | |
| status = "okay"; | |
| linux,phandle = <0x10>; | |
| phandle = <0x10>; | |
| prod-settings { | |
| #prod-cells = <0x4>; | |
| prod { | |
| status = "okay"; | |
| nvidia,prod-boot-init; | |
| prod = <0x0 0x28 0xe0e0ff3 0x605008 0x0 0x2c 0xe0e0ff3 0x605008 0x0 0x30 0xe0e0ff3 0x605008 0x0 0x34 0xe0e0ff3 0x605008 0x0 0x130 0xe0e0ff3 0x605008 0x0 0x38 0xe0e0ff3 0x50500c 0x0 0x18 0xf003ff3 0x29400c 0x0 0xa8 0xf003ff3 0x29400c 0x0 0x94 0xe0e0ff3 0x50500c 0x0 0x0 0xe0e0ff3 0x50500c 0x0 0x58 0xe0e0ff3 0xf0000000 0x0 0x5c 0xe0e0ff3 0xf0000000 0x0 0xc 0x8080f33 0x3f37000 0x0 0xbc 0xe0e0ff3 0xf1717000 0x0 0x50 0xe0e0ff3 0xf1717000>; | |
| }; | |
| }; | |
| }; | |
| serial@0,70006000 { | |
| compatible = "nvidia,tegra114-hsuart", "nvidia,tegra124-uart"; | |
| reg = <0x0 0x70006000 0x0 0x40>; | |
| reg-shift = <0x2>; | |
| interrupts = <0x0 0x24 0x4>; | |
| clocks = <0x2 0x6>; | |
| resets = <0x2 0x6>; | |
| reset-names = "serial"; | |
| dmas = <0x12 0x8 0x12 0x8>; | |
| dma-names = "rx", "tx"; | |
| status = "okay"; | |
| nvidia,dma-request-selector = <0x12 0x8>; | |
| iommus = <0x5 0xe>; | |
| }; | |
| serial@0,70006040 { | |
| compatible = "nvidia,tegra114-hsuart", "nvidia,tegra124-uart"; | |
| reg = <0x0 0x70006040 0x0 0x40>; | |
| reg-shift = <0x2>; | |
| interrupts = <0x0 0x25 0x4>; | |
| clocks = <0x2 0xc0>; | |
| resets = <0x2 0x7>; | |
| reset-names = "serial"; | |
| dmas = <0x12 0x9 0x12 0x9>; | |
| dma-names = "rx", "tx"; | |
| status = "okay"; | |
| nvidia,dma-request-selector = <0x12 0x9>; | |
| iommus = <0x5 0xe>; | |
| }; | |
| serial@0,70006200 { | |
| compatible = "nvidia,tegra114-hsuart", "nvidia,tegra124-uart"; | |
| reg = <0x0 0x70006200 0x0 0x40>; | |
| reg-shift = <0x2>; | |
| interrupts = <0x0 0x2e 0x4>; | |
| clocks = <0x2 0x37>; | |
| resets = <0x2 0x37>; | |
| reset-names = "serial"; | |
| dmas = <0x12 0xa 0x12 0xa>; | |
| dma-names = "rx", "tx"; | |
| status = "okay"; | |
| nvidia,dma-request-selector = <0x12 0xa>; | |
| iommus = <0x5 0xe>; | |
| }; | |
| serial@0,70006300 { | |
| compatible = "nvidia,tegra20-uart", "nvidia,tegra124-uart", "nvidia,tegra114-hsuart"; | |
| reg = <0x0 0x70006300 0x0 0x40>; | |
| reg-shift = <0x2>; | |
| interrupts = <0x0 0x5a 0x4>; | |
| clocks = <0x2 0x41>; | |
| resets = <0x2 0x41>; | |
| reset-names = "serial"; | |
| dmas = <0x12 0x13 0x12 0x13>; | |
| dma-names = "rx", "tx"; | |
| status = "okay"; | |
| nvidia,dma-request-selector = <0x12 0x13>; | |
| iommus = <0x5 0xe>; | |
| console-port; | |
| sqa-automation-port; | |
| }; | |
| pwm@0,7000a000 { | |
| compatible = "nvidia,tegra124-pwm"; | |
| reg = <0x0 0x7000a000 0x0 0x100>; | |
| #pwm-cells = <0x2>; | |
| clocks = <0x2 0x11>; | |
| resets = <0x2 0x11>; | |
| reset-names = "pwm"; | |
| status = "disabled"; | |
| linux,phandle = <0x37>; | |
| phandle = <0x37>; | |
| }; | |
| i2c@0,7000c000 { | |
| compatible = "nvidia,tegra124-i2c"; | |
| reg = <0x0 0x7000c000 0x0 0x100>; | |
| interrupts = <0x0 0x26 0x4>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| clocks = <0x2 0xc>; | |
| clock-names = "div-clk"; | |
| resets = <0x2 0xc>; | |
| reset-names = "i2c"; | |
| dmas = <0x12 0x15 0x12 0x15>; | |
| dma-names = "rx", "tx"; | |
| status = "okay"; | |
| scl-gpio = <0x7 0x14 0x0>; | |
| sda-gpio = <0x7 0x15 0x0>; | |
| iommus = <0x5 0xe>; | |
| clock-frequency = <0x61a80>; | |
| nvidia,memory-clients = <0xe>; | |
| mpu6515@69 { | |
| compatible = "invensense,mpu6515"; | |
| reg = <0x69>; | |
| interrupt-parent = <0x8>; | |
| interrupts = <0x90 0x1>; | |
| invensense,int_config = <0x10>; | |
| invensense,level_shifter = <0x0>; | |
| invensense,orientation = [ff 00 00 00 01 00 00 00 ff]; | |
| invensense,sec_slave_type = <0x0>; | |
| invensense,key = <0x4ecc7eeb 0xf61e3522 0x340d65 0x32e99489>; | |
| vlogic-supply = <0x13>; | |
| vdd-supply = <0x14>; | |
| }; | |
| ak8963c@0d { | |
| compatible = "ak,ak8963"; | |
| reg = <0xd>; | |
| orientation = [ff 00 00 00 01 00 00 00 ff]; | |
| config = "mpu"; | |
| vid-supply = <0x13>; | |
| vdd-supply = <0x14>; | |
| }; | |
| cm3217@10 { | |
| compatible = "capella,cm3217"; | |
| reg = <0x10>; | |
| vdd-supply = <0x14>; | |
| illuminance,resolution = "8740"; | |
| illuminance,max-range = "681613.7"; | |
| illuminance,power-consumed = "0.09"; | |
| }; | |
| ltr659@23 { | |
| compatible = "lite-on,ltr659"; | |
| reg = <0x23>; | |
| threshold = <0x50>; | |
| vdd-supply = <0x14>; | |
| vled-supply = <0x13>; | |
| }; | |
| }; | |
| i2c@0,7000c400 { | |
| compatible = "nvidia,tegra124-i2c"; | |
| reg = <0x0 0x7000c400 0x0 0x100>; | |
| interrupts = <0x0 0x54 0x4>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| clocks = <0x2 0x36>; | |
| clock-names = "div-clk"; | |
| resets = <0x2 0x36>; | |
| reset-names = "i2c"; | |
| dmas = <0x12 0x16 0x12 0x16>; | |
| dma-names = "rx", "tx"; | |
| status = "okay"; | |
| scl-gpio = <0x8 0x9d 0x0>; | |
| sda-gpio = <0x8 0x9e 0x0>; | |
| iommus = <0x5 0xe>; | |
| clock-frequency = <0x186a0>; | |
| battery-gauge@36 { | |
| compatible = "maxim,max17048"; | |
| reg = <0x36>; | |
| status = "okay"; | |
| interrupt-parent = <0x8>; | |
| interrupts = <0x85 0x0>; | |
| tz-name = "battery-temp"; | |
| alert-threshold = <0x0>; | |
| one-percent-alerts = <0x1>; | |
| valert-max = <0x13ec>; | |
| valert-min = <0x0>; | |
| vreset-threshold = <0x960>; | |
| vreset-disable = <0x1>; | |
| hib-threshold = <0x30>; | |
| hib-active-threshold = <0x80>; | |
| bits = <0x12>; | |
| rcomp = <0x39>; | |
| rcomp-seg = <0x200>; | |
| soccheck-a = <0x77>; | |
| soccheck-b = <0x79>; | |
| ocvtest = <0xda90>; | |
| data-tbl = <0x98 0x80 0xb3 0x50 0xb7 0x90 0xb9 0x0 0xba 0x70 0xbc 0x10 0xbc 0x50 0xbc 0xa0 0xbd 0x20 0xbe 0x30 0xbf 0x40 0xc2 0xf0 0xc4 0x20 0xc7 0xe0 0xcb 0xf0 0xd0 0x90 0x0 0x40 0x6 0x70 0xe 0x50 0x12 0x0 0x18 0xd0 0x33 0x10 0x31 0x40 0x35 0xd0 0x18 0xd0 0x19 0x0 0xb 0xf0 0xc 0x10 0xd 0x10 0x7 0x90 0x8 0x0 0x8 0x0>; | |
| }; | |
| battery-gauge@0b { | |
| compatible = "onsemi,lc709203f"; | |
| reg = <0xb>; | |
| interrupt-parent = <0x8>; | |
| interrupts = <0x85 0x0>; | |
| onsemi,thermistor-beta = <0xd6b>; | |
| onsemi,kernel-maximum-soc = <0x63>; | |
| onsemi,alert-low-rsoc = <0x0>; | |
| onsemi,alert-low-voltage = <0x0>; | |
| status = "okay"; | |
| onsemi,kernel-threshold-soc = <0x2>; | |
| io-channels = <0x15 0x1>; | |
| io-channel-names = "battery-current"; | |
| linux,phandle = <0x2b>; | |
| phandle = <0x2b>; | |
| }; | |
| battery-charger@6b { | |
| compatible = "ti,bq2419x"; | |
| reg = <0x6b>; | |
| interrupt-parent = <0x8>; | |
| interrupts = <0x48 0x0>; | |
| status = "okay"; | |
| charger { | |
| status = "okay"; | |
| regulator-name = "batt_regulator"; | |
| regulator-max-microamp = <0x2dc6c0>; | |
| ti,watchdog-timeout = <0x28>; | |
| ti,rtc-alarm-time = <0xe10>; | |
| ti,auto-recharge-time = <0x708>; | |
| ti,disbale-suspend-during-charging; | |
| ti,charge-voltage-limit-millivolt = <0x1100>; | |
| ti,charge-term-current-limit-milliamp = <0x1>; | |
| ti,temp-range = <0xa 0xf 0x19 0x2d 0x32 0x3c>; | |
| ti,charge-current-limit = <0x208 0x410 0xa28 0xa28 0xa28 0x208>; | |
| ti,thermal-zone = "battery"; | |
| ti,temp-polling-time-sec = <0x5>; | |
| ti,ir-comp-voltage-millivolt = <0x1>; | |
| ti,ir-comp-resister-ohm = <0x46>; | |
| ti,auto-recharge-time-power-off = <0xe10>; | |
| ti,auto-recharge-time-suspend = <0xe10>; | |
| ti,charge-thermal-voltage-limit = <0x1100 0x1100 0x1100 0x1100 0x1068 0x1068>; | |
| ti,soc-range = <0x32 0x3c 0x46 0x50 0x55 0x5a 0x5f 0x65>; | |
| ti,input-voltage-soc-limit = <0x1068 0x10b8 0x1108 0x1158 0x11a8 0x11f8 0x1248 0x1298>; | |
| dt-override-status-odm-data = <0xc00000 0x400000>; | |
| consumers { | |
| c1 { | |
| regulator-consumer-supply = "usb_bat_chg"; | |
| regulator-consumer-device = "tegra-udc.0"; | |
| }; | |
| c2 { | |
| regulator-consumer-supply = "usb_bat_chg"; | |
| regulator-consumer-device = "tegra-otg"; | |
| }; | |
| }; | |
| }; | |
| vbus { | |
| regulator-name = "vbus_regulator"; | |
| ti,otg-iusb-gpio = <0x7 0x8 0x44 0x0>; | |
| consumers { | |
| c1 { | |
| regulator-consumer-supply = "usb_vbus"; | |
| regulator-consumer-device = "tegra-ehci.0"; | |
| }; | |
| c2 { | |
| regulator-consumer-supply = "usb_vbus"; | |
| regulator-consumer-device = "tegra-otg"; | |
| }; | |
| }; | |
| }; | |
| }; | |
| iqs253@44 { | |
| compatible = "azoteq,iqs253"; | |
| reg = <0x44>; | |
| vddhi-supply = <0x14>; | |
| vendor = "Azoteq"; | |
| proximity,max-range = [32 00]; | |
| proximity,integration-time = "16000000"; | |
| proximity,power-consumed = "1.67"; | |
| status = "okay"; | |
| }; | |
| ina3221x@40 { | |
| compatible = "ti,ina3221x"; | |
| reg = <0x40>; | |
| ti,trigger-config = <0x7203>; | |
| ti,continuous-config = <0x7c07>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| #io-channel-cells = <0x1>; | |
| linux,phandle = <0x15>; | |
| phandle = <0x15>; | |
| channel@0 { | |
| reg = <0x0>; | |
| ti,rail-name = "VDD_BAT"; | |
| ti,current-warning-limit-ma = <0x1f40>; | |
| ti,current-critical-limit-ma = <0x2328>; | |
| ti,shunt-resistor-mohm = <0x1>; | |
| }; | |
| channel@1 { | |
| reg = <0x1>; | |
| ti,rail-name = "VDD_USB_5V0"; | |
| ti,shunt-resistor-mohm = <0xa>; | |
| }; | |
| channel@2 { | |
| reg = <0x2>; | |
| ti,rail-name = "VDD_SYS_MDM"; | |
| ti,shunt-resistor-mohm = <0x1>; | |
| }; | |
| }; | |
| }; | |
| i2c@0,7000c500 { | |
| compatible = "nvidia,tegra124-i2c"; | |
| reg = <0x0 0x7000c500 0x0 0x100>; | |
| interrupts = <0x0 0x5c 0x4>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| clocks = <0x2 0x43>; | |
| clock-names = "div-clk"; | |
| resets = <0x2 0x43>; | |
| reset-names = "i2c"; | |
| dmas = <0x12 0x17 0x12 0x17>; | |
| dma-names = "rx", "tx"; | |
| status = "okay"; | |
| scl-gpio = <0x8 0xd9 0x0>; | |
| sda-gpio = <0x8 0xda 0x0>; | |
| iommus = <0x5 0xe>; | |
| clock-frequency = <0x61a80>; | |
| }; | |
| i2c@0,7000c700 { | |
| compatible = "nvidia,tegra124-i2c"; | |
| reg = <0x0 0x7000c700 0x0 0x100>; | |
| interrupts = <0x0 0x78 0x4>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| clocks = <0x2 0x67>; | |
| clock-names = "div-clk"; | |
| resets = <0x2 0x67>; | |
| reset-names = "i2c"; | |
| dmas = <0x12 0x1a 0x12 0x1a>; | |
| dma-names = "rx", "tx"; | |
| status = "okay"; | |
| scl-gpio = <0x8 0xac 0x0>; | |
| sda-gpio = <0x8 0xad 0x0>; | |
| iommus = <0x5 0xe>; | |
| clock-frequency = <0x186a0>; | |
| linux,phandle = <0x7>; | |
| phandle = <0x7>; | |
| }; | |
| i2c@0,7000d000 { | |
| compatible = "nvidia,tegra124-i2c"; | |
| reg = <0x0 0x7000d000 0x0 0x100>; | |
| interrupts = <0x0 0x35 0x4>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| clocks = <0x2 0x2f>; | |
| clock-names = "div-clk"; | |
| resets = <0x2 0x2f>; | |
| reset-names = "i2c"; | |
| dmas = <0x12 0x18 0x12 0x18>; | |
| dma-names = "rx", "tx"; | |
| status = "okay"; | |
| nvidia,require-cldvfs-clock; | |
| scl-gpio = <0x8 0xce 0x0>; | |
| sda-gpio = <0x8 0xcf 0x0>; | |
| iommus = <0x5 0xe>; | |
| clock-frequency = <0x61a80>; | |
| nvidia,bit-banging-xfer-after-shutdown; | |
| tps65913 { | |
| compatible = "ti,palmas"; | |
| reg = <0x58>; | |
| #interrupt-cells = <0x2>; | |
| interrupt-controller; | |
| linux,phandle = <0x16>; | |
| phandle = <0x16>; | |
| thermal { | |
| status = "okay"; | |
| }; | |
| gpio { | |
| compatible = "ti,palmas-gpio"; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| linux,phandle = <0x35>; | |
| phandle = <0x35>; | |
| }; | |
| rtc { | |
| compatible = "ti,palmas-rtc"; | |
| interrupt-parent = <0x16>; | |
| }; | |
| pinmux { | |
| compatible = "ti,tps65913-pinctrl"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x17>; | |
| pinmux { | |
| linux,phandle = <0x17>; | |
| phandle = <0x17>; | |
| powergood { | |
| pins = "powergood"; | |
| function = "powergood"; | |
| }; | |
| vac { | |
| pins = "vac"; | |
| function = "vac"; | |
| }; | |
| pin_gpio0 { | |
| pins = "gpio0"; | |
| function = "id"; | |
| bias-pull-up; | |
| }; | |
| pin_gpio1 { | |
| pins = "gpio1"; | |
| function = "gpio"; | |
| bias-disable; | |
| }; | |
| pin_gpio6 { | |
| pins = "gpio2", "gpio3", "gpio4", "gpio6", "gpio7"; | |
| function = "gpio"; | |
| }; | |
| pin_gpio5 { | |
| pins = "gpio5"; | |
| function = "clk32kgaudio"; | |
| }; | |
| }; | |
| }; | |
| extcon { | |
| compatible = "ti,palmas-usb"; | |
| extcon-name = "palmas-extcon"; | |
| ti,wakeup; | |
| ti,enable-id-detection; | |
| ti,enable-vbus-detection; | |
| linux,phandle = <0x38>; | |
| phandle = <0x38>; | |
| }; | |
| watchdog { | |
| compatible = "ti,palmas-watchdog"; | |
| ti,system-watchdog-timer-period = <0x40>; | |
| status = "disabled"; | |
| }; | |
| power_pm { | |
| compatible = "ti,palmas-pm"; | |
| system-pmic-power-off; | |
| }; | |
| palmas_ldousb_in { | |
| compatible = "ti,palmas-ldousb-in"; | |
| ti,ldousb-in-threshold-voltage = <0x3567e0>; | |
| ti,threshold-voltage-tolerance = <0x186a0>; | |
| ti,enable-in1-above-threshold; | |
| ldousb-in2-supply = <0x19>; | |
| }; | |
| gpadc { | |
| compatible = "ti,palmas-gpadc"; | |
| interrupt-parent = <0x16>; | |
| interrupts = <0x12 0x0 0x10 0x0 0x11 0x0>; | |
| ti,channel0-current-microamp = <0x5>; | |
| ti,channel3-current-microamp = <0x190>; | |
| ti,enable-channel3-dual-current; | |
| ti,enable-extended-delay; | |
| ti,auto-conversion-period-ms = <0x1f4>; | |
| iio_map { | |
| ch0 { | |
| ti,adc-channel-number = <0x0>; | |
| ti,adc-consumer-device = "1-000b"; | |
| ti,adc-consumer-channel = "batt_id"; | |
| }; | |
| ch1 { | |
| ti,adc-channel-number = <0x1>; | |
| ti,adc-consumer-device = "generic-adc-thermal.1"; | |
| ti,adc-consumer-channel = "thermistor"; | |
| }; | |
| ch3 { | |
| ti,adc-channel-number = <0x3>; | |
| ti,adc-consumer-device = "generic-adc-thermal.2"; | |
| ti,adc-consumer-channel = "tdiode"; | |
| }; | |
| ch5 { | |
| ti,adc-channel-number = <0x5>; | |
| ti,adc-consumer-device = "generic-adc-thermal.0"; | |
| ti,adc-consumer-channel = "battery-temp-channel"; | |
| }; | |
| }; | |
| auto_conv0 { | |
| ti,adc-channel-number = <0x3>; | |
| ti,adc-low-threshold = <0x7bc>; | |
| ti,enable-shutdown; | |
| }; | |
| }; | |
| clock { | |
| compatible = "ti,palmas-clk"; | |
| clk32k_kg { | |
| ti,clock-boot-enable; | |
| }; | |
| clk32k_kg_audio { | |
| ti,clock-boot-enable; | |
| }; | |
| }; | |
| pmic { | |
| compatible = "ti,tps65913-pmic", "ti,palmas-pmic"; | |
| ldo1-in-supply = <0x1a>; | |
| ldo5-in-supply = <0x13>; | |
| ldo9-in-supply = <0x14>; | |
| ldoln-in-supply = <0x19>; | |
| ldousb-in-supply = <0x19>; | |
| regulators { | |
| smps123 { | |
| regulator-name = "vdd-cpu"; | |
| regulator-min-microvolt = <0xaae60>; | |
| regulator-max-microvolt = <0x155cc0>; | |
| regulator-always-on; | |
| regulator-boot-on; | |
| ti,roof-floor = <0x1>; | |
| ti,config-flags = <0x8>; | |
| consumers { | |
| c1 { | |
| regulator-consumer-supply = "vdd_cpu"; | |
| }; | |
| }; | |
| }; | |
| smps45 { | |
| regulator-name = "vdd-gpu"; | |
| regulator-min-microvolt = <0xaae60>; | |
| regulator-max-microvolt = <0x155cc0>; | |
| regulator-init-microvolt = <0xf4240>; | |
| regulator-boot-on; | |
| consumers { | |
| c1 { | |
| regulator-consumer-supply = "vdd_gpu"; | |
| }; | |
| }; | |
| }; | |
| smps6 { | |
| regulator-name = "vddio-ddr"; | |
| regulator-always-on; | |
| regulator-boot-on; | |
| linux,phandle = <0x1a>; | |
| phandle = <0x1a>; | |
| consumers { | |
| c1 { | |
| regulator-consumer-supply = "vddio_ddr"; | |
| }; | |
| c2 { | |
| regulator-consumer-supply = "vddio_ddr_mclk"; | |
| }; | |
| c3 { | |
| regulator-consumer-supply = "vddio_ddr3"; | |
| }; | |
| c4 { | |
| regulator-consumer-supply = "vcore1_ddr3"; | |
| }; | |
| }; | |
| }; | |
| smps7 { | |
| regulator-name = "vdd-core"; | |
| regulator-min-microvolt = <0xaae60>; | |
| regulator-max-microvolt = <0x155cc0>; | |
| regulator-always-on; | |
| regulator-boot-on; | |
| ti,roof-floor = <0x3>; | |
| consumers { | |
| c1 { | |
| regulator-consumer-supply = "vdd_core"; | |
| }; | |
| }; | |
| }; | |
| smps8 { | |
| regulator-name = "vdd-1v8"; | |
| regulator-always-on; | |
| regulator-boot-on; | |
| linux,phandle = <0x13>; | |
| phandle = <0x13>; | |
| consumers { | |
| c1 { | |
| regulator-consumer-supply = "dbvdd"; | |
| regulator-consumer-device = "tegra-snd-rt5639.0"; | |
| }; | |
| c2 { | |
| regulator-consumer-supply = "avdd"; | |
| regulator-consumer-device = "tegra-snd-rt5639.0"; | |
| }; | |
| c3 { | |
| regulator-consumer-supply = "avdd_osc"; | |
| }; | |
| c4 { | |
| regulator-consumer-supply = "vddio_sys"; | |
| }; | |
| c5 { | |
| regulator-consumer-supply = "vddio_sys_2"; | |
| }; | |
| c6 { | |
| regulator-consumer-supply = "vddio_gmi"; | |
| }; | |
| c7 { | |
| regulator-consumer-supply = "vddio_sdmmc"; | |
| regulator-consumer-device = "sdhci-tegra.0"; | |
| }; | |
| c8 { | |
| regulator-consumer-supply = "vddio_sdmmc"; | |
| regulator-consumer-device = "sdhci-tegra.3"; | |
| }; | |
| c9 { | |
| regulator-consumer-supply = "avdd_pll_utmip"; | |
| regulator-consumer-device = "tegra-udc.0"; | |
| }; | |
| c10 { | |
| regulator-consumer-supply = "avdd_pll_utmip"; | |
| regulator-consumer-device = "tegra-ehci.0"; | |
| }; | |
| c11 { | |
| regulator-consumer-supply = "avdd_pll_utmip"; | |
| regulator-consumer-device = "tegra-ehci.1"; | |
| }; | |
| c12 { | |
| regulator-consumer-supply = "avdd_pll_utmip"; | |
| regulator-consumer-device = "tegra-ehci.2"; | |
| }; | |
| c14 { | |
| regulator-consumer-supply = "vddio_audio"; | |
| }; | |
| c15 { | |
| regulator-consumer-supply = "vddio_uart"; | |
| }; | |
| c16 { | |
| regulator-consumer-supply = "vddio_bb"; | |
| }; | |
| c17 { | |
| regulator-consumer-supply = "vdd_1v8_eeprom"; | |
| }; | |
| c18 { | |
| regulator-consumer-supply = "vlogic"; | |
| regulator-consumer-device = "0-0069"; | |
| }; | |
| c19 { | |
| regulator-consumer-supply = "vdd"; | |
| regulator-consumer-device = "0-0069"; | |
| }; | |
| c20 { | |
| regulator-consumer-supply = "dmicvdd"; | |
| regulator-consumer-device = "tegra-snd-rt5639.0"; | |
| }; | |
| c21 { | |
| regulator-consumer-supply = "dmicvdd"; | |
| regulator-consumer-device = "tegra-snd-rt5645.0"; | |
| }; | |
| c22 { | |
| regulator-consumer-supply = "vid"; | |
| regulator-consumer-device = "0-000d"; | |
| }; | |
| c23 { | |
| regulator-consumer-supply = "pwrdet_nand"; | |
| }; | |
| c24 { | |
| regulator-consumer-supply = "pwrdet_sdmmc1"; | |
| }; | |
| c25 { | |
| regulator-consumer-supply = "pwrdet_sdmmc4"; | |
| }; | |
| c26 { | |
| regulator-consumer-supply = "pwrdet_audio"; | |
| }; | |
| c27 { | |
| regulator-consumer-supply = "pwrdet_uart"; | |
| }; | |
| c28 { | |
| regulator-consumer-supply = "pwrdet_bb"; | |
| }; | |
| }; | |
| }; | |
| smps9 { | |
| regulator-name = "vdd-snsr"; | |
| regulator-min-microvolt = <0x325aa0>; | |
| regulator-max-microvolt = <0x325aa0>; | |
| regulator-always-on; | |
| regulator-boot-on; | |
| linux,phandle = <0x14>; | |
| phandle = <0x14>; | |
| consumers { | |
| c1 { | |
| regulator-consumer-supply = "vddio_sd_slot"; | |
| regulator-consumer-device = "sdhci-tegra.3"; | |
| }; | |
| c2 { | |
| regulator-consumer-supply = "vdd"; | |
| regulator-consumer-device = "0-000d"; | |
| }; | |
| c3 { | |
| regulator-consumer-supply = "vdd"; | |
| regulator-consumer-device = "0-004c"; | |
| }; | |
| c4 { | |
| regulator-consumer-supply = "vdd"; | |
| regulator-consumer-device = "0-004d"; | |
| }; | |
| }; | |
| }; | |
| smps10_out1 { | |
| regulator-name = "vdd-out1-5v0"; | |
| regulator-min-microvolt = <0x4c4b40>; | |
| regulator-max-microvolt = <0x4c4b40>; | |
| linux,phandle = <0x18>; | |
| phandle = <0x18>; | |
| }; | |
| smps10_out2 { | |
| regulator-name = "vdd-out2-5v0"; | |
| regulator-min-microvolt = <0x4c4b40>; | |
| regulator-max-microvolt = <0x4c4b40>; | |
| linux,phandle = <0x19>; | |
| phandle = <0x19>; | |
| consumers { | |
| c1 { | |
| regulator-consumer-supply = "spkvdd"; | |
| regulator-consumer-device = "tegra-snd-rt5639.0"; | |
| }; | |
| c2 { | |
| regulator-consumer-supply = "spkvdd"; | |
| regulator-consumer-device = "tegra-snd-rt5645.0"; | |
| }; | |
| }; | |
| }; | |
| ldo1 { | |
| regulator-name = "avdd-pll"; | |
| regulator-always-on; | |
| regulator-boot-on; | |
| ti,roof-floor = <0x3>; | |
| consumers { | |
| c1 { | |
| regulator-consumer-supply = "avdd_pll_m"; | |
| }; | |
| c2 { | |
| regulator-consumer-supply = "avdd_pll_ap_c2_c3"; | |
| }; | |
| c3 { | |
| regulator-consumer-supply = "avdd_pll_cud2dpd"; | |
| }; | |
| c4 { | |
| regulator-consumer-supply = "avdd_pll_c4"; | |
| }; | |
| c5 { | |
| regulator-consumer-supply = "vddio_ddr_hs"; | |
| }; | |
| c6 { | |
| regulator-consumer-supply = "avdd_pll_erefe"; | |
| }; | |
| c7 { | |
| regulator-consumer-supply = "avdd_pll_cg"; | |
| }; | |
| c8 { | |
| regulator-consumer-supply = "avdd_pll_x"; | |
| }; | |
| }; | |
| }; | |
| ldo2 { | |
| regulator-name = "avdd-lcd"; | |
| regulator-min-microvolt = <0x325aa0>; | |
| regulator-max-microvolt = <0x325aa0>; | |
| consumers { | |
| c1 { | |
| regulator-consumer-supply = "avdd_lcd"; | |
| regulator-consumer-device = "tegradc.0"; | |
| }; | |
| }; | |
| }; | |
| ldo3 { | |
| regulator-name = "vdd-touch"; | |
| regulator-min-microvolt = <0x325aa0>; | |
| regulator-max-microvolt = <0x325aa0>; | |
| regulator-enable-ramp-delay = <0xbb8>; | |
| ti,disable-pull-down; | |
| linux,phandle = <0x36>; | |
| phandle = <0x36>; | |
| }; | |
| ldo4 { | |
| regulator-name = "avdd-cam1"; | |
| regulator-min-microvolt = <0x2932e0>; | |
| regulator-max-microvolt = <0x2932e0>; | |
| linux,phandle = <0x3a>; | |
| phandle = <0x3a>; | |
| consumers { | |
| c1 { | |
| regulator-consumer-supply = "avdd_ov5693"; | |
| regulator-consumer-device = "2-0010"; | |
| }; | |
| }; | |
| }; | |
| ldo5 { | |
| regulator-name = "avdd-dsi-csi"; | |
| consumers { | |
| c1 { | |
| regulator-consumer-supply = "vddio_hsic"; | |
| regulator-consumer-device = "tegra-ehci.1"; | |
| }; | |
| c2 { | |
| regulator-consumer-supply = "vddio_hsic"; | |
| regulator-consumer-device = "tegra-ehci.2"; | |
| }; | |
| c4 { | |
| regulator-consumer-supply = "avdd_dsi_csi"; | |
| regulator-consumer-device = "tegradc.0"; | |
| }; | |
| c5 { | |
| regulator-consumer-supply = "avdd_dsi_csi"; | |
| regulator-consumer-device = "tegradc.1"; | |
| }; | |
| c6 { | |
| regulator-consumer-supply = "avdd_dsi_csi"; | |
| regulator-consumer-device = "vi.0"; | |
| }; | |
| c7 { | |
| regulator-consumer-supply = "avdd_dsi_csi"; | |
| regulator-consumer-device = "vi.1"; | |
| }; | |
| c8 { | |
| regulator-consumer-supply = "vdd_lcd_bl"; | |
| regulator-consumer-device = "tegradc.0"; | |
| }; | |
| c9 { | |
| regulator-consumer-supply = "pwrdet_mipi"; | |
| }; | |
| }; | |
| }; | |
| ldo6 { | |
| regulator-name = "vpp-fuse"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| }; | |
| ldo7 { | |
| regulator-name = "avdd-cam-af"; | |
| regulator-min-microvolt = <0x2932e0>; | |
| regulator-max-microvolt = <0x2932e0>; | |
| linux,phandle = <0x3b>; | |
| phandle = <0x3b>; | |
| consumers { | |
| c1 { | |
| regulator-consumer-supply = "avdd_af1_cam"; | |
| }; | |
| c2 { | |
| regulator-consumer-supply = "avdd_cam2_cam"; | |
| }; | |
| c3 { | |
| regulator-consumer-supply = "vdd_af1"; | |
| regulator-consumer-device = "2-0010"; | |
| }; | |
| c4 { | |
| regulator-consumer-supply = "vdd"; | |
| regulator-consumer-device = "2-000c"; | |
| }; | |
| c5 { | |
| regulator-consumer-supply = "vana"; | |
| regulator-consumer-device = "2-0048"; | |
| }; | |
| c6 { | |
| regulator-consumer-supply = "vana"; | |
| regulator-consumer-device = "2-0036"; | |
| }; | |
| c7 { | |
| regulator-consumer-supply = "vin"; | |
| regulator-consumer-device = "2-0030"; | |
| }; | |
| c8 { | |
| regulator-consumer-supply = "vana"; | |
| regulator-consumer-device = "2-0010"; | |
| }; | |
| }; | |
| }; | |
| ldo8 { | |
| regulator-name = "vdd-rtc"; | |
| regulator-min-microvolt = <0xe7ef0>; | |
| regulator-max-microvolt = <0xe7ef0>; | |
| regulator-always-on; | |
| regulator-boot-on; | |
| consumers { | |
| c1 { | |
| regulator-consumer-supply = "vdd_rtc"; | |
| }; | |
| }; | |
| }; | |
| ldo9 { | |
| regulator-name = "vddio-sdmmc-2"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x325aa0>; | |
| consumers { | |
| c1 { | |
| regulator-consumer-supply = "vddio_sdmmc"; | |
| regulator-consumer-device = "sdhci-tegra.2"; | |
| }; | |
| c2 { | |
| regulator-consumer-supply = "pwrdet_sdmmc3"; | |
| }; | |
| }; | |
| }; | |
| ldoln { | |
| regulator-name = "vddio-hv"; | |
| regulator-always-on; | |
| regulator-boot-on; | |
| consumers { | |
| c1 { | |
| regulator-consumer-supply = "vddio_hv"; | |
| regulator-consumer-device = "tegradc.1"; | |
| }; | |
| c2 { | |
| regulator-consumer-supply = "avdd_hdmi"; | |
| regulator-consumer-device = "tegradc.1"; | |
| }; | |
| c3 { | |
| regulator-consumer-supply = "pwrdet_hv"; | |
| }; | |
| c4 { | |
| regulator-consumer-supply = "vddio_pex_ctl"; | |
| regulator-consumer-device = "tegra-pcie"; | |
| }; | |
| }; | |
| }; | |
| ldousb { | |
| regulator-name = "avdd-usb"; | |
| regulator-always-on; | |
| regulator-boot-on; | |
| consumers { | |
| c1 { | |
| regulator-consumer-supply = "pwrdet_pex_ctl"; | |
| }; | |
| c2 { | |
| regulator-consumer-supply = "avdd_usb"; | |
| regulator-consumer-device = "tegra-udc.0"; | |
| }; | |
| c3 { | |
| regulator-consumer-supply = "avdd_usb"; | |
| regulator-consumer-device = "tegra-ehci.0"; | |
| }; | |
| c4 { | |
| regulator-consumer-supply = "avdd_usb"; | |
| regulator-consumer-device = "tegra-ehci.1"; | |
| }; | |
| c5 { | |
| regulator-consumer-supply = "avdd_usb"; | |
| regulator-consumer-device = "tegra-ehci.2"; | |
| }; | |
| c7 { | |
| regulator-consumer-supply = "hvdd_pex"; | |
| regulator-consumer-device = "tegra-pcie"; | |
| }; | |
| c8 { | |
| regulator-consumer-supply = "hvdd_pex_pll_e"; | |
| regulator-consumer-device = "tegra-pcie"; | |
| }; | |
| }; | |
| }; | |
| }; | |
| }; | |
| }; | |
| }; | |
| i2c@0,7000d100 { | |
| compatible = "nvidia,tegra124-i2c"; | |
| reg = <0x0 0x7000d100 0x0 0x100>; | |
| interrupts = <0x0 0x3f 0x4>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| clocks = <0x2 0xa6>; | |
| clock-names = "div-clk"; | |
| resets = <0x2 0xa6>; | |
| reset-names = "i2c"; | |
| dmas = <0x12 0x1e 0x12 0x1e>; | |
| dma-names = "rx", "tx"; | |
| status = "okay"; | |
| iommus = <0x5 0xe>; | |
| clock-frequency = <0x61a80>; | |
| }; | |
| spi@0,7000d400 { | |
| compatible = "nvidia,tegra114-spi"; | |
| reg = <0x0 0x7000d400 0x0 0x200>; | |
| interrupts = <0x0 0x3b 0x4>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| clocks = <0x2 0x29>; | |
| clock-names = "spi"; | |
| resets = <0x2 0x29>; | |
| reset-names = "spi"; | |
| dmas = <0x12 0xf 0x12 0xf>; | |
| dma-names = "rx", "tx"; | |
| status = "okay"; | |
| nvidia,dma-request-selector = <0x12 0xf>; | |
| iommus = <0x5 0xe>; | |
| nvidia,clk-parents = "pll_p", "clk_m"; | |
| spi-max-frequency = <0x17d7840>; | |
| }; | |
| spi@0,7000d600 { | |
| compatible = "nvidia,tegra114-spi"; | |
| reg = <0x0 0x7000d600 0x0 0x200>; | |
| interrupts = <0x0 0x52 0x4>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| clocks = <0x2 0x2c>; | |
| clock-names = "spi"; | |
| resets = <0x2 0x2c>; | |
| reset-names = "spi"; | |
| dmas = <0x12 0x10 0x12 0x10>; | |
| dma-names = "rx", "tx"; | |
| status = "disabled"; | |
| nvidia,dma-request-selector = <0x12 0x10>; | |
| iommus = <0x5 0xe>; | |
| nvidia,clk-parents = "pll_p", "clk_m"; | |
| }; | |
| spi@0,7000d800 { | |
| compatible = "nvidia,tegra114-spi"; | |
| reg = <0x0 0x7000d800 0x0 0x200>; | |
| interrupts = <0x0 0x53 0x4>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| clocks = <0x2 0x2e>; | |
| clock-names = "spi"; | |
| resets = <0x2 0x2e>; | |
| reset-names = "spi"; | |
| dmas = <0x12 0x11 0x12 0x11>; | |
| dma-names = "rx", "tx"; | |
| status = "disabled"; | |
| nvidia,dma-request-selector = <0x12 0x11>; | |
| iommus = <0x5 0xe>; | |
| nvidia,clk-parents = "pll_p", "clk_m"; | |
| }; | |
| spi@0,7000da00 { | |
| compatible = "nvidia,tegra114-spi"; | |
| reg = <0x0 0x7000da00 0x0 0x200>; | |
| interrupts = <0x0 0x5d 0x4>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| clocks = <0x2 0x44>; | |
| clock-names = "spi"; | |
| resets = <0x2 0x44>; | |
| reset-names = "spi"; | |
| dmas = <0x12 0x12 0x12 0x12>; | |
| dma-names = "rx", "tx"; | |
| status = "okay"; | |
| nvidia,dma-request-selector = <0x12 0x12>; | |
| iommus = <0x5 0xe>; | |
| nvidia,clk-parents = "pll_p", "clk_m"; | |
| spi-max-frequency = <0x17d7840>; | |
| }; | |
| spi@0,7000dc00 { | |
| compatible = "nvidia,tegra114-spi"; | |
| reg = <0x0 0x7000dc00 0x0 0x200>; | |
| interrupts = <0x0 0x5e 0x4>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| clocks = <0x2 0x68>; | |
| clock-names = "spi"; | |
| resets = <0x2 0x68>; | |
| reset-names = "spi"; | |
| dmas = <0x12 0x1b 0x12 0x1b>; | |
| dma-names = "rx", "tx"; | |
| status = "disabled"; | |
| nvidia,dma-request-selector = <0x12 0x1b>; | |
| iommus = <0x5 0xe>; | |
| nvidia,clk-parents = "pll_p", "clk_m"; | |
| }; | |
| spi@0,7000de00 { | |
| compatible = "nvidia,tegra114-spi"; | |
| reg = <0x0 0x7000de00 0x0 0x200>; | |
| interrupts = <0x0 0x4f 0x4>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| clocks = <0x2 0x69>; | |
| clock-names = "spi"; | |
| resets = <0x2 0x69>; | |
| reset-names = "spi"; | |
| dmas = <0x12 0x1c 0x12 0x1c>; | |
| dma-names = "rx", "tx"; | |
| status = "disabled"; | |
| nvidia,dma-request-selector = <0x12 0x1c>; | |
| iommus = <0x5 0xe>; | |
| nvidia,clk-parents = "pll_p", "clk_m"; | |
| }; | |
| rtc@0,7000e000 { | |
| compatible = "nvidia,tegra-rtc"; | |
| reg = <0x0 0x7000e000 0x0 0x100>; | |
| interrupts = <0x0 0x2 0x4>; | |
| clocks = <0x2 0x4>; | |
| status = "okay"; | |
| }; | |
| pmc@0,7000e400 { | |
| compatible = "nvidia,tegra124-pmc"; | |
| reg = <0x0 0x7000e400 0x0 0x400>; | |
| clocks = <0x2 0x105 0x1b>; | |
| clock-names = "pclk", "clk32k_in"; | |
| status = "okay"; | |
| }; | |
| fuse@0,7000f800 { | |
| compatible = "nvidia,tegra124-efuse"; | |
| reg = <0x0 0x7000f800 0x0 0x400>; | |
| clocks = <0x2 0xc6>; | |
| clock-names = "fuse"; | |
| resets = <0x2 0x27>; | |
| reset-names = "fuse"; | |
| }; | |
| mc@0,70019000 { | |
| compatible = "nvidia,tegra124-mc", "nvidia,tegra-mc"; | |
| reg = <0x0 0x70019000 0x0 0xc 0x0 0x70019050 0x0 0x19c 0x0 0x70019200 0x0 0x24 0x0 0x7001929c 0x0 0x1b8 0x0 0x70019464 0x0 0x198 0x0 0x70019604 0x0 0x3b0 0x0 0x700199bc 0x0 0x20 0x0 0x700199f8 0x0 0x8c 0x0 0x70019ab4 0x0 0x54c>; | |
| clocks = <0x2 0x20>; | |
| clock-names = "mc"; | |
| interrupts = <0x0 0x4d 0x4>; | |
| #iommu-cells = <0x1>; | |
| reg-ranges = <0x9>; | |
| int_count = <0x8>; | |
| int_mask = <0x13d40>; | |
| channels = <0x1>; | |
| status = "okay"; | |
| linux,phandle = <0xe>; | |
| phandle = <0xe>; | |
| }; | |
| emc@0,7001b000 { | |
| compatible = "nvidia,tegra12-emc"; | |
| reg = <0x0 0x7001b000 0x0 0x800>; | |
| nvidia,memory-controller = <0xe>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| linux,phandle = <0xf>; | |
| phandle = <0xf>; | |
| emc-table@12750 { | |
| compatible = "nvidia,tegra12-emc-table"; | |
| nvidia,revision = <0x19>; | |
| nvidia,dvfs-version = "02_12750_NoCfgVersion_V5.0.18_V1.1"; | |
| clock-frequency = <0x31ce>; | |
| nvidia,emc-min-mv = <0x320>; | |
| nvidia,gk20a-min-mv = <0x320>; | |
| nvidia,source = "pllp_out0"; | |
| nvidia,src-sel-reg = <0x4000003e>; | |
| nvidia,burst-regs-num = <0xa5>; | |
| nvidia,burst-up-down-regs-num = <0x1f>; | |
| nvidia,emc-registers = <0x0 0x3 0x0 0x0 0x0 0x4 0xa 0x5 0xb 0x0 0x0 0x3 0x3 0x0 0x6 0x6 0x6 0x2 0x0 0x5 0x5 0x10000 0x3 0x0 0x0 0x0 0x0 0x4 0xc 0xd 0xf 0x60 0x0 0x18 0x2 0x2 0x1 0x0 0x7 0xf 0x5 0x5 0x4 0x5 0x4 0x0 0x0 0x5 0x5 0x64 0x0 0x0 0x0 0x1069a298 0x2c00a0 0x8000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x14000 0x0 0x0 0x14000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xfc000 0xfc000 0xfc000 0xfc000 0xfc00 0xfc00 0xfc00 0xfc00 0x10000280 0x0 0x111111 0x130b118 0x0 0x0 0x77ffc081 0x909 0x81f1f108 0x7070004 0x3f 0x16eeeee 0x51451400 0x514514 0x514514 0x51451400 0x3f 0x7 0x0 0x0 0x42 0xe000e 0xe000e 0x0 0x3 0xf2f3 0x800001c5 0xa 0x40040001 0x8000000a 0x1 0x1 0x2 0x0 0x2 0x1 0x3 0x8 0x3 0x2 0x3 0x6 0x6030203 0xa0502 0x77e30303 0x70000f03 0x1f0000>; | |
| nvidia,emc-burst-up-down-regs = <0x1 0x7 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff0049 0xff0080 0xff0004 0xff0004 0x800ff 0xff 0xff0004 0xff00ff 0xff00ff 0xff0024 0xff00ff 0xff 0xff 0xff00ff 0xff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff>; | |
| nvidia,emc-zcal-cnt-long = <0x42>; | |
| nvidia,emc-acal-interval = <0x1fffff>; | |
| nvidia,emc-ctt-term_ctrl = <0x802>; | |
| nvidia,emc-cfg = <0x73240000>; | |
| nvidia,emc-cfg-2 = <0x8c5>; | |
| nvidia,emc-sel-dpd-ctrl = <0x40128>; | |
| nvidia,emc-cfg-dig-dll = <0x2c0068>; | |
| nvidia,emc-bgbias-ctl0 = <0x8>; | |
| nvidia,emc-auto-cal-config2 = <0x0>; | |
| nvidia,emc-auto-cal-config3 = <0x0>; | |
| nvidia,emc-auto-cal-config = <0xa1430000>; | |
| nvidia,emc-mode-0 = <0x80001221>; | |
| nvidia,emc-mode-1 = <0x80100003>; | |
| nvidia,emc-mode-2 = <0x80200008>; | |
| nvidia,emc-mode-4 = <0x0>; | |
| nvidia,emc-clock-latency-change = <0xe1dc>; | |
| }; | |
| emc-table@20400 { | |
| compatible = "nvidia,tegra12-emc-table"; | |
| nvidia,revision = <0x19>; | |
| nvidia,dvfs-version = "02_20400_NoCfgVersion_V5.0.18_V1.1"; | |
| clock-frequency = <0x4fb0>; | |
| nvidia,emc-min-mv = <0x320>; | |
| nvidia,gk20a-min-mv = <0x320>; | |
| nvidia,source = "pllp_out0"; | |
| nvidia,src-sel-reg = <0x40000026>; | |
| nvidia,burst-regs-num = <0xa5>; | |
| nvidia,burst-up-down-regs-num = <0x1f>; | |
| nvidia,emc-registers = <0x0 0x5 0x0 0x0 0x0 0x4 0xa 0x5 0xb 0x0 0x0 0x3 0x3 0x0 0x6 0x6 0x6 0x2 0x0 0x5 0x5 0x10000 0x3 0x0 0x0 0x0 0x0 0x4 0xc 0xd 0xf 0x9a 0x0 0x26 0x2 0x2 0x1 0x0 0x7 0xf 0x6 0x6 0x4 0x5 0x4 0x0 0x0 0x5 0x5 0xa0 0x0 0x0 0x0 0x1069a298 0x2c00a0 0x8000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x14000 0x0 0x0 0x14000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xfc000 0xfc000 0xfc000 0xfc000 0xfc00 0xfc00 0xfc00 0xfc00 0x10000280 0x0 0x111111 0x130b118 0x0 0x0 0x77ffc081 0x909 0x81f1f108 0x7070004 0x3f 0x16eeeee 0x51451400 0x514514 0x514514 0x51451400 0x3f 0xb 0x0 0x0 0x42 0xe000e 0xe000e 0x0 0x3 0xf2f3 0x8000023a 0xa 0x40020001 0x80000012 0x1 0x1 0x2 0x0 0x2 0x1 0x3 0x8 0x3 0x2 0x3 0x6 0x6030203 0xa0502 0x76230303 0x70000f03 0x1f0000>; | |
| nvidia,emc-burst-up-down-regs = <0x1 0xa 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff0049 0xff0080 0xff0004 0xff0004 0x800ff 0xff 0xff0004 0xff00ff 0xff00ff 0xff0024 0xff00ff 0xff 0xff 0xff00ff 0xff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff>; | |
| nvidia,emc-zcal-cnt-long = <0x42>; | |
| nvidia,emc-acal-interval = <0x1fffff>; | |
| nvidia,emc-ctt-term_ctrl = <0x802>; | |
| nvidia,emc-cfg = <0x73240000>; | |
| nvidia,emc-cfg-2 = <0x8c5>; | |
| nvidia,emc-sel-dpd-ctrl = <0x40128>; | |
| nvidia,emc-cfg-dig-dll = <0x2c0068>; | |
| nvidia,emc-bgbias-ctl0 = <0x8>; | |
| nvidia,emc-auto-cal-config2 = <0x0>; | |
| nvidia,emc-auto-cal-config3 = <0x0>; | |
| nvidia,emc-auto-cal-config = <0xa1430000>; | |
| nvidia,emc-mode-0 = <0x80001221>; | |
| nvidia,emc-mode-1 = <0x80100003>; | |
| nvidia,emc-mode-2 = <0x80200008>; | |
| nvidia,emc-mode-4 = <0x0>; | |
| nvidia,emc-clock-latency-change = <0x8b1a>; | |
| }; | |
| emc-table@40800 { | |
| compatible = "nvidia,tegra12-emc-table"; | |
| nvidia,revision = <0x19>; | |
| nvidia,dvfs-version = "02_40800_NoCfgVersion_V5.0.18_V1.1"; | |
| clock-frequency = <0x9f60>; | |
| nvidia,emc-min-mv = <0x320>; | |
| nvidia,gk20a-min-mv = <0x320>; | |
| nvidia,source = "pllp_out0"; | |
| nvidia,src-sel-reg = <0x40000012>; | |
| nvidia,burst-regs-num = <0xa5>; | |
| nvidia,burst-up-down-regs-num = <0x1f>; | |
| nvidia,emc-registers = <0x1 0xa 0x0 0x1 0x0 0x4 0xa 0x5 0xb 0x0 0x0 0x3 0x3 0x0 0x6 0x6 0x6 0x2 0x0 0x5 0x5 0x10000 0x3 0x0 0x0 0x0 0x0 0x4 0xc 0xd 0xf 0x134 0x0 0x4d 0x2 0x2 0x1 0x0 0x8 0xf 0xc 0xc 0x4 0x5 0x4 0x0 0x0 0x5 0x5 0x13f 0x0 0x0 0x0 0x1069a298 0x2c00a0 0x8000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x14000 0x0 0x0 0x14000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xfc000 0xfc000 0xfc000 0xfc000 0xfc00 0xfc00 0xfc00 0xfc00 0x10000280 0x0 0x111111 0x130b118 0x0 0x0 0x77ffc081 0x909 0x81f1f108 0x7070004 0x3f 0x16eeeee 0x51451400 0x514514 0x514514 0x51451400 0x3f 0x15 0x0 0x0 0x42 0xe000e 0xe000e 0x0 0x3 0xf2f3 0x80000370 0xa 0xa0000001 0x80000017 0x1 0x1 0x2 0x0 0x2 0x1 0x3 0x8 0x3 0x2 0x3 0x6 0x6030203 0xa0502 0x74a30303 0x70000f03 0x1f0000>; | |
| nvidia,emc-burst-up-down-regs = <0x1 0x14 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff0049 0xff0080 0xff0004 0xff0004 0x800ff 0xff 0xff0004 0xff00ff 0xff00ff 0xff0024 0xff00ff 0xff 0xff 0xff00ff 0xff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff>; | |
| nvidia,emc-zcal-cnt-long = <0x42>; | |
| nvidia,emc-acal-interval = <0x1fffff>; | |
| nvidia,emc-ctt-term_ctrl = <0x802>; | |
| nvidia,emc-cfg = <0x73240000>; | |
| nvidia,emc-cfg-2 = <0x8c5>; | |
| nvidia,emc-sel-dpd-ctrl = <0x40128>; | |
| nvidia,emc-cfg-dig-dll = <0x2c0068>; | |
| nvidia,emc-bgbias-ctl0 = <0x8>; | |
| nvidia,emc-auto-cal-config2 = <0x0>; | |
| nvidia,emc-auto-cal-config3 = <0x0>; | |
| nvidia,emc-auto-cal-config = <0xa1430000>; | |
| nvidia,emc-mode-0 = <0x80001221>; | |
| nvidia,emc-mode-1 = <0x80100003>; | |
| nvidia,emc-mode-2 = <0x80200008>; | |
| nvidia,emc-mode-4 = <0x0>; | |
| nvidia,emc-clock-latency-change = <0x5172>; | |
| }; | |
| emc-table@68000 { | |
| compatible = "nvidia,tegra12-emc-table"; | |
| nvidia,revision = <0x19>; | |
| nvidia,dvfs-version = "02_68000_NoCfgVersion_V5.0.18_V1.1"; | |
| clock-frequency = <0x109a0>; | |
| nvidia,emc-min-mv = <0x320>; | |
| nvidia,gk20a-min-mv = <0x320>; | |
| nvidia,source = "pllp_out0"; | |
| nvidia,src-sel-reg = <0x4000000a>; | |
| nvidia,burst-regs-num = <0xa5>; | |
| nvidia,burst-up-down-regs-num = <0x1f>; | |
| nvidia,emc-registers = <0x3 0x11 0x0 0x2 0x0 0x4 0xa 0x5 0xb 0x0 0x0 0x3 0x3 0x0 0x6 0x6 0x6 0x2 0x0 0x5 0x5 0x10000 0x3 0x0 0x0 0x0 0x0 0x4 0xc 0xd 0xf 0x202 0x0 0x80 0x2 0x2 0x1 0x0 0xf 0xf 0x13 0x13 0x4 0x5 0x4 0x1 0x0 0x5 0x5 0x213 0x0 0x0 0x0 0x1069a298 0x2c00a0 0x8000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x14000 0x0 0x0 0x14000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xfc000 0xfc000 0xfc000 0xfc000 0xfc00 0xfc00 0xfc00 0xfc00 0x10000280 0x0 0x111111 0x130b118 0x0 0x0 0x77ffc081 0x909 0x81f1f108 0x7070004 0x3f 0x16eeeee 0x51451400 0x514514 0x514514 0x51451400 0x3f 0x22 0x0 0x0 0x42 0xe000e 0xe000e 0x0 0x3 0xf2f3 0x8000050e 0xa 0x1 0x8000001e 0x1 0x1 0x2 0x0 0x2 0x1 0x3 0x8 0x3 0x2 0x3 0x6 0x6030203 0xa0502 0x74230403 0x70000f03 0x1f0000>; | |
| nvidia,emc-burst-up-down-regs = <0x1 0x21 0xff00ff 0xff00ff 0xff00b0 0xff00ff 0xff00ec 0xff00ff 0xff00ec 0xe90049 0xff0080 0xff0004 0xff0004 0x800ff 0xff 0xff0004 0xff00ff 0xff00a3 0xff0024 0xff00ff 0xff 0xef 0xff00ff 0xef 0xff00ff 0xff00ff 0xee00ef 0xff00ff 0xff00ff 0xff00ff 0xff00ff>; | |
| nvidia,emc-zcal-cnt-long = <0x42>; | |
| nvidia,emc-acal-interval = <0x1fffff>; | |
| nvidia,emc-ctt-term_ctrl = <0x802>; | |
| nvidia,emc-cfg = <0x73240000>; | |
| nvidia,emc-cfg-2 = <0x8c5>; | |
| nvidia,emc-sel-dpd-ctrl = <0x40128>; | |
| nvidia,emc-cfg-dig-dll = <0x2c0068>; | |
| nvidia,emc-bgbias-ctl0 = <0x8>; | |
| nvidia,emc-auto-cal-config2 = <0x0>; | |
| nvidia,emc-auto-cal-config3 = <0x0>; | |
| nvidia,emc-auto-cal-config = <0xa1430000>; | |
| nvidia,emc-mode-0 = <0x80001221>; | |
| nvidia,emc-mode-1 = <0x80100003>; | |
| nvidia,emc-mode-2 = <0x80200008>; | |
| nvidia,emc-mode-4 = <0x0>; | |
| nvidia,emc-clock-latency-change = <0x29e0>; | |
| }; | |
| emc-table@102000 { | |
| compatible = "nvidia,tegra12-emc-table"; | |
| nvidia,revision = <0x19>; | |
| nvidia,dvfs-version = "02_102000_NoCfgVersion_V5.0.18_V1.1"; | |
| clock-frequency = <0x18e70>; | |
| nvidia,emc-min-mv = <0x320>; | |
| nvidia,gk20a-min-mv = <0x320>; | |
| nvidia,source = "pllp_out0"; | |
| nvidia,src-sel-reg = <0x40000006>; | |
| nvidia,burst-regs-num = <0xa5>; | |
| nvidia,burst-up-down-regs-num = <0x1f>; | |
| nvidia,emc-registers = <0x4 0x1a 0x0 0x3 0x1 0x4 0xa 0x5 0xb 0x1 0x1 0x3 0x3 0x0 0x6 0x6 0x6 0x2 0x0 0x5 0x5 0x10000 0x3 0x0 0x0 0x0 0x0 0x4 0xc 0xd 0xf 0x304 0x0 0xc1 0x2 0x2 0x1 0x0 0x18 0xf 0x1c 0x1c 0x4 0x5 0x4 0x3 0x0 0x5 0x5 0x31c 0x0 0x0 0x0 0x1069a298 0x2c00a0 0x8000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x14000 0x0 0x0 0x14000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xfc000 0xfc000 0xfc000 0xfc000 0xfc00 0xfc00 0xfc00 0xfc00 0x10000280 0x0 0x111111 0x130b118 0x0 0x0 0x77ffc081 0x909 0x81f1f108 0x7070004 0x3f 0x16eeeee 0x51451400 0x514514 0x514514 0x51451400 0x3f 0x33 0x0 0x0 0x42 0xe000e 0xe000e 0x0 0x3 0xf2f3 0x80000713 0xa 0x8000001 0x80000026 0x1 0x1 0x3 0x0 0x2 0x1 0x3 0x8 0x3 0x2 0x3 0x6 0x6030203 0xa0503 0x73c30504 0x70000f03 0x1f0000>; | |
| nvidia,emc-burst-up-down-regs = <0x1 0x31 0xff00da 0xff00da 0xff0075 0xff00ff 0xff009d 0xff00ff 0xff009d 0x9b0049 0xff0080 0xff0004 0xff0004 0x800ad 0xff 0xff0004 0xff00c6 0xff006d 0xff0024 0xff00d6 0xff 0x9f 0xff00ff 0x9f 0xff00ff 0xff00ff 0x9f00a0 0xff00ff 0xff00ff 0xff00ff 0xff00da>; | |
| nvidia,emc-zcal-cnt-long = <0x42>; | |
| nvidia,emc-acal-interval = <0x1fffff>; | |
| nvidia,emc-ctt-term_ctrl = <0x802>; | |
| nvidia,emc-cfg = <0x73240000>; | |
| nvidia,emc-cfg-2 = <0x8c5>; | |
| nvidia,emc-sel-dpd-ctrl = <0x40128>; | |
| nvidia,emc-cfg-dig-dll = <0x2c0068>; | |
| nvidia,emc-bgbias-ctl0 = <0x8>; | |
| nvidia,emc-auto-cal-config2 = <0x0>; | |
| nvidia,emc-auto-cal-config3 = <0x0>; | |
| nvidia,emc-auto-cal-config = <0xa1430000>; | |
| nvidia,emc-mode-0 = <0x80001221>; | |
| nvidia,emc-mode-1 = <0x80100003>; | |
| nvidia,emc-mode-2 = <0x80200008>; | |
| nvidia,emc-mode-4 = <0x0>; | |
| nvidia,emc-clock-latency-change = <0x1aea>; | |
| }; | |
| emc-table@204000 { | |
| compatible = "nvidia,tegra12-emc-table"; | |
| nvidia,revision = <0x19>; | |
| nvidia,dvfs-version = "02_204000_NoCfgVersion_V5.0.18_V1.1"; | |
| clock-frequency = <0x31ce0>; | |
| nvidia,emc-min-mv = <0x320>; | |
| nvidia,gk20a-min-mv = <0x320>; | |
| nvidia,source = "pllp_out0"; | |
| nvidia,src-sel-reg = <0x40000002>; | |
| nvidia,burst-regs-num = <0xa5>; | |
| nvidia,burst-up-down-regs-num = <0x1f>; | |
| nvidia,emc-registers = <0x9 0x35 0x0 0x6 0x2 0x5 0xa 0x5 0xb 0x2 0x2 0x3 0x3 0x0 0x5 0x5 0x6 0x2 0x0 0x4 0x6 0x10000 0x3 0x0 0x0 0x0 0x0 0x3 0xd 0xf 0x11 0x607 0x0 0x181 0x2 0x2 0x1 0x0 0x32 0xf 0x38 0x38 0x4 0x5 0x4 0x7 0x0 0x5 0x5 0x638 0x0 0x0 0x0 0x1069a298 0x2c00a0 0x8000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x64000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x14000 0x0 0x0 0x14000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x78000 0x78000 0x78000 0x78000 0x7800 0x7800 0x7800 0x7800 0x10000280 0x0 0x111111 0x130b118 0x0 0x0 0x77ffc081 0x909 0x81f1f108 0x7070004 0x3f 0x16eeeee 0x51451400 0x514514 0x514514 0x51451400 0x3f 0x66 0x0 0x20000 0x100 0xe000e 0xe000e 0x0 0x3 0xd2b3 0x80000d22 0xa 0x1000003 0x80000040 0x1 0x1 0x4 0x2 0x4 0x1 0x3 0x8 0x3 0x2 0x4 0x6 0x6040203 0xa0504 0x73840a05 0x70000f03 0x1f0000>; | |
| nvidia,emc-burst-up-down-regs = <0x1 0x62 0xff006d 0xff006d 0xff003c 0xff00af 0xff004f 0xff00af 0xff004f 0x4e0049 0xff0080 0xff0004 0xff0004 0x80057 0xff 0xff0004 0xff0063 0xff0036 0xff0024 0xff006b 0xff 0x50 0xff00ff 0x50 0xff00ff 0xd400ff 0x510050 0xff00ff 0xff00ff 0xff00c6 0xff006d>; | |
| nvidia,emc-zcal-cnt-long = <0x42>; | |
| nvidia,emc-acal-interval = <0x1fffff>; | |
| nvidia,emc-ctt-term_ctrl = <0x802>; | |
| nvidia,emc-cfg = <0x73240000>; | |
| nvidia,emc-cfg-2 = <0x8cd>; | |
| nvidia,emc-sel-dpd-ctrl = <0x40128>; | |
| nvidia,emc-cfg-dig-dll = <0x2c0068>; | |
| nvidia,emc-bgbias-ctl0 = <0x8>; | |
| nvidia,emc-auto-cal-config2 = <0x0>; | |
| nvidia,emc-auto-cal-config3 = <0x0>; | |
| nvidia,emc-auto-cal-config = <0xa1430000>; | |
| nvidia,emc-mode-0 = <0x80001221>; | |
| nvidia,emc-mode-1 = <0x80100003>; | |
| nvidia,emc-mode-2 = <0x80200008>; | |
| nvidia,emc-mode-4 = <0x0>; | |
| nvidia,emc-clock-latency-change = <0xd5c>; | |
| }; | |
| emc-table@300000 { | |
| compatible = "nvidia,tegra12-emc-table"; | |
| nvidia,revision = <0x19>; | |
| nvidia,dvfs-version = "02_300000_NoCfgVersion_V5.0.18_V1.1"; | |
| clock-frequency = <0x493e0>; | |
| nvidia,emc-min-mv = <0x334>; | |
| nvidia,gk20a-min-mv = <0x334>; | |
| nvidia,source = "pllc_out0"; | |
| nvidia,src-sel-reg = <0x20000002>; | |
| nvidia,burst-regs-num = <0xa5>; | |
| nvidia,burst-up-down-regs-num = <0x1f>; | |
| nvidia,emc-registers = <0xd 0x4d 0x0 0x9 0x3 0x4 0x8 0x2 0x9 0x3 0x3 0x2 0x2 0x0 0x3 0x3 0x5 0x2 0x0 0x2 0x7 0x20000 0x3 0x0 0x0 0x0 0x0 0x1 0xe 0x10 0x12 0x8e4 0x0 0x239 0x1 0x8 0x1 0x0 0x4b 0xe 0x52 0x200 0x4 0x5 0x4 0x9 0x0 0x5 0x5 0x924 0x0 0x0 0x0 0x1049b098 0x2c00a0 0x8000 0x70000 0x70000 0x70000 0x70000 0x70000 0x70000 0x70000 0x70000 0x70000 0x70000 0x70000 0x70000 0x70000 0x70000 0x70000 0x70000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x8c000 0x8c000 0x0 0x8c000 0x8c000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x50000 0x50000 0x50000 0x50000 0x5000 0x5000 0x5000 0x5000 0x10000280 0x0 0x111111 0x1231339 0x0 0x0 0x77ffc081 0x303 0x81f1f108 0x7070004 0x0 0x16eeeee 0x51451420 0x514514 0x514514 0x51451400 0x3f 0x96 0x0 0x20000 0x100 0x173000e 0x173000e 0x0 0x3 0x52a3 0x800012d7 0x9 0x8000004 0x80000040 0x1 0x2 0x7 0x4 0x5 0x1 0x2 0x7 0x2 0x2 0x4 0x6 0x6040202 0xb0607 0x77450e08 0x70000f03 0x1f0000>; | |
| nvidia,emc-burst-up-down-regs = <0x4 0x90 0xff004a 0xff004a 0xff003c 0xff0090 0xff0041 0xff0090 0xff0041 0x350049 0xff0080 0xff0004 0xff0004 0x8003b 0xff 0xff0004 0xff0043 0xff002d 0xff0024 0xff0049 0xff 0x36 0xff00ff 0x36 0xff00ff 0xd400ff 0x510036 0xff00ff 0xff00ff 0xff0087 0xff004a>; | |
| nvidia,emc-zcal-cnt-long = <0x42>; | |
| nvidia,emc-acal-interval = <0x1fffff>; | |
| nvidia,emc-ctt-term_ctrl = <0x802>; | |
| nvidia,emc-cfg = <0x73340000>; | |
| nvidia,emc-cfg-2 = <0x8d5>; | |
| nvidia,emc-sel-dpd-ctrl = <0x40128>; | |
| nvidia,emc-cfg-dig-dll = <0x2c0068>; | |
| nvidia,emc-bgbias-ctl0 = <0x0>; | |
| nvidia,emc-auto-cal-config2 = <0x0>; | |
| nvidia,emc-auto-cal-config3 = <0x0>; | |
| nvidia,emc-auto-cal-config = <0xa1430000>; | |
| nvidia,emc-mode-0 = <0x80000321>; | |
| nvidia,emc-mode-1 = <0x80100002>; | |
| nvidia,emc-mode-2 = <0x80200000>; | |
| nvidia,emc-mode-4 = <0x0>; | |
| nvidia,emc-clock-latency-change = <0xa78>; | |
| }; | |
| emc-table@396000 { | |
| compatible = "nvidia,tegra12-emc-table"; | |
| nvidia,revision = <0x19>; | |
| nvidia,dvfs-version = "02_396000_NoCfgVersion_V5.0.18_V1.1"; | |
| clock-frequency = <0x60ae0>; | |
| nvidia,emc-min-mv = <0x352>; | |
| nvidia,gk20a-min-mv = <0x352>; | |
| nvidia,source = "pllm_out0"; | |
| nvidia,src-sel-reg = <0x2>; | |
| nvidia,burst-regs-num = <0xa5>; | |
| nvidia,burst-up-down-regs-num = <0x1f>; | |
| nvidia,emc-registers = <0x11 0x66 0x0 0xc 0x4 0x4 0x8 0x2 0xa 0x4 0x4 0x2 0x2 0x0 0x3 0x3 0x5 0x2 0x0 0x1 0x8 0x20000 0x3 0x0 0x0 0x0 0x0 0x0 0xf 0x10 0x12 0xbd1 0x0 0x2f4 0x1 0x8 0x1 0x0 0x63 0xf 0x6c 0x200 0x4 0x5 0x4 0xd 0x0 0x5 0x5 0xc11 0x0 0x0 0x0 0x1049b098 0x2c00a0 0x8000 0x70000 0x70000 0x70000 0x70000 0x70000 0x70000 0x70000 0x70000 0x70000 0x70000 0x70000 0x70000 0x70000 0x70000 0x70000 0x70000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x64000 0x64000 0x0 0x64000 0x64000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x40000 0x40000 0x40000 0x40000 0x4000 0x4000 0x4000 0x4000 0x10000280 0x0 0x111111 0x1231339 0x0 0x0 0x77ffc081 0x303 0x81f1f108 0x7070004 0x0 0x16eeeee 0x51451420 0x514514 0x514514 0x51451400 0x3f 0xc6 0x0 0x20000 0x100 0x15b000e 0x15b000e 0x0 0x3 0x52a3 0x8000188b 0x9 0xf000005 0x80000040 0x1 0x2 0x9 0x5 0x7 0x1 0x2 0x8 0x2 0x2 0x4 0x6 0x6040202 0xd0709 0x7586120a 0x70000f03 0x1f0000>; | |
| nvidia,emc-burst-up-down-regs = <0xa 0xbe 0xff0038 0xff0038 0xff003c 0xff0090 0xff0041 0xff0090 0xff0041 0x280049 0xff0080 0xff0004 0xff0004 0x8002d 0xff 0xff0004 0xff0033 0xff0022 0xff0024 0xff0037 0xff 0x36 0xff00ff 0x36 0xff00ff 0xd400ff 0x510029 0xff00ff 0xff00ff 0xff0066 0xff0038>; | |
| nvidia,emc-zcal-cnt-long = <0x42>; | |
| nvidia,emc-acal-interval = <0x1fffff>; | |
| nvidia,emc-ctt-term_ctrl = <0x802>; | |
| nvidia,emc-cfg = <0x73340000>; | |
| nvidia,emc-cfg-2 = <0x895>; | |
| nvidia,emc-sel-dpd-ctrl = <0x40008>; | |
| nvidia,emc-cfg-dig-dll = <0x2c0068>; | |
| nvidia,emc-bgbias-ctl0 = <0x0>; | |
| nvidia,emc-auto-cal-config2 = <0x0>; | |
| nvidia,emc-auto-cal-config3 = <0x0>; | |
| nvidia,emc-auto-cal-config = <0xa1430000>; | |
| nvidia,emc-mode-0 = <0x80000521>; | |
| nvidia,emc-mode-1 = <0x80100002>; | |
| nvidia,emc-mode-2 = <0x80200000>; | |
| nvidia,emc-mode-4 = <0x0>; | |
| nvidia,emc-clock-latency-change = <0x884>; | |
| }; | |
| emc-table@528000 { | |
| compatible = "nvidia,tegra12-emc-table"; | |
| nvidia,revision = <0x19>; | |
| nvidia,dvfs-version = "02_528000_NoCfgVersion_V5.0.18_V1.1"; | |
| clock-frequency = <0x80e80>; | |
| nvidia,emc-min-mv = <0x370>; | |
| nvidia,gk20a-min-mv = <0x366>; | |
| nvidia,source = "pllm_ud"; | |
| nvidia,src-sel-reg = <0x80000000>; | |
| nvidia,burst-regs-num = <0xa5>; | |
| nvidia,burst-up-down-regs-num = <0x1f>; | |
| nvidia,emc-registers = <0x18 0x88 0x0 0x10 0x6 0x6 0x9 0x2 0xd 0x6 0x6 0x2 0x2 0x0 0x3 0x3 0x6 0x2 0x0 0x1 0x9 0x30000 0x3 0x0 0x0 0x0 0x0 0x0 0x10 0x12 0x14 0xfd6 0x0 0x3f5 0x2 0xb 0x1 0x0 0x85 0x12 0x90 0x200 0x4 0x5 0x4 0x13 0x0 0x6 0x6 0x1017 0x0 0x0 0x0 0x1049b098 0xe01200b1 0x8000 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x44000 0x44000 0x0 0x44000 0x44000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x2 0x2 0x2 0x2 0x4 0x4 0x4 0x4 0x2 0x2 0x2 0x2 0x4 0x4 0x4 0x4 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0x100002a0 0x0 0x111111 0x123133d 0x0 0x0 0x77ffc085 0x303 0x81f1f108 0x7070004 0x0 0x16eeeee 0x51451420 0x514514 0x514514 0x51451400 0x606003f 0x0 0x0 0x20000 0x100 0x139000e 0x139000e 0x0 0x3 0x42a0 0x80002062 0xa 0xf000007 0x80000040 0x2 0x3 0xc 0x7 0xa 0x1 0x2 0x9 0x2 0x2 0x5 0x6 0x6050202 0x10090c 0x7428180d 0x70000f03 0x1f0000>; | |
| nvidia,emc-burst-up-down-regs = <0xd 0xfd 0xc10038 0xc10038 0xc1003c 0xc10090 0xc10041 0xc10090 0xc10041 0x270049 0xc10080 0xc10004 0xc10004 0x80021 0xc1 0xc10004 0xc10026 0xc1001a 0xc10024 0xc10029 0xc1 0x36 0xc100c1 0x36 0xc100c1 0xd400ff 0x510029 0xc100c1 0xc100c1 0xc10065 0xc1002a>; | |
| nvidia,emc-zcal-cnt-long = <0x42>; | |
| nvidia,emc-acal-interval = <0x1fffff>; | |
| nvidia,emc-ctt-term_ctrl = <0x802>; | |
| nvidia,emc-cfg = <0x73300000>; | |
| nvidia,emc-cfg-2 = <0x89d>; | |
| nvidia,emc-sel-dpd-ctrl = <0x40008>; | |
| nvidia,emc-cfg-dig-dll = <0xe0120069>; | |
| nvidia,emc-bgbias-ctl0 = <0x0>; | |
| nvidia,emc-auto-cal-config2 = <0x0>; | |
| nvidia,emc-auto-cal-config3 = <0x0>; | |
| nvidia,emc-auto-cal-config = <0xa1430000>; | |
| nvidia,emc-mode-0 = <0x80000941>; | |
| nvidia,emc-mode-1 = <0x80100002>; | |
| nvidia,emc-mode-2 = <0x80200008>; | |
| nvidia,emc-mode-4 = <0x0>; | |
| nvidia,emc-clock-latency-change = <0x5a0>; | |
| }; | |
| emc-table@600000 { | |
| compatible = "nvidia,tegra12-emc-table"; | |
| nvidia,revision = <0x19>; | |
| nvidia,dvfs-version = "02_600000_NoCfgVersion_V5.0.18_V1.1"; | |
| clock-frequency = <0x927c0>; | |
| nvidia,emc-min-mv = <0x38e>; | |
| nvidia,gk20a-min-mv = <0x38e>; | |
| nvidia,source = "pllc_ud"; | |
| nvidia,src-sel-reg = <0xe0000000>; | |
| nvidia,burst-regs-num = <0xa5>; | |
| nvidia,burst-up-down-regs-num = <0x1f>; | |
| nvidia,emc-registers = <0x1b 0x9b 0x0 0x13 0x7 0x7 0xb 0x3 0x10 0x7 0x7 0x2 0x2 0x0 0x5 0x5 0xa 0x2 0x0 0x3 0xb 0x70000 0x3 0x0 0x0 0x0 0x0 0x2 0x12 0x16 0x18 0x1208 0x0 0x482 0x2 0xd 0x1 0x0 0x97 0x15 0xa3 0x200 0x4 0x5 0x4 0x15 0x0 0x6 0x6 0x1248 0x0 0x0 0x0 0x1049b098 0xe00e00b1 0x8000 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x3c000 0x3c000 0x0 0x3c000 0x3c000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x4 0x4 0x4 0x4 0x6 0x6 0x6 0x6 0x4 0x4 0x4 0x4 0x6 0x6 0x6 0x6 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0x100002a0 0x0 0x111111 0x121113d 0x0 0x0 0x77ffc085 0x303 0x81f1f108 0x7070004 0x0 0x16eeeee 0x51451420 0x514514 0x514514 0x51451400 0x606003f 0x0 0x0 0x20000 0x100 0x127000e 0x127000e 0x0 0x3 0x40a0 0x800024a9 0xe 0x9 0x80000040 0x3 0x4 0xe 0x9 0xb 0x1 0x3 0xb 0x2 0x2 0x5 0x7 0x7050202 0x130b0e 0x73a91b0f 0x70000f03 0x1f0000>; | |
| nvidia,emc-burst-up-down-regs = <0xf 0x120 0xaa0038 0xaa0038 0xaa003c 0xaa0090 0xaa0041 0xaa0090 0xaa0041 0x270049 0xaa0080 0xaa0004 0xaa0004 0x8001d 0xaa 0xaa0004 0xaa0022 0xaa0018 0xaa0024 0xaa0024 0xaa 0x36 0xaa00aa 0x36 0xaa00aa 0xd400ff 0x510029 0xaa00aa 0xaa00aa 0xaa0065 0xaa0025>; | |
| nvidia,emc-zcal-cnt-long = <0x42>; | |
| nvidia,emc-acal-interval = <0x1fffff>; | |
| nvidia,emc-ctt-term_ctrl = <0x802>; | |
| nvidia,emc-cfg = <0x73300000>; | |
| nvidia,emc-cfg-2 = <0x89d>; | |
| nvidia,emc-sel-dpd-ctrl = <0x40008>; | |
| nvidia,emc-cfg-dig-dll = <0xe00e0069>; | |
| nvidia,emc-bgbias-ctl0 = <0x0>; | |
| nvidia,emc-auto-cal-config2 = <0x0>; | |
| nvidia,emc-auto-cal-config3 = <0x0>; | |
| nvidia,emc-auto-cal-config = <0xa1430000>; | |
| nvidia,emc-mode-0 = <0x80000b61>; | |
| nvidia,emc-mode-1 = <0x80100002>; | |
| nvidia,emc-mode-2 = <0x80200010>; | |
| nvidia,emc-mode-4 = <0x0>; | |
| nvidia,emc-clock-latency-change = <0x5a0>; | |
| }; | |
| emc-table@792000 { | |
| compatible = "nvidia,tegra12-emc-table"; | |
| nvidia,revision = <0x19>; | |
| nvidia,dvfs-version = "02_792000_NoCfgVersion_V5.0.18_V1.1"; | |
| clock-frequency = <0xc15c0>; | |
| nvidia,emc-min-mv = <0x3d4>; | |
| nvidia,gk20a-min-mv = <0x3d4>; | |
| nvidia,source = "pllm_ud"; | |
| nvidia,src-sel-reg = <0x80000000>; | |
| nvidia,burst-regs-num = <0xa5>; | |
| nvidia,burst-up-down-regs-num = <0x1f>; | |
| nvidia,emc-registers = <0x24 0xcd 0x0 0x19 0xa 0x8 0xd 0x4 0x13 0xa 0xa 0x3 0x2 0x0 0x6 0x6 0xb 0x2 0x0 0x2 0xd 0x80000 0x4 0x0 0x0 0x0 0x0 0x1 0x14 0x18 0x1a 0x17e2 0x0 0x5f8 0x3 0x11 0x1 0x0 0xc7 0x18 0xd7 0x200 0x5 0x6 0x5 0x1d 0x0 0x8 0x8 0x1822 0x0 0x0 0x0 0x1049b098 0xe00700b1 0x8000 0x7 0x7 0x7 0x7 0x7 0x7 0x7 0x7 0x7 0x7 0x7 0x7 0x7 0x7 0x7 0x7 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x28000 0x28000 0x0 0x28000 0x28000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x7 0x7 0x7 0x7 0xa 0xa 0xa 0xa 0x7 0x7 0x7 0x7 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x100002a0 0x0 0x111111 0x120113d 0x0 0x0 0x77ffc085 0x606 0x81f1f108 0x7070004 0x0 0x16eeeee 0x61861820 0x555555 0x555555 0x61861800 0x606003f 0x0 0x0 0x20000 0x100 0xf7000e 0xf7000e 0x0 0x4 0x4080 0x80003012 0xf 0xe00000b 0x80000040 0x4 0x5 0x13 0xc 0xf 0x2 0x3 0xc 0x2 0x2 0x6 0x8 0x8060202 0x170e13 0x736c2414 0x70000f02 0x1f0000>; | |
| nvidia,emc-burst-up-down-regs = <0x13 0x17c 0x810038 0x810038 0x81003c 0x810090 0x810041 0x810090 0x810041 0x270049 0x810080 0x810004 0x810004 0x80016 0x81 0x810004 0x810019 0x810018 0x810024 0x81001c 0x81 0x36 0x810081 0x36 0x810081 0xd400ff 0x510029 0x810081 0x810081 0x810065 0x81001c>; | |
| nvidia,emc-zcal-cnt-long = <0x42>; | |
| nvidia,emc-acal-interval = <0x1fffff>; | |
| nvidia,emc-ctt-term_ctrl = <0x802>; | |
| nvidia,emc-cfg = <0x73300000>; | |
| nvidia,emc-cfg-2 = <0x89d>; | |
| nvidia,emc-sel-dpd-ctrl = <0x40000>; | |
| nvidia,emc-cfg-dig-dll = <0xe0070069>; | |
| nvidia,emc-bgbias-ctl0 = <0x0>; | |
| nvidia,emc-auto-cal-config2 = <0x0>; | |
| nvidia,emc-auto-cal-config3 = <0x0>; | |
| nvidia,emc-auto-cal-config = <0xa1430000>; | |
| nvidia,emc-mode-0 = <0x80000d71>; | |
| nvidia,emc-mode-1 = <0x80100002>; | |
| nvidia,emc-mode-2 = <0x80200018>; | |
| nvidia,emc-mode-4 = <0x0>; | |
| nvidia,emc-clock-latency-change = <0x4b0>; | |
| }; | |
| emc-table@924000 { | |
| compatible = "nvidia,tegra12-emc-table"; | |
| nvidia,revision = <0x19>; | |
| nvidia,dvfs-version = "02_924000_NoCfgVersion_V5.0.18_V1.1"; | |
| clock-frequency = <0xe1960>; | |
| nvidia,emc-min-mv = <0x3f2>; | |
| nvidia,gk20a-min-mv = <0x3f2>; | |
| nvidia,source = "pllm_ud"; | |
| nvidia,src-sel-reg = <0x80000000>; | |
| nvidia,burst-regs-num = <0xa5>; | |
| nvidia,burst-up-down-regs-num = <0x1f>; | |
| nvidia,emc-registers = <0x2b 0xf0 0x0 0x1e 0xb 0x9 0xf 0x5 0x16 0xb 0xb 0x4 0x2 0x0 0x7 0x7 0xd 0x2 0x0 0x2 0xf 0xa0000 0x4 0x0 0x0 0x0 0x0 0x1 0x16 0x1a 0x1c 0x1be7 0x0 0x6f9 0x4 0x15 0x1 0x0 0xe7 0x1b 0xfb 0x200 0x6 0x7 0x6 0x22 0x0 0xa 0xa 0x1c28 0x0 0x0 0x0 0x1049b898 0xe00400b1 0x8000 0x7fc008 0x7fc008 0x7fc008 0x7fc008 0x7fc008 0x7fc008 0x7fc008 0x7fc008 0x7fc008 0x7fc008 0x7fc008 0x7fc008 0x7fc008 0x7fc008 0x7fc008 0x7fc008 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x1c000 0x1c000 0x0 0x1c000 0x1c000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x6 0x6 0x6 0x6 0x6 0x6 0x6 0x6 0x6 0x6 0x6 0x6 0x6 0x6 0x6 0x6 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x100002a0 0x0 0x111111 0x120113d 0x0 0x0 0x77ffc085 0x202 0x81f1f108 0x7070004 0x0 0x16eeeee 0x5d75d720 0x555555 0x555555 0x5d75d700 0x606003f 0x0 0x0 0x20000 0x128 0xcd000e 0xcd000e 0x0 0x4 0x4080 0x800037ea 0x11 0xe00000d 0x80000040 0x5 0x6 0x16 0xe 0x11 0x2 0x4 0xe 0x2 0x2 0x6 0x9 0x9060202 0x1a1016 0x734e2a17 0x70000f02 0x1f0000>; | |
| nvidia,emc-burst-up-down-regs = <0x17 0x1bb 0x6e0038 0x6e0038 0x6e003c 0x6e0090 0x6e0041 0x6e0090 0x6e0041 0x270049 0x6e0080 0x6e0004 0x6e0004 0x80016 0x6e 0x6e0004 0x6e0019 0x6e0018 0x6e0024 0x6e001b 0x6e 0x36 0x6e006e 0x36 0x6e006e 0xd400ff 0x510029 0x6e006e 0x6e006e 0x6e0065 0x6e001c>; | |
| nvidia,emc-zcal-cnt-long = <0x4c>; | |
| nvidia,emc-acal-interval = <0x1fffff>; | |
| nvidia,emc-ctt-term_ctrl = <0x802>; | |
| nvidia,emc-cfg = <0x73300000>; | |
| nvidia,emc-cfg-2 = <0x89d>; | |
| nvidia,emc-sel-dpd-ctrl = <0x40000>; | |
| nvidia,emc-cfg-dig-dll = <0xe0040069>; | |
| nvidia,emc-bgbias-ctl0 = <0x0>; | |
| nvidia,emc-auto-cal-config2 = <0x0>; | |
| nvidia,emc-auto-cal-config3 = <0x0>; | |
| nvidia,emc-auto-cal-config = <0xa1430000>; | |
| nvidia,emc-mode-0 = <0x80000f15>; | |
| nvidia,emc-mode-1 = <0x80100002>; | |
| nvidia,emc-mode-2 = <0x80200020>; | |
| nvidia,emc-mode-4 = <0x0>; | |
| nvidia,emc-clock-latency-change = <0x49c>; | |
| }; | |
| }; | |
| sata@0,70020000 { | |
| compatible = "nvidia,tegra124-ahci-sata"; | |
| reg = <0x0 0x70021000 0x0 0x1000 0x0 0x70027000 0x0 0x2000>; | |
| interrupts = <0x0 0x17 0x4>; | |
| clocks = <0x2 0x7c 0x2 0x7b 0x2 0x10d 0x2 0xe7>; | |
| clock-names = "sata", "sata-oob", "cml1", "pll_e"; | |
| resets = <0x2 0x7c 0x2 0x7b 0x2 0x81>; | |
| reset-names = "sata", "sata-oob", "sata-cold"; | |
| phys = <0x3 0x1>; | |
| phy-names = "sata-phy"; | |
| status = "disabled"; | |
| iommus = <0x5 0xf>; | |
| }; | |
| hda@0,70030000 { | |
| compatible = "nvidia,tegra30-hda"; | |
| reg = <0x0 0x70030000 0x0 0x10000>; | |
| interrupts = <0x0 0x51 0x4>; | |
| clocks = <0x2 0x7d 0x2 0x80 0x2 0x6f>; | |
| clock-names = "hda", "hda2hdmi", "hda2codec_2x"; | |
| resets = <0x2 0x7d 0x2 0x80 0x2 0x6f>; | |
| reset-names = "hda", "hda2hdmi", "hda2codec_2x"; | |
| status = "okay"; | |
| power-domains = <0x6>; | |
| }; | |
| padctl@0,7009f000 { | |
| compatible = "nvidia,tegra124-xusb-padctl"; | |
| reg = <0x0 0x7009f000 0x0 0x1000>; | |
| resets = <0x2 0x8e>; | |
| reset-names = "padctl"; | |
| #phy-cells = <0x1>; | |
| linux,phandle = <0x3>; | |
| phandle = <0x3>; | |
| }; | |
| sdhci@0,700b0000 { | |
| compatible = "nvidia,tegra124-sdhci"; | |
| reg = <0x0 0x700b0000 0x0 0x200>; | |
| interrupts = <0x0 0xe 0x4>; | |
| clocks = <0x2 0xe>; | |
| resets = <0x2 0xe>; | |
| reset-names = "sdhci"; | |
| status = "okay"; | |
| power-domains = <0x6>; | |
| iommus = <0xe 0x19>; | |
| }; | |
| sdhci@0,700b0200 { | |
| compatible = "nvidia,tegra124-sdhci"; | |
| reg = <0x0 0x700b0200 0x0 0x200>; | |
| interrupts = <0x0 0xf 0x4>; | |
| clocks = <0x2 0x9>; | |
| resets = <0x2 0x9>; | |
| reset-names = "sdhci"; | |
| status = "okay"; | |
| power-domains = <0x6>; | |
| iommus = <0xe 0x1a>; | |
| }; | |
| sdhci@0,700b0400 { | |
| compatible = "nvidia,tegra124-sdhci"; | |
| reg = <0x0 0x700b0400 0x0 0x200>; | |
| interrupts = <0x0 0x13 0x4>; | |
| clocks = <0x2 0x45>; | |
| resets = <0x2 0x45>; | |
| reset-names = "sdhci"; | |
| status = "okay"; | |
| power-domains = <0x6>; | |
| iommus = <0xe 0x1b>; | |
| }; | |
| sdhci@0,700b0600 { | |
| compatible = "nvidia,tegra124-sdhci"; | |
| reg = <0x0 0x700b0600 0x0 0x200>; | |
| interrupts = <0x0 0x1f 0x4>; | |
| clocks = <0x2 0xf>; | |
| resets = <0x2 0xf>; | |
| reset-names = "sdhci"; | |
| status = "okay"; | |
| power-domains = <0x6>; | |
| iommus = <0xe 0x1c>; | |
| }; | |
| soctherm@0x700E2000 { | |
| compatible = "nvidia,tegra-soctherm"; | |
| reg = <0x0 0x700e2000 0x0 0x600 0x0 0x60006000 0x0 0x400 0x0 0x70040000 0x0 0x200>; | |
| interrupts = <0x0 0x30 0x4 0x0 0x33 0x4>; | |
| clocks = <0x2 0x64 0x2 0x4e>; | |
| clock-names = "tsensor", "soctherm"; | |
| resets = <0x2 0x4e>; | |
| reset-names = "soctherm"; | |
| #thermal-sensor-cells = <0x1>; | |
| status = "okay"; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| soctherm-clock-frequency = <0x30a32c0>; | |
| tsensor-clock-frequency = <0x61a80>; | |
| sensor-params-tall = <0x3fac>; | |
| sensor-params-tiddq = <0x1>; | |
| sensor-params-ten-count = <0x1>; | |
| sensor-params-tsample = <0x78>; | |
| sensor-params-pdiv = <0x8>; | |
| sensor-params-tsamp-ate = <0x1e0>; | |
| sensor-params-pdiv-ate = <0x8>; | |
| linux,phandle = <0x2a>; | |
| phandle = <0x2a>; | |
| fuse_war@fuse_rev_new { | |
| device_type = "fuse_war"; | |
| match_fuse_rev = <0x0>; | |
| cpu0 = <0x115328 0xffa05fec>; | |
| cpu1 = <0x111fac 0xffa903a4>; | |
| cpu2 = <0x113258 0xff98b9b8>; | |
| cpu3 = <0x10f374 0xffa0e840>; | |
| mem0 = <0x111ffc 0xffa56af0>; | |
| mem1 = <0x117b64 0xff934988>; | |
| gpu = <0x111764 0xffa4708c>; | |
| pllx = <0x10e244 0xff9951ac>; | |
| }; | |
| fuse_war@fuse_rev_old { | |
| device_type = "fuse_war"; | |
| match_fuse_rev = <0x1>; | |
| cpu0 = <0x11858c 0xff9bb6f4>; | |
| cpu1 = <0x112ed4 0xffa794d8>; | |
| cpu2 = <0x11a2d8 0xff8e2070>; | |
| cpu3 = <0x115134 0xff981350>; | |
| mem0 = <0x10372c 0xffbbe5a0>; | |
| mem1 = <0x108d1c 0xffaa7fb8>; | |
| gpu = <0x108b8c 0xffb1ffa4>; | |
| pllx = <0x114fa4 0xff8eebf4>; | |
| }; | |
| therm_cpu { | |
| device_type = "thermctl"; | |
| thermal-sensor-id = <0x0>; | |
| hotspot-offset = <0x2710>; | |
| }; | |
| therm_gpu { | |
| device_type = "thermctl"; | |
| thermal-sensor-id = <0x1>; | |
| hotspot-offset = <0x1388>; | |
| }; | |
| therm_mem { | |
| device_type = "thermctl"; | |
| thermal-sensor-id = <0x2>; | |
| }; | |
| therm_pll { | |
| device_type = "thermctl"; | |
| thermal-sensor-id = <0x3>; | |
| }; | |
| throttle@critical { | |
| device_type = "throttlectl"; | |
| cdev-type = "tegra-shutdown"; | |
| cooling-min-state = <0x0>; | |
| cooling-max-state = <0x3>; | |
| #cooling-cells = <0x2>; | |
| }; | |
| throttle@heavy { | |
| device_type = "throttlectl"; | |
| cdev-type = "tegra-heavy"; | |
| cooling-min-state = <0x0>; | |
| cooling-max-state = <0x3>; | |
| #cooling-cells = <0x2>; | |
| priority = <0x64>; | |
| throttle_dev = <0x1c 0x1d>; | |
| }; | |
| throttle@light { | |
| device_type = "throttlectl"; | |
| cdev-type = "tegra-light"; | |
| cooling-min-state = <0x0>; | |
| cooling-max-state = <0x3>; | |
| #cooling-cells = <0x2>; | |
| priority = <0x32>; | |
| throttle_dev = <0x1e 0x1f>; | |
| }; | |
| throttle@oc1 { | |
| device_type = "throttlectl"; | |
| cooling-min-state = <0x0>; | |
| cooling-max-state = <0x3>; | |
| #cooling-cells = <0x2>; | |
| priority = <0xa>; | |
| throttle_dev = <0x20 0x21>; | |
| }; | |
| throttle@oc2 { | |
| device_type = "throttlectl"; | |
| cooling-min-state = <0x0>; | |
| cooling-max-state = <0x3>; | |
| #cooling-cells = <0x2>; | |
| priority = <0xa>; | |
| throttle_dev = <0x20 0x21>; | |
| }; | |
| throttle@oc3 { | |
| device_type = "throttlectl"; | |
| cooling-min-state = <0x0>; | |
| cooling-max-state = <0x3>; | |
| #cooling-cells = <0x2>; | |
| priority = <0xa>; | |
| throttle_dev = <0x20 0x21>; | |
| }; | |
| throttle@oc4 { | |
| device_type = "throttlectl"; | |
| cooling-min-state = <0x0>; | |
| cooling-max-state = <0x3>; | |
| #cooling-cells = <0x2>; | |
| priority = <0xa>; | |
| throttle_dev = <0x20 0x21>; | |
| }; | |
| throttle_dev@cpu_low { | |
| device_type = "throttle_dev"; | |
| depth = <0x32>; | |
| linux,phandle = <0x1e>; | |
| phandle = <0x1e>; | |
| }; | |
| throttle_dev@cpu_medium { | |
| device_type = "throttle_dev"; | |
| depth = <0x4b>; | |
| linux,phandle = <0x20>; | |
| phandle = <0x20>; | |
| }; | |
| throttle_dev@cpu_high { | |
| device_type = "throttle_dev"; | |
| depth = <0x50>; | |
| linux,phandle = <0x1c>; | |
| phandle = <0x1c>; | |
| }; | |
| throttle_dev@gpu_low { | |
| device_type = "throttle_dev"; | |
| depth = <0x32>; | |
| linux,phandle = <0x1f>; | |
| phandle = <0x1f>; | |
| }; | |
| throttle_dev@gpu_medium { | |
| device_type = "throttle_dev"; | |
| depth = <0x4b>; | |
| linux,phandle = <0x21>; | |
| phandle = <0x21>; | |
| }; | |
| throttle_dev@gpu_high { | |
| device_type = "throttle_dev"; | |
| depth = <0x50>; | |
| linux,phandle = <0x1d>; | |
| phandle = <0x1d>; | |
| }; | |
| }; | |
| clock@0,70110000 { | |
| compatible = "nvidia,tegra124-dfll"; | |
| reg = <0x0 0x70110000 0x0 0x400>; | |
| interrupts = <0x0 0x3e 0x4>; | |
| clocks = <0x2 0x109 0x2 0x108 0x2 0x2f>; | |
| clock-names = "soc", "ref", "i2c"; | |
| resets = <0x2 0xc0>; | |
| reset-names = "dvco"; | |
| #clock-cells = <0x0>; | |
| clock-output-names = "dfllCPU_out"; | |
| nvidia,sample-rate = <0x30d4>; | |
| nvidia,droop-ctrl = <0xf00>; | |
| nvidia,force-mode = <0x1>; | |
| nvidia,cf = <0xa>; | |
| nvidia,ci = <0x0>; | |
| nvidia,cg = <0x2>; | |
| status = "okay"; | |
| out-clock-name = "dfll_cpu"; | |
| board-params = <0x15>; | |
| i2c-pmic-integration = <0x16>; | |
| linux,phandle = <0x25>; | |
| phandle = <0x25>; | |
| }; | |
| ahub@0,70300000 { | |
| compatible = "nvidia,tegra124-ahub"; | |
| reg = <0x0 0x70300000 0x0 0x200 0x0 0x70300800 0x0 0x800 0x0 0x70300200 0x0 0x200>; | |
| interrupts = <0x0 0x67 0x4>; | |
| clocks = <0x2 0x6a 0x2 0x6b>; | |
| clock-names = "d_audio", "apbif"; | |
| resets = <0x2 0x6a 0x2 0x6b 0x2 0x1e 0x2 0xb 0x2 0x12 0x2 0x65 0x2 0x66 0x2 0x6c 0x2 0x6d 0x2 0x6e 0x2 0xa 0x2 0x99 0x2 0xb9 0x2 0x9a 0x2 0xb4 0x2 0xba 0x2 0xbb 0x2 0xbc 0x2 0xbd 0x2 0xbe 0x2 0xbf>; | |
| reset-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2", "i2s3", "i2s4", "dam0", "dam1", "dam2", "spdif", "amx", "amx1", "adx", "adx1", "afc0", "afc1", "afc2", "afc3", "afc4", "afc5"; | |
| dmas = <0x12 0x1 0x12 0x1 0x12 0x2 0x12 0x2 0x12 0x3 0x12 0x3 0x12 0x4 0x12 0x4 0x12 0x6 0x12 0x6 0x12 0x7 0x12 0x7 0x12 0xc 0x12 0xc 0x12 0xd 0x12 0xd 0x12 0xe 0x12 0xe 0x12 0x1d 0x12 0x1d>; | |
| dma-names = "rx0", "tx0", "rx1", "tx1", "rx2", "tx2", "rx3", "tx3", "rx4", "tx4", "rx5", "tx5", "rx6", "tx6", "rx7", "tx7", "rx8", "tx8", "rx9", "tx9"; | |
| ranges = <0x70300000 0x0 0x70300000 0x10000>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| status = "disabled"; | |
| i2s@0,70301000 { | |
| compatible = "nvidia,tegra124-i2s"; | |
| reg = <0x70301000 0x100>; | |
| nvidia,ahub-cif-ids = <0x4 0x4>; | |
| clocks = <0x2 0x1e>; | |
| resets = <0x2 0x1e>; | |
| reset-names = "i2s"; | |
| status = "disabled"; | |
| interrupts = <0x0 0x67 0x4>; | |
| nvidia,ahub-i2s-id = <0x0>; | |
| }; | |
| i2s@0,70301100 { | |
| compatible = "nvidia,tegra124-i2s"; | |
| reg = <0x70301100 0x100>; | |
| nvidia,ahub-cif-ids = <0x5 0x5>; | |
| clocks = <0x2 0xb>; | |
| resets = <0x2 0xb>; | |
| reset-names = "i2s"; | |
| status = "disabled"; | |
| interrupts = <0x0 0x67 0x4>; | |
| nvidia,ahub-i2s-id = <0x1>; | |
| }; | |
| i2s@0,70301200 { | |
| compatible = "nvidia,tegra124-i2s"; | |
| reg = <0x70301200 0x100>; | |
| nvidia,ahub-cif-ids = <0x6 0x6>; | |
| clocks = <0x2 0x12>; | |
| resets = <0x2 0x12>; | |
| reset-names = "i2s"; | |
| status = "disabled"; | |
| interrupts = <0x0 0x67 0x4>; | |
| nvidia,ahub-i2s-id = <0x2>; | |
| }; | |
| i2s@0,70301300 { | |
| compatible = "nvidia,tegra124-i2s"; | |
| reg = <0x70301300 0x100>; | |
| nvidia,ahub-cif-ids = <0x7 0x7>; | |
| clocks = <0x2 0x65>; | |
| resets = <0x2 0x65>; | |
| reset-names = "i2s"; | |
| status = "disabled"; | |
| interrupts = <0x0 0x67 0x4>; | |
| nvidia,ahub-i2s-id = <0x3>; | |
| }; | |
| i2s@0,70301400 { | |
| compatible = "nvidia,tegra124-i2s"; | |
| reg = <0x70301400 0x100>; | |
| nvidia,ahub-cif-ids = <0x8 0x8>; | |
| clocks = <0x2 0x66>; | |
| resets = <0x2 0x66>; | |
| reset-names = "i2s"; | |
| status = "disabled"; | |
| interrupts = <0x0 0x67 0x4>; | |
| nvidia,ahub-i2s-id = <0x4>; | |
| }; | |
| amx@0,70303000 { | |
| compatible = "nvidia,tegra124-amx"; | |
| reg = <0x70303000 0x100>; | |
| status = "disabled"; | |
| }; | |
| amx@0,70303100 { | |
| compatible = "nvidia,tegra124-amx"; | |
| reg = <0x70303100 0x100>; | |
| status = "disabled"; | |
| }; | |
| adx@0,70303800 { | |
| compatible = "nvidia,tegra124-adx"; | |
| reg = <0x70303800 0x100>; | |
| status = "disabled"; | |
| }; | |
| adx@0,70303900 { | |
| compatible = "nvidia,tegra124-adx"; | |
| reg = <0x70303900 0x100>; | |
| status = "disabled"; | |
| }; | |
| spdif@0,70306000 { | |
| compatible = "nvidia,tegra124-spdif"; | |
| reg = <0x70306000 0x100>; | |
| status = "disabled"; | |
| }; | |
| dam@0,70302000 { | |
| compatible = "nvidia,tegra124-dam"; | |
| reg = <0x70302000 0x200>; | |
| nvidia,ahub-dam-id = <0x0>; | |
| status = "disabled"; | |
| }; | |
| dam@0,70302200 { | |
| compatible = "nvidia,tegra124-dam"; | |
| reg = <0x70302200 0x200>; | |
| nvidia,ahub-dam-id = <0x1>; | |
| status = "disabled"; | |
| }; | |
| dam@0,70302400 { | |
| compatible = "nvidia,tegra124-dam"; | |
| reg = <0x70302400 0x200>; | |
| nvidia,ahub-dam-id = <0x2>; | |
| status = "disabled"; | |
| }; | |
| afc@0,70307000 { | |
| compatible = "nvidia,tegra124-afc"; | |
| reg = <0x70307000 0x100>; | |
| nvidia,ahub-afc-id = <0x0>; | |
| status = "disabled"; | |
| }; | |
| afc@0,70307100 { | |
| compatible = "nvidia,tegra124-afc"; | |
| reg = <0x70307100 0x100>; | |
| nvidia,ahub-afc-id = <0x1>; | |
| status = "disabled"; | |
| }; | |
| afc@0,70307200 { | |
| compatible = "nvidia,tegra124-afc"; | |
| reg = <0x70307200 0x100>; | |
| nvidia,ahub-afc-id = <0x2>; | |
| status = "disabled"; | |
| }; | |
| afc@0,70307300 { | |
| compatible = "nvidia,tegra124-afc"; | |
| reg = <0x70307300 0x100>; | |
| nvidia,ahub-afc-id = <0x3>; | |
| status = "disabled"; | |
| }; | |
| afc@0,70307400 { | |
| compatible = "nvidia,tegra124-afc"; | |
| reg = <0x70307400 0x100>; | |
| nvidia,ahub-afc-id = <0x4>; | |
| status = "disabled"; | |
| }; | |
| afc@0,70307500 { | |
| compatible = "nvidia,tegra124-afc"; | |
| reg = <0x70307500 0x100>; | |
| nvidia,ahub-afc-id = <0x5>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| ehci@0,7d000000 { | |
| compatible = "nvidia,tegra124-ehci"; | |
| reg = <0x0 0x7d000000 0x0 0x4000>; | |
| interrupts = <0x0 0x14 0x4>; | |
| phy_type = "utmi"; | |
| clocks = <0x2 0x16>; | |
| resets = <0x2 0x16>; | |
| reset-names = "usb"; | |
| nvidia,phy = <0x22>; | |
| status = "disabled"; | |
| power-domains = <0x6>; | |
| iommus = <0x5 0xe>; | |
| nvidia,port-otg; | |
| nvidia,has-hostpc; | |
| nvidia,turn-off-vbus-on-lp0; | |
| nvidia,id-detection-type = <0x2>; | |
| nvidia,hssync-start-delay = <0x0>; | |
| nvidia,idle-wait-delay = <0x11>; | |
| nvidia,elastic-limit = <0x10>; | |
| nvidia,term-range-adj = <0x6>; | |
| nvidia,xcvr-setup = <0xf>; | |
| nvidia,xcvr-lsfslew = <0x2>; | |
| nvidia,xcvr-lsrslew = <0x2>; | |
| nvidia,xcvr-use-fuses; | |
| nvidia,vbus-oc-map = <0x4>; | |
| nvidia,xcvr-setup-offset = <0x0>; | |
| linux,phandle = <0x34>; | |
| phandle = <0x34>; | |
| }; | |
| usb-phy@0,7d000000 { | |
| compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy"; | |
| reg = <0x0 0x7d000000 0x0 0x4000 0x0 0x7d000000 0x0 0x4000>; | |
| phy_type = "utmi"; | |
| clocks = <0x2 0x16 0x2 0xde 0x2 0x16>; | |
| clock-names = "reg", "pll_u", "utmi-pads"; | |
| resets = <0x2 0x16 0x2 0x16>; | |
| reset-names = "usb", "utmi-pads"; | |
| nvidia,hssync-start-delay = <0x0>; | |
| nvidia,idle-wait-delay = <0x11>; | |
| nvidia,elastic-limit = <0x10>; | |
| nvidia,term-range-adj = <0x6>; | |
| nvidia,xcvr-setup = <0x9>; | |
| nvidia,xcvr-lsfslew = <0x0>; | |
| nvidia,xcvr-lsrslew = <0x3>; | |
| nvidia,hssquelch-level = <0x2>; | |
| nvidia,hsdiscon-level = <0x5>; | |
| nvidia,xcvr-hsslew = <0xc>; | |
| nvidia,has-utmi-pad-registers; | |
| status = "enabled"; | |
| linux,phandle = <0x22>; | |
| phandle = <0x22>; | |
| }; | |
| ehci@0,7d004000 { | |
| compatible = "nvidia,tegra124-ehci"; | |
| reg = <0x0 0x7d004000 0x0 0x4000>; | |
| interrupts = <0x0 0x15 0x4>; | |
| phy_type = "utmi"; | |
| clocks = <0x2 0x3a>; | |
| resets = <0x2 0x3a>; | |
| reset-names = "usb"; | |
| nvidia,phy = <0x23>; | |
| status = "disabled"; | |
| power-domains = <0x6>; | |
| iommus = <0x5 0xe>; | |
| }; | |
| usb-phy@0,7d004000 { | |
| compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy"; | |
| reg = <0x0 0x7d004000 0x0 0x4000 0x0 0x7d000000 0x0 0x4000>; | |
| phy_type = "utmi"; | |
| clocks = <0x2 0x3a 0x2 0xde 0x2 0x16>; | |
| clock-names = "reg", "pll_u", "utmi-pads"; | |
| resets = <0x2 0x3a 0x2 0x16>; | |
| reset-names = "usb", "utmi-pads"; | |
| nvidia,hssync-start-delay = <0x0>; | |
| nvidia,idle-wait-delay = <0x11>; | |
| nvidia,elastic-limit = <0x10>; | |
| nvidia,term-range-adj = <0x6>; | |
| nvidia,xcvr-setup = <0x9>; | |
| nvidia,xcvr-lsfslew = <0x0>; | |
| nvidia,xcvr-lsrslew = <0x3>; | |
| nvidia,hssquelch-level = <0x2>; | |
| nvidia,hsdiscon-level = <0x5>; | |
| nvidia,xcvr-hsslew = <0xc>; | |
| status = "disabled"; | |
| linux,phandle = <0x23>; | |
| phandle = <0x23>; | |
| }; | |
| ehci@0,7d008000 { | |
| compatible = "nvidia,tegra124-ehci"; | |
| reg = <0x0 0x7d008000 0x0 0x4000>; | |
| interrupts = <0x0 0x61 0x4>; | |
| phy_type = "utmi"; | |
| clocks = <0x2 0x3b>; | |
| resets = <0x2 0x3b>; | |
| reset-names = "usb"; | |
| nvidia,phy = <0x24>; | |
| status = "disabled"; | |
| power-domains = <0x6>; | |
| iommus = <0x5 0xe>; | |
| }; | |
| usb-phy@0,7d008000 { | |
| compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy"; | |
| reg = <0x0 0x7d008000 0x0 0x4000 0x0 0x7d000000 0x0 0x4000>; | |
| phy_type = "utmi"; | |
| clocks = <0x2 0x3b 0x2 0xde 0x2 0x16>; | |
| clock-names = "reg", "pll_u", "utmi-pads"; | |
| resets = <0x2 0x3b 0x2 0x16>; | |
| reset-names = "usb", "utmi-pads"; | |
| nvidia,hssync-start-delay = <0x0>; | |
| nvidia,idle-wait-delay = <0x11>; | |
| nvidia,elastic-limit = <0x10>; | |
| nvidia,term-range-adj = <0x6>; | |
| nvidia,xcvr-setup = <0x9>; | |
| nvidia,xcvr-lsfslew = <0x0>; | |
| nvidia,xcvr-lsrslew = <0x3>; | |
| nvidia,hssquelch-level = <0x2>; | |
| nvidia,hsdiscon-level = <0x5>; | |
| nvidia,xcvr-hsslew = <0xc>; | |
| status = "disabled"; | |
| linux,phandle = <0x24>; | |
| phandle = <0x24>; | |
| }; | |
| cpus { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| cpu@0 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a15"; | |
| reg = <0x0>; | |
| clocks = <0x2 0x106 0x2 0x107 0x2 0xe3 0x2 0xd3 0x25>; | |
| clock-names = "cpu_g", "cpu_lp", "pll_x", "pll_p", "dfll"; | |
| clock-latency = <0x493e0>; | |
| linux,phandle = <0x26>; | |
| phandle = <0x26>; | |
| }; | |
| cpu@1 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a15"; | |
| reg = <0x1>; | |
| linux,phandle = <0x27>; | |
| phandle = <0x27>; | |
| }; | |
| cpu@2 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a15"; | |
| reg = <0x2>; | |
| linux,phandle = <0x28>; | |
| phandle = <0x28>; | |
| }; | |
| cpu@3 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a15"; | |
| reg = <0x3>; | |
| linux,phandle = <0x29>; | |
| phandle = <0x29>; | |
| }; | |
| }; | |
| pmu { | |
| compatible = "arm,cortex-a15-pmu"; | |
| interrupts = <0x0 0x90 0x4 0x0 0x91 0x4 0x0 0x92 0x4 0x0 0x93 0x4>; | |
| interrupt-affinity = <0x26 0x27 0x28 0x29>; | |
| }; | |
| thermal-zones { | |
| cpu { | |
| polling-delay-passive = <0x3e8>; | |
| polling-delay = <0x3e8>; | |
| thermal-sensors = <0x2a 0x0>; | |
| }; | |
| mem { | |
| polling-delay-passive = <0x3e8>; | |
| polling-delay = <0x3e8>; | |
| thermal-sensors = <0x2a 0x1>; | |
| }; | |
| gpu { | |
| polling-delay-passive = <0x3e8>; | |
| polling-delay = <0x3e8>; | |
| thermal-sensors = <0x2a 0x2>; | |
| }; | |
| pllx { | |
| polling-delay-passive = <0x3e8>; | |
| polling-delay = <0x3e8>; | |
| thermal-sensors = <0x2a 0x3>; | |
| }; | |
| PMIC-Die { | |
| status = "okay"; | |
| }; | |
| Battery { | |
| thermal-sensors = <0x2b>; | |
| dt-override-status-odm-data = <0x400000 0x400000>; | |
| }; | |
| }; | |
| timer { | |
| compatible = "arm,armv7-timer"; | |
| interrupts = <0x1 0xd 0xf04 0x1 0xe 0xf04>; | |
| interrupt-parent = <0x1>; | |
| status = "okay"; | |
| }; | |
| reserved-memory { | |
| #address-cells = <0x2>; | |
| #size-cells = <0x2>; | |
| ranges; | |
| iram-carveout { | |
| compatible = "nvidia,iram-carveout"; | |
| reg = <0x0 0x40001000 0x0 0x3f000>; | |
| no-map; | |
| linux,phandle = <0x30>; | |
| phandle = <0x30>; | |
| }; | |
| }; | |
| mc-clk-pd { | |
| compatible = "nvidia,tegra124-mc-clk-pd"; | |
| #power-domain-cells = <0x0>; | |
| linux,phandle = <0x6>; | |
| phandle = <0x6>; | |
| }; | |
| nvavp-pd { | |
| compatible = "nvidia,tegra124-nvavp-pd"; | |
| #power-domain-cells = <0x0>; | |
| power-domains = <0x6>; | |
| linux,phandle = <0xd>; | |
| phandle = <0xd>; | |
| }; | |
| host1x-pd { | |
| compatible = "nvidia,tegra124-host1x-pd"; | |
| is_off; | |
| host1x; | |
| #power-domain-cells = <0x0>; | |
| power-domains = <0x6>; | |
| linux,phandle = <0x4>; | |
| phandle = <0x4>; | |
| }; | |
| tsec-pd { | |
| compatible = "nvidia,tegra124-tsec-pd"; | |
| is_off; | |
| #power-domain-cells = <0x0>; | |
| power-domains = <0x4>; | |
| linux,phandle = <0xc>; | |
| phandle = <0xc>; | |
| }; | |
| vic03-pd { | |
| compatible = "nvidia,tegra124-vic03-pd"; | |
| is_off; | |
| #power-domain-cells = <0x0>; | |
| power-domains = <0x4>; | |
| partition-id = <0x17>; | |
| linux,phandle = <0xa>; | |
| phandle = <0xa>; | |
| }; | |
| msenc-pd { | |
| compatible = "nvidia,tegra124-msenc-pd"; | |
| is_off; | |
| #power-domain-cells = <0x0>; | |
| power-domains = <0x4>; | |
| partition-id = <0x6>; | |
| linux,phandle = <0xb>; | |
| phandle = <0xb>; | |
| }; | |
| gpu-pd { | |
| compatible = "nvidia,tegra124-gpu-pd"; | |
| is_off; | |
| #power-domain-cells = <0x0>; | |
| power-domains = <0x4>; | |
| partition-id = <0x1>; | |
| linux,phandle = <0x32>; | |
| phandle = <0x32>; | |
| }; | |
| ve-pd { | |
| compatible = "nvidia,tegra124-ve-pd"; | |
| is_off; | |
| #power-domain-cells = <0x0>; | |
| power-domains = <0x4>; | |
| partition-id = <0x2>; | |
| linux,phandle = <0x9>; | |
| phandle = <0x9>; | |
| }; | |
| vde-pd { | |
| compatible = "nvidia,tegra124-vde-pd"; | |
| #power-domain-cells = <0x0>; | |
| partition-id = <0x4>; | |
| }; | |
| pcie-pd { | |
| compatible = "nvidia, tegra124-pcie-pd"; | |
| #power-domain-cells = <0x0>; | |
| partition-id = <0x3>; | |
| }; | |
| sata-pd { | |
| compatible = "nvidia, tegra124-sata-pd"; | |
| #power-domain-cells = <0x0>; | |
| partition-id = <0x8>; | |
| }; | |
| sor-pd { | |
| compatible = "nvidia, tegra124-sor-pd"; | |
| #power-domain-cells = <0x0>; | |
| partition-id = <0x11>; | |
| }; | |
| disa-pd { | |
| compatible = "nvidia, tegra124-disa-pd"; | |
| #power-domain-cells = <0x0>; | |
| partition-id = <0x12>; | |
| }; | |
| disb-pd { | |
| compatible = "nvidia, tegra124-disb-pd"; | |
| #power-domain-cells = <0x0>; | |
| partition-id = <0x13>; | |
| }; | |
| xusba-pd { | |
| compatible = "nvidia, tegra124-xusba-pd"; | |
| #power-domain-cells = <0x0>; | |
| partition-id = <0x14>; | |
| }; | |
| xusbb-pd { | |
| compatible = "nvidia, tegra124-xusbb-pd"; | |
| #power-domain-cells = <0x0>; | |
| partition-id = <0x15>; | |
| }; | |
| xusbc-pd { | |
| compatible = "nvidia, tegra124-xusbc-pd"; | |
| #power-domain-cells = <0x0>; | |
| partition-id = <0x16>; | |
| }; | |
| se@0,70012000 { | |
| compatible = "nvidia,tegra124-se"; | |
| power-domains = <0x6>; | |
| reg = <0x0 0x70012000 0x0 0x2000 0x0 0x7000e400 0x0 0x400>; | |
| interrupts = <0x0 0x3a 0x4>; | |
| status = "okay"; | |
| }; | |
| iommu { | |
| compatible = "nvidia,tegra124-smmu"; | |
| reg = <0x0 0x70019000 0x0 0x1000 0x0 0x6000c000 0x0 0x1000>; | |
| status = "okay"; | |
| #asids = <0x80>; | |
| dma-window = <0x0 0x80000000 0x0 0x7ff00000>; | |
| #iommu-cells = <0x1>; | |
| swgid-mask = <0x1 0xfffecdcf>; | |
| #num-translation-enable = <0x4>; | |
| #num-asid-security = <0x8>; | |
| domains = <0x2c 0x4000 0x0 0x2c 0x1000000 0x0 0x2d 0x80000000 0x0 0x2e 0x404 0x0 0x2e 0x8 0x0 0x2f 0x1 0x0 0x2f 0x2000000 0x0 0x2f 0x4000000 0x0 0x2f 0x8000000 0x0 0x2f 0x10000000 0x0 0x2f 0xffffffff 0xffffffff>; | |
| linux,phandle = <0x5>; | |
| phandle = <0x5>; | |
| address-space-prop { | |
| common { | |
| iova-start = <0x0 0x80000000>; | |
| iova-size = <0x0 0x7ff00000>; | |
| num-pf-page = <0x0>; | |
| gap-page = <0x1>; | |
| linux,phandle = <0x2f>; | |
| phandle = <0x2f>; | |
| }; | |
| ppcs { | |
| iova-start = <0x0 0x80000000>; | |
| iova-size = <0x0 0x7ff00000>; | |
| num-pf-page = <0x1>; | |
| gap-page = <0x1>; | |
| linux,phandle = <0x2c>; | |
| phandle = <0x2c>; | |
| }; | |
| dc { | |
| iova-start = <0x0 0x10000>; | |
| iova-size = <0x0 0xfffeffff>; | |
| num-pf-page = <0x0>; | |
| gap-page = <0x0>; | |
| linux,phandle = <0x2e>; | |
| phandle = <0x2e>; | |
| }; | |
| gpu { | |
| iova-start = <0x0 0x100000>; | |
| iova-size = <0x0 0xffefffff>; | |
| alignment = <0x20000>; | |
| num-pf-page = <0x0>; | |
| gap-page = <0x0>; | |
| linux,phandle = <0x2d>; | |
| phandle = <0x2d>; | |
| }; | |
| }; | |
| }; | |
| tegra-carveouts { | |
| compatible = "nvidia,carveouts"; | |
| iommus = <0x5 0x6 0x5 0x1>; | |
| memory-region = <0x30>; | |
| status = "okay"; | |
| }; | |
| efuse@0,7000f800 { | |
| compatible = "nvidia,tegra124-efuse"; | |
| reg = <0x0 0x7000f800 0x0 0x400>; | |
| status = "okay"; | |
| }; | |
| clocks { | |
| compatible = "simple-bus"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| status = "okay"; | |
| clock@0 { | |
| compatible = "fixed-clock"; | |
| reg = <0x0>; | |
| #clock-cells = <0x0>; | |
| clock-frequency = <0x8000>; | |
| linux,phandle = <0x1b>; | |
| phandle = <0x1b>; | |
| }; | |
| }; | |
| rtc { | |
| compatible = "nvidia,tegra-rtc"; | |
| reg = <0x0 0x7000e000 0x0 0x100>; | |
| interrupts = <0x0 0x2 0x4>; | |
| clocks = <0x2 0x4>; | |
| status = "okay"; | |
| }; | |
| gk20a { | |
| compatible = "nvidia,tegra124-gk20a", "nvidia,gk20a"; | |
| nvidia,host1x = <0x31>; | |
| power-domains = <0x32>; | |
| reg = <0x0 0x57000000 0x0 0x1000000 0x0 0x58000000 0x0 0x1000000 0x0 0x538f0000 0x0 0x1000>; | |
| interrupts = <0x0 0x9d 0x4 0x0 0x9e 0x4>; | |
| interrupt-names = "stall", "nonstall"; | |
| resets = <0x2 0xb8>; | |
| reset-names = "gpu"; | |
| iommus = <0x5 0x1f>; | |
| access-vpr-phys; | |
| status = "okay"; | |
| }; | |
| xusb@0,70090000 { | |
| compatible = "nvidia,tegra124-xhci"; | |
| power-domains = <0x6>; | |
| reg = <0x0 0x70090000 0x0 0x8000 0x0 0x70098000 0x0 0x1000 0x0 0x70099000 0x0 0x1000 0x0 0x7009f000 0x0 0x1000>; | |
| interrupts = <0x0 0x27 0x4 0x0 0x28 0x4 0x0 0x31 0x4 0x0 0x61 0x4 0x0 0x15 0x4>; | |
| status = "okay"; | |
| nvidia,gpio_ss1_sata = <0x0>; | |
| nvidia,portmap = <0x101>; | |
| nvidia,ss_portmap = <0x0>; | |
| nvidia,lane_owner = <0x4>; | |
| nvidia,ulpicap = <0x0>; | |
| hvdd_usb-supply = <0x13>; | |
| avdd_pll_utmip-supply = <0x8>; | |
| vddio_hsic-supply = <0x14>; | |
| avddio_usb-supply = <0xe>; | |
| prod-settings { | |
| #prod-cells = <0x4>; | |
| prod { | |
| prod = <0x3 0xb8 0xffffffe3 0x1c>; | |
| }; | |
| prod_c_utmi0 { | |
| prod = <0x3 0xa0 0xffff003f 0xc380>; | |
| }; | |
| prod_c_utmi1 { | |
| prod = <0x3 0xa4 0xffff003f 0x380>; | |
| }; | |
| prod_c_utmi2 { | |
| prod = <0x3 0xa8 0xffff003f 0x380>; | |
| }; | |
| prod_c_ss0 { | |
| prod = <0x3 0x58 0xf 0x26f070f0 0x3 0x68 0x0 0x2008ee 0x3 0x78 0xcfffffff 0x10000000 0x3 0x90 0xfffffeff 0x100>; | |
| }; | |
| prod_c_ss1 { | |
| prod = <0x3 0x5c 0xf 0x26f070f0 0x3 0x6c 0x0 0x2008ee 0x3 0x7c 0xcfffffff 0x10000000 0x3 0x94 0xfffffeff 0x100>; | |
| }; | |
| prod_c_sata0 { | |
| prod = <0x3 0x14c 0xcfffffff 0x10000000 0x3 0x158 0xfffffeff 0x100>; | |
| }; | |
| prod_c_hsic0 { | |
| prod = <0x3 0xd0 0xffffff00 0x11 0x3 0xc0 0xffff0000 0x8a 0x3 0xc8 0xfffffffe 0x1 0x3 0xe0 0xffffffc0 0x22>; | |
| }; | |
| prod_c_hsic1 { | |
| prod = <0x3 0xd4 0xffffff00 0x11 0x3 0xc4 0xffff0000 0x8a 0x3 0xcc 0xfffffffe 0x1 0x3 0xe0 0xffffffc0 0x22>; | |
| }; | |
| }; | |
| }; | |
| mipical { | |
| compatible = "nvidia,tegra124-mipical"; | |
| reg = <0x0 0x700e3000 0x0 0x100>; | |
| status = "okay"; | |
| }; | |
| pcie-controller { | |
| compatible = "nvidia,tegra124-pcie"; | |
| power-domains = <0x6>; | |
| device_type = "pci"; | |
| reg = <0x0 0x1003000 0x0 0x800 0x0 0x1003800 0x0 0x800 0x0 0x2000000 0x0 0x10000000>; | |
| reg-names = "pads", "afi", "cs"; | |
| interrupts = <0x0 0x62 0x4 0x0 0x63 0x4>; | |
| interrupt-names = "intr", "msi"; | |
| #interrupt-cells = <0x1>; | |
| interrupt-map-mask = <0x0 0x0 0x0 0x0>; | |
| interrupt-map = <0x0 0x0 0x0 0x0 0x1 0x0 0x62 0x4>; | |
| bus-range = <0x0 0xff>; | |
| #address-cells = <0x3>; | |
| #size-cells = <0x2>; | |
| ranges = <0x82000000 0x0 0x1000000 0x0 0x1000000 0x0 0x1000 0x82000000 0x0 0x1001000 0x0 0x1001000 0x0 0x1000 0x81000000 0x0 0x0 0x0 0x12000000 0x0 0x10000 0x82000000 0x0 0x13000000 0x0 0x13000000 0x0 0xd000000 0xc2000000 0x0 0x20000000 0x0 0x20000000 0x0 0x20000000>; | |
| status = "disabled"; | |
| pci@1,0 { | |
| device_type = "pci"; | |
| assigned-addresses = <0x82000800 0x0 0x1000000 0x0 0x1000>; | |
| reg = <0x800 0x0 0x0 0x0 0x0>; | |
| status = "disabled"; | |
| #address-cells = <0x3>; | |
| #size-cells = <0x2>; | |
| ranges; | |
| nvidia,num-lanes = <0x4>; | |
| }; | |
| pci@2,0 { | |
| device_type = "pci"; | |
| assigned-addresses = <0x82001000 0x0 0x1001000 0x0 0x1000>; | |
| reg = <0x1000 0x0 0x0 0x0 0x0>; | |
| status = "disabled"; | |
| #address-cells = <0x3>; | |
| #size-cells = <0x2>; | |
| ranges; | |
| nvidia,num-lanes = <0x1>; | |
| }; | |
| prod-settings { | |
| prod_c_pad { | |
| prod = <0xc8 0x0 0x44ac44ac>; | |
| }; | |
| prod_c_rp { | |
| prod = <0xfd8 0xffff0ff 0x30000d00>; | |
| }; | |
| }; | |
| }; | |
| psci { | |
| compatible = "arm,psci-0.2"; | |
| method = "smc"; | |
| status = "okay"; | |
| }; | |
| tegra_cec { | |
| compatible = "nvidia,tegra124-cec"; | |
| reg = <0x0 0x70015000 0x0 0x1000>; | |
| interrupts = <0x0 0x3 0x4>; | |
| status = "okay"; | |
| }; | |
| ptm@0,7081C000 { | |
| compatible = "nvidia,ptm"; | |
| reg = <0x0 0x7081c000 0x0 0x1000 0x0 0x7081d000 0x0 0x1000 0x0 0x7081e000 0x0 0x1000 0x0 0x7081f000 0x0 0x1000 0x0 0x70801000 0x0 0x1000 0x0 0x70803000 0x0 0x1000 0x0 0x70804000 0x0 0x1000>; | |
| status = "okay"; | |
| }; | |
| dtv@0,7000c300 { | |
| compatible = "nvidia,tegra124-dtv"; | |
| reg = <0x0 0x7000c300 0x0 0x100>; | |
| nvidia,dma-request-selector = <0xb>; | |
| dmas = <0x12 0xb>; | |
| dma-names = "rx"; | |
| status = "okay"; | |
| }; | |
| snor { | |
| compatible = "nvidia,tegra124-nor"; | |
| reg = <0x0 0x70009000 0x0 0x1000>; | |
| interrupts = <0x0 0x60 0x4>; | |
| iommus = <0x5 0xe>; | |
| status = "disabled"; | |
| }; | |
| udc@0,7d000000 { | |
| compatible = "nvidia,tegra124-udc"; | |
| reg = <0x0 0x7d000000 0x0 0x4000>; | |
| interrupts = <0x0 0x14 0x4>; | |
| iommus = <0x5 0xe>; | |
| status = "okay"; | |
| nvidia,id-detection-type = <0x1>; | |
| nvidia,enable-pmu-vbus-detection; | |
| nvidia,enable-aca-rid-detection; | |
| extcon-cables = <0x33 0x0 0x33 0x4 0x33 0x5>; | |
| extcon-cable-names = "vbus", "aca-rb", "aca-rc"; | |
| #extcon-cells = <0x1>; | |
| }; | |
| otg@0,7d000000 { | |
| compatible = "nvidia,tegra124-otg"; | |
| power-domains = <0x6>; | |
| reg = <0x0 0x7d000000 0x0 0x4000>; | |
| interrupts = <0x0 0x14 0x4>; | |
| nvidia,hc-device = <0x34>; | |
| iommus = <0x5 0x18>; | |
| status = "okay"; | |
| nvidia,port-otg; | |
| nvidia,charging-supported; | |
| nvidia,turn-off-vbus-in-lp0; | |
| nvidia,dcp-current-limit-ma = <0xbb8>; | |
| nvidia,enable-pmu-vbus-detection; | |
| nvidia,id-detection-type = <0x1>; | |
| nvidia,enable-y-cable-detection; | |
| nvidia,enable-aca-rid-detection; | |
| extcon-cables = <0x33 0x0 0x33 0x1 0x33 0x2 0x33 0x3 0x33 0x4 0x33 0x5>; | |
| extcon-cable-names = "vbus", "id", "aca-ra", "y-cable", "aca-rb", "aca-rc"; | |
| #extcon-cells = <0x1>; | |
| }; | |
| gpu_edp { | |
| compatible = "nvidia,tegra124-gpu-edp-capping"; | |
| status = "okay"; | |
| nvidia,freq_step = <0xb71b00>; | |
| nvidia,edp_clk = "gbus"; | |
| nvidia,edp_cap_clk = "edp.gbus"; | |
| nvidia,tegra-ppm-cdyn = <0xa271f0>; | |
| nvidia,tegra-ppm-min_leakage = <0x1e>; | |
| nvidia,tegra-ppm-leakage_coeffs = <0xf38e0388 0x23ff61a 0xff6cc51b 0xb129c 0x29fd00d3 0xf8063e69 0x20df887 0xffda6672 0xd149a96f 0x8bc49d1 0xfdb2a8d0 0x28803d 0x117264cc 0xfcf20909 0xd562f3 0xfff1bbcc 0x6dc372f 0xfc16fbca 0xabb0b8 0xfff33506 0xe8788877 0xfae8366 0xfd1436fa 0x32c13d 0x1a52f3f4 0xed531c6e 0x3ac205e 0xffc43c0e 0xf6393ace 0x712374d 0xfe8b971b 0x172805 0xfdaf13e0 0xbad354 0xffe20781 0x2c3f0 0x88a0d36 0xfbc2efd9 0xd56790 0xfff1fe45 0xf5c7c7ee 0x5e53002 0xfebb9529 0x128e9f 0x40503e0 0xfd95b684 0x8d606b 0xfff89a2e 0x1b6764 0xfffaba41 0x1443c 0xffffb1d9 0xff7d8d0f 0x60a333 0xffe96b79 0x1c2f1 0xba0b22 0xff59f91b 0x282a14 0xfffd8984 0xffaeb135 0x4b969c 0xffed75c2 0xfc2c>; | |
| }; | |
| tlk { | |
| compatible = "nvidia,trusted-little-kernel"; | |
| logger = "enabled"; | |
| storage = "enabled"; | |
| status = "okay"; | |
| }; | |
| arm-pmu { | |
| compatible = "arm,cortex-a15-pmu"; | |
| interrupts = <0x0 0x90 0x4 0x0 0x91 0x4 0x0 0x92 0x4 0x0 0x93 0x4>; | |
| status = "okay"; | |
| }; | |
| dfll@0,70110000 { | |
| compatible = "nvidia,tegra124-dfll"; | |
| reg = <0x0 0x70110000 0x0 0x400>; | |
| out-clock-name = "dfll_cpu"; | |
| status = "disabled"; | |
| }; | |
| power-detect { | |
| compatible = "nvidia,tegra124-pwr-detect"; | |
| status = "okay"; | |
| }; | |
| watchdog@0,60005100 { | |
| compatible = "nvidia,tegra-wdt"; | |
| reg = <0x0 0x60005100 0x0 0x20 0x0 0x60005070 0x0 0x8>; | |
| interrupts = <0x0 0x7b 0x4>; | |
| nvidia,expiry-count = <0x4>; | |
| status = "okay"; | |
| nvidia,enable-on-init; | |
| nvidia,heartbeat-init = <0x78>; | |
| }; | |
| fiq_debugger { | |
| compatible = "nvidia,fiq-debugger"; | |
| use-console-port; | |
| interrupts = <0x0 0x7b 0x4>; | |
| }; | |
| cpu_edp { | |
| compatible = "nvidia,tegra124-cpu-edp-capping"; | |
| status = "okay"; | |
| nvidia,freq_step = <0xc28cb0>; | |
| nvidia,edp_clk = "cpu_g"; | |
| nvidia,tegra-ppm-cdyn = <0xe7ef0 0x1558d8 0x210cf0 0x2e66e8>; | |
| nvidia,tegra-ppm-leakage_weights = <0x1c2 0x29e 0x366 0x3e8>; | |
| nvidia,tegra-ppm-min_leakage = <0x1e>; | |
| nvidia,tegra-ppm-leakage_coeffs = <0xed8bbc08 0xbc9fad6 0xfd9200f2 0x18a075 0x398066ed 0xde1481e1 0x6e6afe7 0xffbfd128 0xc4bbceca 0x1f92081f 0xf9a912d4 0x34b451 0x1474f5e2 0xf66dc81f 0x1e7311d 0xfff2574b 0x24bc4ab0 0xda080aad 0x8360b68 0xff9239eb 0x9180fe3d 0x71032a53 0xe7b77405 0x13e6c7c 0x6cb9836b 0x92d3d318 0x174a6c7b 0xfed5fe76 0xdce23453 0x22805ffe 0xf8b06c44 0x5b5529 0xe5c6394b 0x1b2ba582 0xf9cb9b0b 0x5e7b1b 0x50be5496 0xacd16a2e 0x12fe73af 0xfedfcf06 0xaed67439 0x52dc002e 0xed13b91c 0x11dc54a 0x1ab212ff 0xe51874f5 0x626ba9a 0xffa3bc1c 0x362a974 0xfc6fd628 0xd2ba77 0xfff30e5e 0xf5847a5b 0xb031f25 0xfd7452ee 0x280061 0xa965cf5 0xf4e9eb03 0x2909388 0xffd7be35 0xfc820665 0x3a3ef7a 0xff2826c3 0xd3447>; | |
| }; | |
| therm_est_sensor { | |
| status = "okay"; | |
| }; | |
| bthrot_cdev { | |
| skin_balanced { | |
| status = "okay"; | |
| }; | |
| gpu_balanced { | |
| status = "okay"; | |
| }; | |
| cpu_balanced { | |
| status = "okay"; | |
| }; | |
| emergency_balanced { | |
| status = "okay"; | |
| }; | |
| }; | |
| regulators { | |
| compatible = "simple-bus"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| regulator@0 { | |
| compatible = "regulator-fixed"; | |
| reg = <0x0>; | |
| regulator-name = "vdd_ac_bat"; | |
| regulator-min-microvolt = <0x4c4b40>; | |
| regulator-max-microvolt = <0x4c4b40>; | |
| regulator-always-on; | |
| consumers { | |
| c1 { | |
| regulator-consumer-supply = "vdd_sys_bl"; | |
| }; | |
| c2 { | |
| regulator-consumer-supply = "vdd_wwan_mdm"; | |
| }; | |
| }; | |
| }; | |
| regulator@1 { | |
| compatible = "regulator-fixed-sync"; | |
| reg = <0x1>; | |
| regulator-name = "en-lcd-bl"; | |
| regulator-min-microvolt = <0x4c4b40>; | |
| regulator-max-microvolt = <0x4c4b40>; | |
| enable-active-high; | |
| gpio = <0x8 0x3a 0x0>; | |
| regulator-boot-on; | |
| consumers { | |
| c1 { | |
| regulator-consumer-supply = "vdd_lcd_bl_en"; | |
| regulator-consumer-device = "tegradc.0"; | |
| }; | |
| }; | |
| }; | |
| regulator@2 { | |
| compatible = "regulator-fixed-sync"; | |
| reg = <0x2>; | |
| regulator-name = "vddio_sd"; | |
| regulator-min-microvolt = <0x325aa0>; | |
| regulator-max-microvolt = <0x325aa0>; | |
| gpio = <0x8 0x88 0x0>; | |
| enable-active-high; | |
| vin-supply = <0x14>; | |
| regulator-boot-on; | |
| consumers { | |
| c1 { | |
| regulator-consumer-supply = "vddio_sd_slot"; | |
| regulator-consumer-device = "sdhci-tegra.2"; | |
| }; | |
| }; | |
| }; | |
| regulator@3 { | |
| compatible = "regulator-fixed-sync"; | |
| reg = <0x3>; | |
| regulator-name = "vddio_dvdd_lcd"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| gpio = <0x35 0x6 0x0>; | |
| enable-active-high; | |
| regulator-boot-on; | |
| vin-supply = <0x13>; | |
| consumers { | |
| c1 { | |
| regulator-consumer-supply = "dvdd_lcd"; | |
| regulator-consumer-device = "tegradc.0"; | |
| }; | |
| c2 { | |
| regulator-consumer-supply = "vdd_lcd_1v8_s"; | |
| }; | |
| }; | |
| }; | |
| regulator@4 { | |
| compatible = "regulator-fixed-sync"; | |
| reg = <0x4>; | |
| regulator-name = "vdd_cam_af"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| gpio = <0x35 0x4 0x0>; | |
| enable-active-high; | |
| vin-supply = <0x13>; | |
| linux,phandle = <0x3c>; | |
| phandle = <0x3c>; | |
| consumers { | |
| c1 { | |
| regulator-consumer-supply = "vif"; | |
| regulator-consumer-device = "2-0010"; | |
| }; | |
| c2 { | |
| regulator-consumer-supply = "vif"; | |
| regulator-consumer-device = "2-0036"; | |
| }; | |
| c3 { | |
| regulator-consumer-supply = "vif"; | |
| regulator-consumer-device = "2-0048"; | |
| }; | |
| c4 { | |
| regulator-consumer-supply = "vddio_cam"; | |
| regulator-consumer-device = "tegra_camera"; | |
| }; | |
| c5 { | |
| regulator-consumer-supply = "vddio_cam"; | |
| regulator-consumer-device = "vi"; | |
| }; | |
| c6 { | |
| regulator-consumer-supply = "vdd_cam_1v8_mb"; | |
| }; | |
| c7 { | |
| regulator-consumer-supply = "dovdd"; | |
| regulator-consumer-device = "2-0010"; | |
| }; | |
| c8 { | |
| regulator-consumer-supply = "vif"; | |
| regulator-consumer-device = "2-000c"; | |
| }; | |
| c9 { | |
| regulator-consumer-supply = "vdd_i2c"; | |
| regulator-consumer-device = "2-000c"; | |
| }; | |
| c10 { | |
| regulator-consumer-supply = "pwrdet_cam"; | |
| }; | |
| c11 { | |
| regulator-consumer-supply = "vi2c"; | |
| regulator-consumer-device = "2-0030"; | |
| }; | |
| }; | |
| }; | |
| regulator@5 { | |
| compatible = "regulator-fixed-sync"; | |
| reg = <0x5>; | |
| regulator-name = "vdd-hdmi-n5"; | |
| regulator-min-microvolt = <0x124f80>; | |
| regulator-max-microvolt = <0x124f80>; | |
| enable-active-high; | |
| gpio = <0x8 0x6d 0x0>; | |
| vin-supply = <0x1a>; | |
| consumers { | |
| c1 { | |
| regulator-consumer-supply = "avdd_hdmi_pll"; | |
| regulator-consumer-device = "tegradc.1"; | |
| }; | |
| }; | |
| }; | |
| regulator@6 { | |
| compatible = "regulator-fixed-sync"; | |
| reg = <0x6>; | |
| regulator-name = "vddio_hdmi_5v0"; | |
| regulator-min-microvolt = <0x4c4b40>; | |
| regulator-max-microvolt = <0x4c4b40>; | |
| gpio = <0x8 0x56 0x0>; | |
| enable-active-high; | |
| vin-supply = <0x18>; | |
| consumers { | |
| c1 { | |
| regulator-consumer-supply = "vdd_hdmi_5v0"; | |
| regulator-consumer-device = "tegradc.1"; | |
| }; | |
| }; | |
| }; | |
| regulator@7 { | |
| compatible = "regulator-fixed-sync"; | |
| reg = <0x7>; | |
| regulator-name = "vdd_ts_1v8"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| gpio = <0x8 0x51 0x0>; | |
| enable-active-high; | |
| vin-supply = <0x13>; | |
| consumers { | |
| c1 { | |
| regulator-consumer-supply = "dvdd"; | |
| regulator-consumer-device = "spi0.0"; | |
| }; | |
| }; | |
| }; | |
| regulator@8 { | |
| compatible = "regulator-fixed-sync"; | |
| reg = <0x8>; | |
| regulator-name = "avdd_ts_3v3"; | |
| regulator-min-microvolt = <0x325aa0>; | |
| regulator-max-microvolt = <0x325aa0>; | |
| gpio = <0x35 0x2 0x0>; | |
| enable-active-high; | |
| vin-supply = <0x36>; | |
| regulator-disable-parent-after-enable; | |
| consumers { | |
| c1 { | |
| regulator-consumer-supply = "avdd"; | |
| regulator-consumer-device = "spi0.0"; | |
| }; | |
| }; | |
| }; | |
| }; | |
| gpio-keys { | |
| compatible = "gpio-keys"; | |
| camera_focus { | |
| label = "Camera Focus"; | |
| gpios = <0x8 0x82 0x1>; | |
| linux,code = <0x210>; | |
| }; | |
| power { | |
| label = "Power"; | |
| gpios = <0x8 0x80 0x1>; | |
| linux,code = <0x74>; | |
| gpio-key,wakeup; | |
| }; | |
| volume_down { | |
| label = "Volume Down"; | |
| gpios = <0x8 0x87 0x1>; | |
| linux,code = <0x72>; | |
| }; | |
| volume_up { | |
| label = "Volume Up"; | |
| gpios = <0x8 0x86 0x1>; | |
| linux,code = <0x73>; | |
| }; | |
| sw_tablet_mode { | |
| label = "SW Tablet Mode"; | |
| gpios = <0x8 0xb3 0x1>; | |
| linux,code = <0x1>; | |
| linux,input-type = <0x5>; | |
| gpio-key,wakeup; | |
| debounce-interval = <0xc8>; | |
| }; | |
| sw_lid { | |
| label = "SW LID"; | |
| gpios = <0x8 0x8c 0x1>; | |
| linux,code = <0x0>; | |
| linux,input-type = <0x5>; | |
| gpio-key,wakeup; | |
| debounce-interval = <0x12c>; | |
| }; | |
| }; | |
| backlight { | |
| compatible = "pwm-backlight"; | |
| status = "okay"; | |
| panel-a-wuxga-8-0-bl { | |
| status = "disabled"; | |
| compatible = "a,wuxga-8-0-bl"; | |
| pwms = <0x37 0x1 0x9ce1>; | |
| max-brightness = <0xff>; | |
| default-brightness = <0xbf>; | |
| default-charge-brightness = <0x70>; | |
| bl-measured = <0x0 0x1 0x2 0x4 0x5 0x6 0x7 0x8 0xa 0xb 0xc 0xd 0xe 0xe 0xf 0x10 0x11 0x12 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0 0xa1 0xa2 0xa3 0xa4 0xa5 0xa6 0xa7 0xa8 0xa9 0xaa 0xab 0xac 0xad 0xae 0xaf 0xb0 0xb1 0xb2 0xb3 0xb4 0xb5 0xb6 0xb7 0xb8 0xb9 0xba 0xbb 0xbc 0xbd 0xbe 0xbf 0xc0 0xc1 0xc2 0xc3 0xc4 0xc5 0xc6 0xc7 0xc8 0xc9 0xca 0xcb 0xcc 0xcd 0xce 0xcf 0xd0 0xd1 0xd2 0xd3 0xd4 0xd5 0xd6 0xd7 0xd8 0xd9 0xda 0xdb 0xdc 0xdd 0xde 0xdf 0xe0 0xe1 0xe2 0xe3 0xe4 0xe5 0xe6 0xe7 0xe8 0xe9 0xea 0xeb 0xec 0xed 0xee 0xef 0xf0 0xf1 0xf2 0xf3 0xf4 0xf5 0xf6 0xf7 0xf8 0xf9 0xfa 0xfb 0xfd 0xfe 0xff>; | |
| bl-nonlinear = <0x0 0x1 0x1 0x2 0x2 0x3 0x3 0x4 0x4 0x5 0x5 0x6 0x7 0x7 0x8 0x8 0x9 0x9 0xa 0xa 0xb 0xb 0xc 0xc 0xd 0xe 0xe 0xf 0xf 0x10 0x10 0x11 0x11 0x12 0x12 0x13 0x14 0x14 0x15 0x15 0x16 0x16 0x17 0x17 0x18 0x18 0x19 0x19 0x1a 0x1b 0x1b 0x1c 0x1c 0x1d 0x1d 0x1e 0x1e 0x1f 0x1f 0x20 0x21 0x21 0x22 0x22 0x23 0x23 0x24 0x24 0x25 0x25 0x26 0x26 0x27 0x28 0x28 0x29 0x29 0x2a 0x2a 0x2b 0x2b 0x2c 0x2c 0x2d 0x2e 0x2e 0x2f 0x2f 0x30 0x30 0x31 0x31 0x32 0x32 0x33 0x34 0x34 0x35 0x35 0x36 0x36 0x37 0x37 0x38 0x38 0x39 0x39 0x3a 0x3b 0x3b 0x3c 0x3c 0x3d 0x3d 0x3e 0x3e 0x3f 0x3f 0x40 0x41 0x41 0x42 0x42 0x43 0x43 0x44 0x44 0x45 0x45 0x46 0x46 0x47 0x48 0x48 0x49 0x49 0x4a 0x4a 0x4b 0x4b 0x4c 0x4c 0x4d 0x4e 0x4e 0x4f 0x4f 0x50 0x50 0x51 0x51 0x52 0x52 0x53 0x53 0x54 0x55 0x55 0x56 0x56 0x57 0x57 0x58 0x58 0x59 0x59 0x5a 0x5c 0x5e 0x60 0x61 0x63 0x65 0x67 0x69 0x6b 0x6d 0x6e 0x70 0x72 0x74 0x76 0x78 0x7a 0x7b 0x7d 0x7f 0x81 0x83 0x85 0x86 0x88 0x8a 0x8c 0x8e 0x90 0x92 0x93 0x95 0x97 0x99 0x9b 0x9d 0x9f 0xa0 0xa2 0xa4 0xa6 0xa8 0xaa 0xac 0xad 0xaf 0xb1 0xb3 0xb5 0xb7 0xb9 0xba 0xbc 0xbe 0xc0 0xc2 0xc4 0xc6 0xc7 0xc9 0xcb 0xcd 0xcf 0xd1 0xd3 0xd4 0xd6 0xd8 0xda 0xdc 0xde 0xdf 0xe1 0xe3 0xe5 0xe7 0xe9 0xeb 0xec 0xee 0xf0 0xf2 0xf4 0xf6 0xf8 0xf9 0xfb 0xfd 0xff>; | |
| }; | |
| }; | |
| extcon { | |
| compatible = "simple-bus"; | |
| device_type = "external-connection"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| extcon@0 { | |
| compatible = "extcon-cable-xlate"; | |
| reg = <0x0>; | |
| extcon-name = "cable-xlate"; | |
| output-cable-names = "USB", "USB-Host", "ACA-A", "Y-Cable", "ACA-B", "ACA-C", "ACA-NV"; | |
| extcon-cables = <0x38 0x0 0x38 0x1 0x38 0x2 0x38 0x3 0x38 0x4>; | |
| extcon-cable-names = "vbus", "id", "aca-ra", "aca-rb", "aca-rc"; | |
| cable-new-states = <0x0 0x0 0x3f 0x0 0x0 0x0 0x1 0x3f 0x1 0x0 0x2 0x1 0x3f 0x0 0x0 0x0 0x2 0x3f 0x2 0x0 0x0 0x3 0x3f 0x8 0x0 0x2 0x3 0x3f 0x2 0x0 0x3 0x1 0x3f 0x0 0x0 0x3 0x2 0x3f 0x2 0x0 0x0 0x5 0x3f 0x4 0x0 0x1 0x5 0x3f 0x4 0x0 0x0 0x4 0x3f 0x4 0x0 0x0 0x11 0x3f 0x20 0x0 0x1 0x11 0x3f 0x20 0x0 0x0 0x10 0x3f 0x20 0x0 0x1 0x10 0x3f 0x20 0x0 0x0 0x9 0x3f 0x10 0x0 0x1 0x9 0x3f 0x10 0x0 0x8 0x9 0x3f 0x10 0x0 0x11 0x1 0x3f 0x1 0x0 0x0 0x8 0x3f 0x10 0x0>; | |
| #extcon-cells = <0x1>; | |
| status = "okay"; | |
| linux,phandle = <0x33>; | |
| phandle = <0x33>; | |
| }; | |
| }; | |
| psy_extcon { | |
| compatible = "power-supply-extcon"; | |
| power-supply,extcon-dev = "tegra-udc"; | |
| }; | |
| usb-devices { | |
| maxim-charger { | |
| compatible = "maxim,max14675"; | |
| maxim,max-board-vbus-voltage-uv = <0xb71b00>; | |
| }; | |
| }; | |
| framebuffer@ad012000 { | |
| compatible = "simple-framebuffer"; | |
| reg = <0x0 0xad012000 0x0 0x8e8000>; | |
| width = <0x4b0>; | |
| height = <0x780>; | |
| stride = <0x1300>; | |
| format = "a8b8g8r8"; | |
| display = <0x39>; | |
| }; | |
| sysedp_batmon_calc { | |
| status = "okay"; | |
| }; | |
| camera-pcl { | |
| profiles { | |
| ov5693@2_0010 { | |
| use_of_node = "yes"; | |
| dev_name = "ov5693"; | |
| num = <0x0>; | |
| avdd_ov5693-supply = <0x3a>; | |
| vdd_af1-supply = <0x3b>; | |
| dovdd-supply = <0x3c>; | |
| reset-gpios = <0x8 0xdd 0x0>; | |
| }; | |
| ov5693@2_0036 { | |
| use_of_node = "yes"; | |
| dev_name = "ov5693"; | |
| num = <0x1>; | |
| vana-supply = <0x3b>; | |
| vif-supply = <0x3c>; | |
| cam2-gpios = <0x8 0xde 0x0>; | |
| }; | |
| }; | |
| }; | |
| }; |
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