Explicit data graph execution ISA
16-bit sized instructions in blocks of up to 128 instructions.
64 registers unified register file.
Known special-purpose registers: pr (TEB [TeStackLimit, TeStackBase]) SP and LR.
Supported by the NT kernel and MSVC. .NET Core supported, with RyuJIT working too.
_M_E2 is the architecture define on Windows for the E2 architecture.
Linux and FreeRTOS ports done for E2 by Microsoft Research, no tangible proof accessible though, unlike the Windows port, where it's possible to know that it exists outside of screenshots and other MS resources at conferences.