gistfile1.cpp

    //NOTE - _splice(a, b) just produces "a_b" as a string
    if (compensate) {
        //Compensation column
        if (!this->useVirtualGround) {
            net << "Rcomp OutComp 0 " << rTerm << "\n";
            measures.emplace_back(SpiceNetwork::METHOD_AVG,
                    SpiceNetwork::TYPE_VOLTAGE, "OutComp");
        }
        else {
            //OutComp2 is virtual ground output for Xcomp.
            net << "Rcomp OutComp AmpComp " << rTerm << "\n";
            net << "RcompGain1 AmpComp OutComp2 " << gainVirtStage1 << "\n";
            net << "XcompGain 0 AmpComp OpPlus OpMinus OutComp2 OPAMP\n";
            measures.emplace_back(SpiceNetwork::METHOD_AVG,
                    SpiceNetwork::TYPE_VOLTAGE, "OutComp2");

            //Since diff amp noninverting terminal is not connected to feedback,
            //we use one voltage split for all opamps in stage 2.  Remember gain
            //gain = R2 (to ground) / R1 (to signal)
            net << "RcompSplit1 OutComp2 OutCompSignal " << eTermR2 << "\n";
            net << "RcompSplit2 OutCompSignal 0 " << termR2 * gainVirtStage2 << "\n";
        }
    }
    for (int o = 0, om = this->weights->size2(); o < om; o++) {
        measures.emplace_back(SpiceNetwork::METHOD_AVG,
                SpiceNetwork::TYPE_VOLTAGE, _splice("OutV", o));

        if (!this->useVirtualGround) {
            //Generate the resistor that is used to measure output voltage and
            //the op amp that makes its value readable.
            net << _splice("R", o) << " " << _splice("Out", o) << " 0 " << rTerm
                    << "\n";
            #if NOT_OP_MODEL
            //Traditional gain version
            net << _splice("E", o) << " " << _splice("OutV", o) << " 0 "
                    << _splice("Out", o) << " OutComp " << eTerm << "\n";
            #else
            //Differential amplifier: Inverting (1) is "ground", Non-inverting (2)
            //is  signal.  Inverting has resistors eTermR1 / eTermR2 between output
            //and "ground", and non-inverting has resistors eTermR1 / eTermR2
            //between true ground and "signal".
            net << _splice("Rgain11", o) << " " << _splice("OutV", o) << " "
                    << _splice("TempV1", o) << " " << eTermR1 << "\n";
            net << _splice("Rgain12", o) << " " << _splice("TempV1", o) << " "
                    << "OutComp " << eTermR2 << "\n";
            net << _splice("Rgain21", o) << " 0 " << _splice("TempV2", o) << " "
                    << eTermR1 << "\n";
            net << _splice("Rgain22", o) << " " << _splice("TempV2", o) << " "
                    << _splice("Out", o) << " " << eTermR2 << "\n";
            net << _splice("Xgain", o) << " " << _splice("TempV2", o) << " "
                    << _splice("TempV1", o) << " OpPlus OpMinus "
                    << _splice("OutV", o) << " OPAMP\n";
            #endif
        }
        else {
            net << _splice("R", o) << " " << _splice("Out", o) << " "
                    << _splice("OutIn", o) << " " << rTerm << "\n";
            net << _splice("Rgain1", o) << " " << _splice("OutIn", o) << " "
                    << _splice("OutStage1", o) << " " << gainVirtStage1 << "\n";
            net << _splice("Xstage1", o) << " 0 " << _splice("OutIn", o)
                    << " OpPlus OpMinus " << _splice("OutStage1", o)
                    << " OPAMP\n";

            //Now, differentiate OutComp2 - OutStage1 for OutV.
            net << _splice("Rstage2_21", o) << " " << _splice("OutStage1", o)
                    << " " << _splice("TempV2", o) << " " << eTermR2 << "\n";
            net << _splice("Rstage2_22", o) << " " << _splice("TempV2", o)
                    << " " << _splice("OutV", o) << " " << termR2 * gainVirtStage2 << "\n";
            net << _splice("Xstage2", o) << " OutCompSignal "
                    << _splice("TempV2", o) << " OpPlus OpMinus "
                    << _splice("OutV", o) << " OPAMP\n";
        }

        ...crossbar
        //Xcomp_i OutComp In_1 memristor
    }