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@xjdrew
Created August 20, 2018 07:31
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nanosleep resolution
#include <sys/time.h>
#include <sys/resource.h>
#include <time.h>
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#define ONE_SECOND 1000000000L
#define ONE_MS 1000000L
int count = 200;
int debug = 0;
int main (int ac, char **av) {
double diff;
struct timespec ts0, ts1, ts2;
if (ac > 1 && av[1])
count = strtol(av[1], NULL, 10);
while(count--) {
clock_gettime(CLOCK_MONOTONIC, &ts1);
ts0.tv_sec = 0;
ts0.tv_nsec = ONE_MS;
nanosleep(&ts0, NULL);
clock_gettime(CLOCK_MONOTONIC, &ts2);
diff = (double)(ts2.tv_nsec - ts1.tv_nsec)/1e9;
diff += (double)(ts2.tv_sec - ts1.tv_sec);
if (debug)
printf("(%ld.%.6ld) ", ts2.tv_sec, ts2.tv_nsec);
printf("%.6f\n", diff*1000);
}
return 0;
}
$ lscpu
Architecture: x86_64
CPU op-mode(s): 32-bit, 64-bit
Byte Order: Little Endian
CPU(s): 4
On-line CPU(s) list: 0-3
Thread(s) per core: 2
Core(s) per socket: 2
Socket(s): 1
NUMA node(s): 1
Vendor ID: GenuineIntel
CPU family: 6
Model: 85
Model name: Intel(R) Xeon(R) Platinum 8163 CPU @ 2.50GHz
Stepping: 4
CPU MHz: 2499.990
BogoMIPS: 4999.98
Hypervisor vendor: KVM
Virtualization type: full
L1d cache: 32K
L1i cache: 32K
L2 cache: 1024K
L3 cache: 33792K
NUMA node0 CPU(s): 0-3
Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ss ht syscall nx pdpe1gb rdtscp lm constant_tsc rep_good nopl pni pclmulqdq ssse3 fma cx16 pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand hypervisor lahf_lm abm 3dnowprefetch fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm mpx avx512f avx512dq rdseed adx smap avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1
$ ./nanosleep 10
1.065334
1.063151
1.061466
1.067746
1.061667
1.061636
1.062454
1.011586
1.060461
1.060884
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