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xobs/nextpnr-ice40 timing report Secret

Created July 19, 2019 09:23
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nextpnr-ice40 timing report
❯ nextpnr-ice40 --up5k --package sg48 --pcf top.pcf --json top.json --asc top.txt --pre-pack top_pre_pack.py --seed 14 --placer heap
Info: Importing module top
Info: Rule checker, verifying imported design
Info: Checksum: 0x7b55669c
Info: constrained 'clk48' to bel 'X6/Y0/io1'
Info: constrained 'spiflash4x_cs_n' to bel 'X24/Y0/io1'
Info: constrained 'spiflash4x_clk' to bel 'X24/Y0/io0'
Info: constrained 'spiflash4x_dq[0]' to bel 'X23/Y0/io0'
Info: constrained 'spiflash4x_dq[1]' to bel 'X23/Y0/io1'
Info: constrained 'spiflash4x_dq[2]' to bel 'X22/Y0/io1'
Info: constrained 'spiflash4x_dq[3]' to bel 'X21/Y0/io1'
Info: constrained 'led_rgb0' to bel 'X4/Y31/io0'
Info: constrained 'led_rgb1' to bel 'X5/Y31/io0'
Info: constrained 'led_rgb2' to bel 'X6/Y31/io0'
Info: constrained 'usb_d_p' to bel 'X13/Y31/io1'
Info: constrained 'usb_d_n' to bel 'X13/Y31/io0'
Info: constrained 'usb_pullup' to bel 'X12/Y31/io1'
Info: constrained 'usb_pulldown' to bel 'X9/Y31/io1'
Info: constrained 'touch_t1' to bel 'X7/Y0/io0'
Info: constrained 'touch_t2' to bel 'X6/Y0/io0'
Info: constrained 'touch_t3' to bel 'X5/Y0/io0'
Info: constrained 'touch_t4' to bel 'X7/Y0/io1'
Warning: net 'usb_48_clk' does not exist in design, ignoring clock constraint
Warning: net 'sys_clk' does not exist in design, ignoring clock constraint
Warning: net 'usb_12_clk' does not exist in design, ignoring clock constraint
Info: constraining clock net 'clk48_1' to 48.00 MHz
Info: constraining clock net 'clk48' to 48.00 MHz
Warning: net 'clk12_raw' does not exist in design, ignoring clock constraint
Warning: net 'usb_48_raw_clk' does not exist in design, ignoring clock constraint
Info: Packing constants..
Info: Packing IOs..
Info: spiflash4x_dq[0] feeds SB_IO SB_IO, removing $nextpnr_iobuf spiflash4x_dq[0].
Info: spiflash4x_dq[1] feeds SB_IO SB_IO_1, removing $nextpnr_iobuf spiflash4x_dq[1].
Info: spiflash4x_dq[2] feeds SB_IO SB_IO_2, removing $nextpnr_iobuf spiflash4x_dq[2].
Info: spiflash4x_dq[3] feeds SB_IO SB_IO_3, removing $nextpnr_iobuf spiflash4x_dq[3].
Info: led_rgb0 use by SB_RGBA_DRV SB_RGBA_DRV, not creating SB_IO
Info: led_rgb1 use by SB_RGBA_DRV SB_RGBA_DRV, not creating SB_IO
Info: led_rgb2 use by SB_RGBA_DRV SB_RGBA_DRV, not creating SB_IO
Info: usb_d_p feeds SB_IO SB_IO_4, removing $nextpnr_iobuf usb_d_p.
Info: usb_d_n feeds SB_IO SB_IO_5, removing $nextpnr_iobuf usb_d_n.
Info: usb_pulldown feeds SB_IO SB_IO_6, removing $nextpnr_iobuf usb_pulldown.
Info: touch_t1 feeds SB_IO SB_IO_7, removing $nextpnr_iobuf touch_t1.
Info: touch_t2 feeds SB_IO SB_IO_8, removing $nextpnr_iobuf touch_t2.
Info: touch_t3 feeds SB_IO SB_IO_9, removing $nextpnr_iobuf touch_t3.
Info: touch_t4 feeds SB_IO SB_IO_10, removing $nextpnr_iobuf touch_t4.
Info: Packing LUT-FFs..
Info: Packing non-LUT FFs..
Info: Packing carries..
Info: Packing RAMs..
Info: Placing PLLs..
Info: constrained PLL 'SB_PLL40_CORE' to X12/Y31/pll_3
Info: Packing special functions..
Info: constrained SB_LEDDA_IP 'SB_LEDDA_IP' to X0/Y31/ledda_ip_2
Info: constrained SB_RGBA_DRV 'SB_RGBA_DRV' to X0/Y30/rgba_drv_0
Info: Promoting globals..
Info: promoting sys_rst [reset] (fanout 736)
Info: promoting VexRiscv.reset [reset] (fanout 42)
Info: promoting $abc$49475$auto$rtlil.cc:1817:NotGate$49397 [reset] (fanout 32)
Info: promoting $abc$49475$auto$dff2dffe.cc:158:make_patterns_logic$38301 [cen] (fanout 66)
Info: promoting $abc$49475$auto$dff2dffe.cc:158:make_patterns_logic$38697 [cen] (fanout 53)
Info: promoting $abc$49475$auto$dff2dffe.cc:158:make_patterns_logic$32668 [cen] (fanout 38)
Info: Constraining chains...
Info: Checksum: 0xdc35ffa3
Info: Annotating ports with timing budgets for target frequency 12.00 MHz
Info: Checksum: 0x708eda66
Info: Device utilisation:
Info: ICESTORM_LC: 5040/ 5280 95%
Info: ICESTORM_RAM: 29/ 30 96%
Info: SB_IO: 15/ 96 15%
Info: SB_GB: 8/ 8 100%
Info: ICESTORM_PLL: 1/ 1 100%
Info: SB_WARMBOOT: 1/ 1 100%
Info: ICESTORM_DSP: 0/ 8 0%
Info: ICESTORM_HFOSC: 0/ 1 0%
Info: ICESTORM_LFOSC: 0/ 1 0%
Info: SB_I2C: 0/ 2 0%
Info: SB_SPI: 0/ 2 0%
Info: IO_I3C: 0/ 2 0%
Info: SB_LEDDA_IP: 1/ 1 100%
Info: SB_RGBA_DRV: 1/ 1 100%
Info: ICESTORM_SPRAM: 4/ 4 100%
Info: Placed 19 cells based on constraints.
Info: Creating initial analytic placement for 4566 cells, random placement wirelen = 125843.
Info: at initial placer iter 0, wirelen = 2448
Info: at initial placer iter 1, wirelen = 2315
Info: at initial placer iter 2, wirelen = 2436
Info: at initial placer iter 3, wirelen = 2370
Info: Running main analytical placer.
Info: at iteration #1, type ALL: wirelen solved = 2368, spread = 40555, legal = 58088; time = 0.72s
Info: at iteration #2, type ALL: wirelen solved = 4114, spread = 33793, legal = 51901; time = 0.59s
Info: at iteration #3, type ALL: wirelen solved = 5745, spread = 31812, legal = 49198; time = 0.46s
Info: at iteration #4, type ALL: wirelen solved = 7105, spread = 30480, legal = 47139; time = 0.57s
Info: at iteration #5, type ALL: wirelen solved = 8236, spread = 29961, legal = 46233; time = 0.45s
Info: at iteration #6, type ALL: wirelen solved = 9827, spread = 28636, legal = 43556; time = 0.46s
Info: at iteration #7, type ALL: wirelen solved = 10205, spread = 28274, legal = 43373; time = 0.41s
Info: at iteration #8, type ALL: wirelen solved = 11635, spread = 27180, legal = 42847; time = 0.40s
Info: at iteration #9, type ALL: wirelen solved = 12912, spread = 26695, legal = 41639; time = 0.41s
Info: at iteration #10, type ALL: wirelen solved = 13292, spread = 26472, legal = 44021; time = 0.37s
Info: at iteration #11, type ALL: wirelen solved = 14581, spread = 26391, legal = 42225; time = 0.47s
Info: at iteration #12, type ALL: wirelen solved = 15018, spread = 26161, legal = 43710; time = 0.45s
Info: at iteration #13, type ALL: wirelen solved = 15542, spread = 26288, legal = 41769; time = 0.50s
Info: at iteration #14, type ALL: wirelen solved = 16278, spread = 26342, legal = 40665; time = 0.49s
Info: at iteration #15, type ALL: wirelen solved = 16705, spread = 26265, legal = 44542; time = 0.45s
Info: at iteration #16, type ALL: wirelen solved = 17153, spread = 26403, legal = 41488; time = 0.38s
Info: at iteration #17, type ALL: wirelen solved = 17516, spread = 26201, legal = 42576; time = 0.50s
Info: at iteration #18, type ALL: wirelen solved = 18393, spread = 26695, legal = 41090; time = 0.35s
Info: at iteration #19, type ALL: wirelen solved = 18826, spread = 26733, legal = 42611; time = 0.45s
Info: HeAP Placer Time: 10.87s
Info: of which solving equations: 2.79s
Info: of which spreading cells: 0.47s
Info: of which strict legalisation: 6.00s
Info: Running simulated annealing placer for refinement.
Info: at iteration #1: temp = 0.000000, timing cost = 425, wirelen = 40665
Info: at iteration #5: temp = 0.000000, timing cost = 210, wirelen = 33053
Info: at iteration #10: temp = 0.000000, timing cost = 208, wirelen = 30983
Info: at iteration #15: temp = 0.000000, timing cost = 206, wirelen = 30185
Info: at iteration #20: temp = 0.000000, timing cost = 204, wirelen = 29477
Info: at iteration #25: temp = 0.000000, timing cost = 204, wirelen = 29253
Info: at iteration #30: temp = 0.000000, timing cost = 206, wirelen = 29135
Info: at iteration #35: temp = 0.000000, timing cost = 206, wirelen = 29088
Info: at iteration #37: temp = 0.000000, timing cost = 206, wirelen = 29086
Info: SA placement time 14.31s
Info: Max frequency for clock 'clk48': 228.05 MHz (PASS at 48.00 MHz)
Info: Max frequency for clock 'clk12': 14.51 MHz (PASS at 12.00 MHz)
Info: Max frequency for clock 'clk48_1': 53.75 MHz (PASS at 48.00 MHz)
Info: Max delay <async> -> posedge clk12 : 12.80 ns
Info: Max delay <async> -> posedge clk48_1: 13.51 ns
Info: Max delay posedge clk12 -> <async> : 13.05 ns
Info: Max delay posedge clk12 -> posedge clk48_1: 21.92 ns
Info: Max delay posedge clk48_1 -> <async> : 5.21 ns
Info: Max delay posedge clk48_1 -> posedge clk12 : 32.16 ns
Info: Slack histogram:
Info: legend: * represents 25 endpoint(s)
Info: + represents [1,25) endpoint(s)
Info: [ -1082, 2982) |*+
Info: [ 2982, 7046) |*+
Info: [ 7046, 11110) |**+
Info: [ 11110, 15174) |**+
Info: [ 15174, 19238) |****+
Info: [ 19238, 23302) |*+
Info: [ 23302, 27366) |***+
Info: [ 27366, 31430) |*****+
Info: [ 31430, 35494) |*+
Info: [ 35494, 39558) |****+
Info: [ 39558, 43622) |*****+
Info: [ 43622, 47686) |****+
Info: [ 47686, 51750) |*********+
Info: [ 51750, 55814) |************+
Info: [ 55814, 59878) |*************************************+
Info: [ 59878, 63942) |**********************************+
Info: [ 63942, 68006) |**********************+
Info: [ 68006, 72070) |******************+
Info: [ 72070, 76134) |***************+
Info: [ 76134, 80198) |************************************************************
Info: Checksum: 0x177e185b
Info: Routing..
Info: Setting up routing queue.
Info: Routing 15749 arcs.
Info: | (re-)routed arcs | delta | remaining
Info: IterCnt | w/ripup wo/ripup | w/r wo/r | arcs
Info: 1000 | 23 976 | 23 976 | 14776
Info: 2000 | 49 1950 | 26 974 | 13815
Info: 3000 | 197 2802 | 148 852 | 13025
Info: 4000 | 428 3571 | 231 769 | 12363
Info: 5000 | 664 4335 | 236 764 | 11712
Info: 6000 | 934 5065 | 270 730 | 11108
Info: 7000 | 1149 5850 | 215 785 | 10516
Info: 8000 | 1411 6588 | 262 738 | 9933
Info: 9000 | 1620 7379 | 209 791 | 9250
Info: 10000 | 1874 8125 | 254 746 | 8674
Info: 11000 | 2230 8769 | 356 644 | 8194
Info: 12000 | 2516 9483 | 286 714 | 7671
Info: 13000 | 2879 10120 | 363 637 | 7232
Info: 14000 | 3306 10693 | 427 573 | 7012
Info: 15000 | 3773 11226 | 467 533 | 6758
Info: 16000 | 4127 11872 | 354 646 | 6296
Info: 17000 | 4570 12429 | 443 557 | 6018
Info: 18000 | 4985 13014 | 415 585 | 5668
Info: 19000 | 5431 13568 | 446 554 | 5391
Info: 20000 | 5880 14119 | 449 551 | 5116
Info: 21000 | 6352 14647 | 472 528 | 4902
Info: 22000 | 6834 15165 | 482 518 | 4738
Info: 23000 | 7336 15663 | 502 498 | 4610
Info: 24000 | 7876 16123 | 540 460 | 4530
Info: 25000 | 8350 16649 | 474 526 | 4474
Info: 26000 | 8908 17091 | 558 442 | 4424
Info: 27000 | 9479 17520 | 571 429 | 4352
Info: 28000 | 10005 17994 | 526 474 | 4254
Info: 29000 | 10532 18467 | 527 473 | 4159
Info: 30000 | 11072 18927 | 540 460 | 3994
Info: 31000 | 11538 19461 | 466 534 | 3784
Info: 32000 | 12047 19952 | 509 491 | 3694
Info: 33000 | 12581 20418 | 534 466 | 3577
Info: 34000 | 13065 20934 | 484 516 | 3457
Info: 35000 | 13587 21412 | 522 478 | 3281
Info: 36000 | 14149 21850 | 562 438 | 3200
Info: 37000 | 14671 22328 | 522 478 | 3061
Info: 38000 | 15254 22745 | 583 417 | 2984
Info: 39000 | 15807 23192 | 553 447 | 2919
Info: 40000 | 16358 23641 | 551 449 | 2840
Info: 41000 | 16914 24085 | 556 444 | 2777
Info: 42000 | 17495 24504 | 581 419 | 2705
Info: 43000 | 18029 24970 | 534 466 | 2579
Info: 44000 | 18634 25365 | 605 395 | 2567
Info: 45000 | 19213 25786 | 579 421 | 2518
Info: 46000 | 19794 26205 | 581 419 | 2492
Info: 47000 | 20337 26662 | 543 457 | 2504
Info: 48000 | 20900 27099 | 563 437 | 2461
Info: 49000 | 21463 27536 | 563 437 | 2388
Info: 50000 | 22043 27956 | 580 420 | 2358
Info: 51000 | 22644 28355 | 601 399 | 2346
Info: 52000 | 23198 28801 | 554 446 | 2297
Info: 53000 | 23792 29207 | 594 406 | 2279
Info: 54000 | 24402 29597 | 610 390 | 2272
Info: 55000 | 25033 29966 | 631 369 | 2244
Info: 56000 | 25593 30406 | 560 440 | 2215
Info: 57000 | 26207 30792 | 614 386 | 2187
Info: 58000 | 26826 31173 | 619 381 | 2164
Info: 59000 | 27457 31542 | 631 369 | 2124
Info: 60000 | 28088 31911 | 631 369 | 2113
Info: 61000 | 28724 32275 | 636 364 | 2093
Info: 62000 | 29379 32620 | 655 345 | 2095
Info: 63000 | 29966 33033 | 587 413 | 2056
Info: 64000 | 30575 33424 | 609 391 | 2018
Info: 65000 | 31159 33840 | 584 416 | 1999
Info: 66000 | 31757 34242 | 598 402 | 1961
Info: 67000 | 32384 34615 | 627 373 | 1950
Info: 68000 | 32979 35020 | 595 405 | 1944
Info: 69000 | 33614 35385 | 635 365 | 1917
Info: 70000 | 34260 35739 | 646 354 | 1872
Info: 71000 | 34861 36138 | 601 399 | 1856
Info: 72000 | 35425 36574 | 564 436 | 1848
Info: 73000 | 36042 36957 | 617 383 | 1829
Info: 74000 | 36633 37366 | 591 409 | 1818
Info: 75000 | 37229 37770 | 596 404 | 1759
Info: 76000 | 37843 38156 | 614 386 | 1750
Info: 77000 | 38430 38569 | 587 413 | 1678
Info: 78000 | 39022 38977 | 592 408 | 1650
Info: 79000 | 39614 39385 | 592 408 | 1640
Info: 80000 | 40247 39752 | 633 367 | 1583
Info: 81000 | 40836 40163 | 589 411 | 1552
Info: 82000 | 41505 40494 | 669 331 | 1536
Info: 83000 | 42146 40853 | 641 359 | 1539
Info: 84000 | 42717 41282 | 571 429 | 1499
Info: 85000 | 43202 41797 | 485 515 | 1474
Info: 86000 | 43799 42200 | 597 403 | 1444
Info: 87000 | 44413 42586 | 614 386 | 1462
Info: 88000 | 44955 43044 | 542 458 | 1397
Info: 89000 | 45396 43603 | 441 559 | 1059
Info: 90000 | 45949 44050 | 553 447 | 952
Info: 91000 | 46441 44558 | 492 508 | 782
Info: 92000 | 46920 45079 | 479 521 | 520
Info: 93000 | 47528 45471 | 608 392 | 384
Info: 94000 | 48117 45882 | 589 411 | 316
Info: 95000 | 48630 46369 | 513 487 | 154
Info: 95547 | 48854 46693 | 224 324 | 0
Info: Routing complete.
Info: Route time 101.51s
Info: Checksum: 0xc4fa862e
Info: Critical path report for clock 'clk48' (posedge -> posedge):
Info: curr total
Info: 1.4 1.4 Source $abc$49475$auto$blifparse.cc:492:parse_blif$52568_LC.O
Info: 1.8 3.2 Net clk12_counter[1] budget 18.209000 ns (20,2) -> (20,2)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$52568_LC.I0
Info: 1.2 4.4 Setup $abc$49475$auto$blifparse.cc:492:parse_blif$52568_LC.I0
Info: 2.6 ns logic, 1.8 ns routing
Info: Critical path report for clock 'clk12' (posedge -> posedge):
Info: curr total
Info: 1.4 1.4 Source $auto$simplemap.cc:420:simplemap_dff$16580_DFFLC.O
Info: 5.5 6.8 Net VexRiscv.CsrPlugin_selfException_payload_badAddr[9] budget 2.054000 ns (17,10) -> (14,29)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$49683_LC.I1
Info: 1.2 8.1 Source $abc$49475$auto$blifparse.cc:492:parse_blif$49683_LC.O
Info: 1.8 9.8 Net $abc$49475$n3939 budget 1.959000 ns (14,29) -> (14,29)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$50257_LC.I2
Info: 1.2 11.0 Source $abc$49475$auto$blifparse.cc:492:parse_blif$50257_LC.O
Info: 4.1 15.2 Net $abc$49475$techmap\VexRiscv.$not$C:\Users\sean\Code\Fomu\foboot\hw\rtl\2-stage-1024-cache-debug.v:1104$1523_Y[2] budget 2.054000 ns (14,29) -> (21,22)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$52109_LC.I0
Info: 1.3 16.5 Source $abc$49475$auto$blifparse.cc:492:parse_blif$52109_LC.O
Info: 3.0 19.5 Net VexRiscv._zz_196_[2] budget 1.959000 ns (21,22) -> (21,17)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[2].adder_LC.I1
Info: 0.7 20.1 Source $auto$maccmap.cc:240:synth$17884.slice[2].adder_LC.COUT
Info: 0.0 20.1 Net $auto$maccmap.cc:240:synth$17884.C[3] budget 0.000000 ns (21,17) -> (21,17)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[3].adder_LC.CIN
Info: 0.3 20.4 Source $auto$maccmap.cc:240:synth$17884.slice[3].adder_LC.COUT
Info: 0.0 20.4 Net $auto$maccmap.cc:240:synth$17884.C[4] budget 0.000000 ns (21,17) -> (21,17)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[4].adder_LC.CIN
Info: 0.3 20.7 Source $auto$maccmap.cc:240:synth$17884.slice[4].adder_LC.COUT
Info: 0.0 20.7 Net $auto$maccmap.cc:240:synth$17884.C[5] budget 0.000000 ns (21,17) -> (21,17)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[5].adder_LC.CIN
Info: 0.3 21.0 Source $auto$maccmap.cc:240:synth$17884.slice[5].adder_LC.COUT
Info: 0.0 21.0 Net $auto$maccmap.cc:240:synth$17884.C[6] budget 0.000000 ns (21,17) -> (21,17)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[6].adder_LC.CIN
Info: 0.3 21.2 Source $auto$maccmap.cc:240:synth$17884.slice[6].adder_LC.COUT
Info: 0.6 21.8 Net $auto$maccmap.cc:240:synth$17884.C[7] budget 0.560000 ns (21,17) -> (21,18)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[7].adder_LC.CIN
Info: 0.3 22.1 Source $auto$maccmap.cc:240:synth$17884.slice[7].adder_LC.COUT
Info: 0.0 22.1 Net $auto$maccmap.cc:240:synth$17884.C[8] budget 0.000000 ns (21,18) -> (21,18)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[8].adder_LC.CIN
Info: 0.3 22.4 Source $auto$maccmap.cc:240:synth$17884.slice[8].adder_LC.COUT
Info: 0.0 22.4 Net $auto$maccmap.cc:240:synth$17884.C[9] budget 0.000000 ns (21,18) -> (21,18)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[9].adder_LC.CIN
Info: 0.3 22.6 Source $auto$maccmap.cc:240:synth$17884.slice[9].adder_LC.COUT
Info: 0.0 22.6 Net $auto$maccmap.cc:240:synth$17884.C[10] budget 0.000000 ns (21,18) -> (21,18)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[10].adder_LC.CIN
Info: 0.3 22.9 Source $auto$maccmap.cc:240:synth$17884.slice[10].adder_LC.COUT
Info: 0.0 22.9 Net $auto$maccmap.cc:240:synth$17884.C[11] budget 0.000000 ns (21,18) -> (21,18)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[11].adder_LC.CIN
Info: 0.3 23.2 Source $auto$maccmap.cc:240:synth$17884.slice[11].adder_LC.COUT
Info: 0.0 23.2 Net $auto$maccmap.cc:240:synth$17884.C[12] budget 0.000000 ns (21,18) -> (21,18)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[12].adder_LC.CIN
Info: 0.3 23.5 Source $auto$maccmap.cc:240:synth$17884.slice[12].adder_LC.COUT
Info: 0.0 23.5 Net $auto$maccmap.cc:240:synth$17884.C[13] budget 0.000000 ns (21,18) -> (21,18)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[13].adder_LC.CIN
Info: 0.3 23.7 Source $auto$maccmap.cc:240:synth$17884.slice[13].adder_LC.COUT
Info: 0.0 23.7 Net $auto$maccmap.cc:240:synth$17884.C[14] budget 0.000000 ns (21,18) -> (21,18)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[14].adder_LC.CIN
Info: 0.3 24.0 Source $auto$maccmap.cc:240:synth$17884.slice[14].adder_LC.COUT
Info: 0.6 24.6 Net $auto$maccmap.cc:240:synth$17884.C[15] budget 0.560000 ns (21,18) -> (21,19)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[15].adder_LC.CIN
Info: 0.3 24.9 Source $auto$maccmap.cc:240:synth$17884.slice[15].adder_LC.COUT
Info: 0.0 24.9 Net $auto$maccmap.cc:240:synth$17884.C[16] budget 0.000000 ns (21,19) -> (21,19)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[16].adder_LC.CIN
Info: 0.3 25.1 Source $auto$maccmap.cc:240:synth$17884.slice[16].adder_LC.COUT
Info: 0.0 25.1 Net $auto$maccmap.cc:240:synth$17884.C[17] budget 0.000000 ns (21,19) -> (21,19)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[17].adder_LC.CIN
Info: 0.3 25.4 Source $auto$maccmap.cc:240:synth$17884.slice[17].adder_LC.COUT
Info: 0.0 25.4 Net $auto$maccmap.cc:240:synth$17884.C[18] budget 0.000000 ns (21,19) -> (21,19)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[18].adder_LC.CIN
Info: 0.3 25.7 Source $auto$maccmap.cc:240:synth$17884.slice[18].adder_LC.COUT
Info: 0.0 25.7 Net $auto$maccmap.cc:240:synth$17884.C[19] budget 0.000000 ns (21,19) -> (21,19)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[19].adder_LC.CIN
Info: 0.3 26.0 Source $auto$maccmap.cc:240:synth$17884.slice[19].adder_LC.COUT
Info: 0.0 26.0 Net $auto$maccmap.cc:240:synth$17884.C[20] budget 0.000000 ns (21,19) -> (21,19)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[20].adder_LC.CIN
Info: 0.3 26.3 Source $auto$maccmap.cc:240:synth$17884.slice[20].adder_LC.COUT
Info: 0.0 26.3 Net $auto$maccmap.cc:240:synth$17884.C[21] budget 0.000000 ns (21,19) -> (21,19)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[21].adder_LC.CIN
Info: 0.3 26.5 Source $auto$maccmap.cc:240:synth$17884.slice[21].adder_LC.COUT
Info: 0.0 26.5 Net $auto$maccmap.cc:240:synth$17884.C[22] budget 0.000000 ns (21,19) -> (21,19)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[22].adder_LC.CIN
Info: 0.3 26.8 Source $auto$maccmap.cc:240:synth$17884.slice[22].adder_LC.COUT
Info: 0.6 27.4 Net $auto$maccmap.cc:240:synth$17884.C[23] budget 0.560000 ns (21,19) -> (21,20)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[23].adder_LC.CIN
Info: 0.3 27.6 Source $auto$maccmap.cc:240:synth$17884.slice[23].adder_LC.COUT
Info: 0.0 27.6 Net $auto$maccmap.cc:240:synth$17884.C[24] budget 0.000000 ns (21,20) -> (21,20)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[24].adder_LC.CIN
Info: 0.3 27.9 Source $auto$maccmap.cc:240:synth$17884.slice[24].adder_LC.COUT
Info: 0.0 27.9 Net $auto$maccmap.cc:240:synth$17884.C[25] budget 0.000000 ns (21,20) -> (21,20)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[25].adder_LC.CIN
Info: 0.3 28.2 Source $auto$maccmap.cc:240:synth$17884.slice[25].adder_LC.COUT
Info: 0.0 28.2 Net $auto$maccmap.cc:240:synth$17884.C[26] budget 0.000000 ns (21,20) -> (21,20)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[26].adder_LC.CIN
Info: 0.3 28.5 Source $auto$maccmap.cc:240:synth$17884.slice[26].adder_LC.COUT
Info: 0.0 28.5 Net $auto$maccmap.cc:240:synth$17884.C[27] budget 0.000000 ns (21,20) -> (21,20)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[27].adder_LC.CIN
Info: 0.3 28.8 Source $auto$maccmap.cc:240:synth$17884.slice[27].adder_LC.COUT
Info: 0.0 28.8 Net $auto$maccmap.cc:240:synth$17884.C[28] budget 0.000000 ns (21,20) -> (21,20)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[28].adder_LC.CIN
Info: 0.3 29.0 Source $auto$maccmap.cc:240:synth$17884.slice[28].adder_LC.COUT
Info: 0.0 29.0 Net $auto$maccmap.cc:240:synth$17884.C[29] budget 0.000000 ns (21,20) -> (21,20)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[29].adder_LC.CIN
Info: 0.3 29.3 Source $auto$maccmap.cc:240:synth$17884.slice[29].adder_LC.COUT
Info: 0.0 29.3 Net $auto$maccmap.cc:240:synth$17884.C[30] budget 0.000000 ns (21,20) -> (21,20)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[30].adder_LC.CIN
Info: 0.3 29.6 Source $auto$maccmap.cc:240:synth$17884.slice[30].adder_LC.COUT
Info: 1.2 30.8 Net $auto$maccmap.cc:240:synth$17884.C[31] budget 1.220000 ns (21,20) -> (21,21)
Info: Sink $auto$maccmap.cc:240:synth$17884.slice[31].adder_LC.I3
Info: 0.9 31.7 Source $auto$maccmap.cc:240:synth$17884.slice[31].adder_LC.O
Info: 2.8 34.5 Net $abc$49475$VexRiscv.dBus_cmd_payload_address[31]_inv budget 2.054000 ns (21,21) -> (18,21)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$49800_LC.I2
Info: 1.2 35.7 Source $abc$49475$auto$blifparse.cc:492:parse_blif$49800_LC.O
Info: 1.8 37.5 Net $abc$49475$techmap\VexRiscv.$logic_not$C:\Users\sean\Code\Fomu\foboot\hw\rtl\2-stage-1024-cache-debug.v:2635$1866_Y budget 1.903000 ns (18,21) -> (17,21)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$49799_LC.I1
Info: 1.2 38.7 Source $abc$49475$auto$blifparse.cc:492:parse_blif$49799_LC.O
Info: 1.8 40.5 Net $abc$49475$n4055 budget 2.019000 ns (17,21) -> (16,21)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$49665_LC.I3
Info: 0.9 41.4 Source $abc$49475$auto$blifparse.cc:492:parse_blif$49665_LC.O
Info: 1.8 43.1 Net $abc$49475$n3921 budget 2.047000 ns (16,21) -> (16,20)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$49664_LC.I0
Info: 1.3 44.4 Source $abc$49475$auto$blifparse.cc:492:parse_blif$49664_LC.O
Info: 4.2 48.6 Net $abc$49475$techmap\VexRiscv.$logic_and$C:\Users\sean\Code\Fomu\foboot\hw\rtl\2-stage-1024-cache-debug.v:2742$1879_Y budget 3.077000 ns (16,20) -> (16,7)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$49993_LC.I1
Info: 1.2 49.9 Source $abc$49475$auto$blifparse.cc:492:parse_blif$49993_LC.O
Info: 1.8 51.6 Net VexRiscv.BranchPlugin_jumpInterface_valid budget 2.091000 ns (16,7) -> (15,6)
Info: Sink $nextpnr_ICESTORM_LC_39.I1
Info: 0.7 52.3 Source $nextpnr_ICESTORM_LC_39.COUT
Info: 0.0 52.3 Net $nextpnr_ICESTORM_LC_39$O budget 0.000000 ns (15,6) -> (15,6)
Info: Sink $auto$alumacc.cc:474:replace_alu$6752.slice[1].carry$CARRY.CIN
Info: 0.3 52.6 Source $auto$alumacc.cc:474:replace_alu$6752.slice[1].carry$CARRY.COUT
Info: 0.7 53.2 Net $auto$alumacc.cc:474:replace_alu$6752.C[2] budget 0.660000 ns (15,6) -> (15,6)
Info: Sink $auto$alumacc.cc:474:replace_alu$6752.slice[2].adder_LC.I3
Info: 0.9 54.1 Source $auto$alumacc.cc:474:replace_alu$6752.slice[2].adder_LC.O
Info: 1.8 55.9 Net VexRiscv._zz_175_[2] budget 2.058000 ns (15,6) -> (14,7)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$51670_LC.I0
Info: 1.3 57.2 Source $abc$49475$auto$blifparse.cc:492:parse_blif$51670_LC.O
Info: 1.8 58.9 Net $abc$49475$VexRiscv._zz_75_ budget 2.160000 ns (14,7) -> (14,8)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$51669_LC.I2
Info: 1.2 60.1 Source $abc$49475$auto$blifparse.cc:492:parse_blif$51669_LC.O
Info: 4.2 64.3 Net $abc$49475$auto$simplemap.cc:309:simplemap_lut$17066 budget 1.705000 ns (14,8) -> (14,13)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$51814_LC.I3
Info: 0.9 65.2 Source $abc$49475$auto$blifparse.cc:492:parse_blif$51814_LC.O
Info: 1.8 67.0 Net $abc$49475$techmap$techmap\VexRiscv.$procmux$3234.$and$C:\PROGRA~3\icestorm\bin\../share/yosys/techmap.v:434$17029_Y[28] budget 2.137000 ns (14,13) -> (14,12)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$51813_LC.I2
Info: 1.2 68.2 Source $abc$49475$auto$blifparse.cc:492:parse_blif$51813_LC.O
Info: 3.0 71.1 Net $abc$49475$n6412 budget 3.189000 ns (14,12) -> (13,8)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$51812_LC.I1
Info: 1.2 72.3 Setup $abc$49475$auto$blifparse.cc:492:parse_blif$51812_LC.I1
Info: 27.8 ns logic, 44.5 ns routing
Info: Critical path report for clock 'clk48_1' (posedge -> posedge):
Info: curr total
Info: 1.4 1.4 Source $abc$49475$auto$blifparse.cc:492:parse_blif$50456_LC.O
Info: 1.8 3.2 Net usb_usb_core_rx_line_state_valid budget 1.602000 ns (18,29) -> (17,29)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$52257_LC.I1
Info: 1.2 4.4 Source $abc$49475$auto$blifparse.cc:492:parse_blif$52257_LC.O
Info: 1.8 6.1 Net $abc$49475$n6901 budget 1.148000 ns (17,29) -> (17,29)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$52256_LC.I3
Info: 0.9 7.0 Source $abc$49475$auto$blifparse.cc:492:parse_blif$52256_LC.O
Info: 1.8 8.8 Net $abc$49475$n6900 budget 1.393000 ns (17,29) -> (17,30)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$52255_LC.I2
Info: 1.2 10.0 Source $abc$49475$auto$blifparse.cc:492:parse_blif$52255_LC.O
Info: 1.8 11.7 Net $abc$49475$n6899 budget 1.080000 ns (17,30) -> (18,30)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$52263_LC.I0
Info: 1.3 13.0 Source $abc$49475$auto$blifparse.cc:492:parse_blif$52263_LC.O
Info: 1.8 14.8 Net $abc$49475$n6908 budget 1.080000 ns (18,30) -> (18,30)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$52262_LC.I3
Info: 0.9 15.7 Source $abc$49475$auto$blifparse.cc:492:parse_blif$52262_LC.O
Info: 1.8 17.4 Net $abc$49475$txnrziencoder_next_state[1]_inv budget 1.481000 ns (18,30) -> (17,29)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$52261_LC.I1
Info: 1.2 18.6 Setup $abc$49475$auto$blifparse.cc:492:parse_blif$52261_LC.I1
Info: 8.0 ns logic, 10.6 ns routing
Info: Critical path report for cross-domain path '<async>' -> 'posedge clk12':
Info: curr total
Info: 0.0 0.0 Source SB_IO_1.D_IN_0
Info: 4.7 4.7 Net litexspi_i0[1] budget 26.219999 ns (23,0) -> (12,6)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$50894_LC.I1
Info: 1.2 5.9 Source $abc$49475$auto$blifparse.cc:492:parse_blif$50894_LC.O
Info: 1.8 7.7 Net $abc$49475$n5350 budget 16.166000 ns (12,6) -> (12,7)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$50893_LC.I0
Info: 1.3 9.0 Source $abc$49475$auto$blifparse.cc:492:parse_blif$50893_LC.O
Info: 1.8 10.7 Net $abc$49475$auto$simplemap.cc:127:simplemap_reduce$24247_inv budget 16.243999 ns (12,7) -> (12,8)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$50892_LC.I2
Info: 1.2 11.9 Setup $abc$49475$auto$blifparse.cc:492:parse_blif$50892_LC.I2
Info: 3.7 ns logic, 8.2 ns routing
Info: Critical path report for cross-domain path '<async>' -> 'posedge clk48_1':
Info: curr total
Info: 0.0 0.0 Source SB_IO_5.D_IN_0
Info: 4.4 4.4 Net usb_iobuf_usb_n_t_i budget 5.360000 ns (13,31) -> (22,27)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$52270_LC.I1
Info: 1.2 5.7 Source $abc$49475$auto$blifparse.cc:492:parse_blif$52270_LC.O
Info: 1.8 7.4 Net $abc$49475$auto$simplemap.cc:309:simplemap_lut$14337[1]_inv budget 3.551000 ns (22,27) -> (21,26)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$52273_LC.I0
Info: 1.3 8.7 Source $abc$49475$auto$blifparse.cc:492:parse_blif$52273_LC.O
Info: 3.0 11.7 Net $abc$49475$n6918 budget 3.456000 ns (21,26) -> (18,25)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$52272_LC.I0
Info: 1.2 12.9 Setup $abc$49475$auto$blifparse.cc:492:parse_blif$52272_LC.I0
Info: 3.7 ns logic, 9.1 ns routing
Info: Critical path report for cross-domain path 'posedge clk12' -> '<async>':
Info: curr total
Info: 1.4 1.4 Source $abc$49475$auto$blifparse.cc:492:parse_blif$50709_LC.O
Info: 6.8 8.2 Net litexspi_bus_dat_r[31] budget 38.098999 ns (15,29) -> (18,3)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$51214_LC.I1
Info: 1.2 9.5 Source $abc$49475$auto$blifparse.cc:492:parse_blif$51214_LC.O
Info: 3.1 12.5 Net litexspi_o[3] budget 37.590000 ns (18,3) -> (21,0)
Info: Sink SB_IO_3.D_OUT_0
Info: 0.2 12.7 Setup SB_IO_3.D_OUT_0
Info: 2.8 ns logic, 9.9 ns routing
Info: Critical path report for cross-domain path 'posedge clk12' -> 'posedge clk48_1':
Info: curr total
Info: 1.4 1.4 Source $abc$49475$auto$blifparse.cc:492:parse_blif$52197_LC.O
Info: 1.8 3.2 Net resetinserter_state[0] budget 1.799000 ns (20,25) -> (20,26)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$49861_LC.I0
Info: 1.3 4.4 Source $abc$49475$auto$blifparse.cc:492:parse_blif$49861_LC.O
Info: 3.0 7.4 Net $abc$49475$not$top.v:1597$76_Y_inv budget 0.626000 ns (20,26) -> (17,29)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$52256_LC.I0
Info: 1.3 8.7 Source $abc$49475$auto$blifparse.cc:492:parse_blif$52256_LC.O
Info: 1.8 10.4 Net $abc$49475$n6900 budget 1.393000 ns (17,29) -> (17,30)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$52255_LC.I2
Info: 1.2 11.6 Source $abc$49475$auto$blifparse.cc:492:parse_blif$52255_LC.O
Info: 1.8 13.4 Net $abc$49475$n6899 budget 1.080000 ns (17,30) -> (18,30)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$52263_LC.I0
Info: 1.3 14.7 Source $abc$49475$auto$blifparse.cc:492:parse_blif$52263_LC.O
Info: 1.8 16.4 Net $abc$49475$n6908 budget 1.080000 ns (18,30) -> (18,30)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$52262_LC.I3
Info: 0.9 17.3 Source $abc$49475$auto$blifparse.cc:492:parse_blif$52262_LC.O
Info: 1.8 19.1 Net $abc$49475$txnrziencoder_next_state[1]_inv budget 1.481000 ns (18,30) -> (17,29)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$52261_LC.I1
Info: 1.2 20.3 Setup $abc$49475$auto$blifparse.cc:492:parse_blif$52261_LC.I1
Info: 8.5 ns logic, 11.8 ns routing
Info: Critical path report for cross-domain path 'posedge clk48_1' -> '<async>':
Info: curr total
Info: 1.4 1.4 Source $auto$simplemap.cc:420:simplemap_dff$15080_DFFLC.O
Info: 4.0 5.4 Net usb_iobuf_usb_n_t_oe budget 81.943001 ns (21,28) -> (13,31)
Info: Sink SB_IO_4.OUTPUT_ENABLE
Info: 1.4 ns logic, 4.0 ns routing
Info: Critical path report for cross-domain path 'posedge clk48_1' -> 'posedge clk12':
Info: curr total
Info: 1.4 1.4 Source $abc$49475$auto$blifparse.cc:492:parse_blif$52248_LC.O
Info: 2.8 4.2 Net storage_1[1][0] budget 6.614000 ns (18,25) -> (22,25)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$49585_LC.I0
Info: 1.3 5.5 Source $abc$49475$auto$blifparse.cc:492:parse_blif$49585_LC.O
Info: 4.7 10.2 Net $abc$49475$usb_usb_core_rx_o_pkt_end budget 6.647000 ns (22,25) -> (9,20)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$49584_LC.I0
Info: 1.3 11.5 Source $abc$49475$auto$blifparse.cc:492:parse_blif$49584_LC.O
Info: 1.8 13.3 Net $abc$49475$procmux$4891.B_AND_S[14] budget 5.751000 ns (9,20) -> (8,20)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$49579_LC.I1
Info: 1.2 14.5 Source $abc$49475$auto$blifparse.cc:492:parse_blif$49579_LC.O
Info: 1.8 16.2 Net $abc$49475$n3835 budget 5.106000 ns (8,20) -> (8,21)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$49578_LC.I2
Info: 1.2 17.4 Source $abc$49475$auto$blifparse.cc:492:parse_blif$49578_LC.O
Info: 1.8 19.2 Net $abc$49475$auto$simplemap.cc:309:simplemap_lut$7760[3] budget 5.402000 ns (8,21) -> (9,20)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$50101_LC.I3
Info: 0.9 20.1 Source $abc$49475$auto$blifparse.cc:492:parse_blif$50101_LC.O
Info: 1.8 21.8 Net $abc$49475$n4372 budget 4.507000 ns (9,20) -> (9,21)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$50070_LC.I1
Info: 1.2 23.1 Source $abc$49475$auto$blifparse.cc:492:parse_blif$50070_LC.O
Info: 1.8 24.8 Net $abc$49475$usb_usb_core_is_el0 budget 4.865000 ns (9,21) -> (9,22)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$50069_LC.I0
Info: 1.3 26.1 Source $abc$49475$auto$blifparse.cc:492:parse_blif$50069_LC.O
Info: 1.8 27.9 Net $abc$49475$usb_usb_core_tx_i_oe_txpacketsend_next_value0 budget 4.627000 ns (9,22) -> (9,22)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$50068_LC.I0
Info: 1.3 29.2 Source $abc$49475$auto$blifparse.cc:492:parse_blif$50068_LC.O
Info: 3.0 32.2 Net $abc$49475$auto$dff2dffe.cc:158:make_patterns_logic$30095 budget 5.135000 ns (9,22) -> (9,19)
Info: Sink $abc$49475$auto$blifparse.cc:492:parse_blif$52182_LC.CEN
Info: 0.1 32.3 Setup $abc$49475$auto$blifparse.cc:492:parse_blif$52182_LC.CEN
Info: 11.2 ns logic, 21.1 ns routing
Info: Max frequency for clock 'clk48': 228.05 MHz (PASS at 48.00 MHz)
Info: Max frequency for clock 'clk12': 13.83 MHz (PASS at 12.00 MHz)
Info: Max frequency for clock 'clk48_1': 53.75 MHz (PASS at 48.00 MHz)
Info: Max delay <async> -> posedge clk12 : 12.88 ns
Info: Max delay <async> -> posedge clk48_1: 13.90 ns
Info: Max delay posedge clk12 -> <async> : 12.72 ns
Info: Max delay posedge clk12 -> posedge clk48_1: 20.26 ns
Info: Max delay posedge clk48_1 -> <async> : 5.43 ns
Info: Max delay posedge clk48_1 -> posedge clk12 : 32.26 ns
Info: Slack histogram:
Info: legend: * represents 23 endpoint(s)
Info: + represents [1,23) endpoint(s)
Info: [ 574, 4555) |**+
Info: [ 4555, 8536) |**+
Info: [ 8536, 12517) |**+
Info: [ 12517, 16498) |****+
Info: [ 16498, 20479) |***+
Info: [ 20479, 24460) |**+
Info: [ 24460, 28441) |******+
Info: [ 28441, 32422) |*+
Info: [ 32422, 36403) |***+
Info: [ 36403, 40384) |**+
Info: [ 40384, 44365) |*****+
Info: [ 44365, 48346) |*******+
Info: [ 48346, 52327) |*******+
Info: [ 52327, 56308) |****************+
Info: [ 56308, 60289) |*********************+
Info: [ 60289, 64270) |**************************+
Info: [ 64270, 68251) |***************************************************+
Info: [ 68251, 72232) |********************+
Info: [ 72232, 76213) |********************+
Info: [ 76213, 80194) |************************************************************
5 warnings, 0 errors
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