CHIP Internal ADC Test Code

adctest.c

#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <unistd.h>
#include <fcntl.h>
#include <sys/mman.h>
#include <string.h>

#define LRADC        0x01C22800
#define CTRL_OFFSET  0x00
#define INTC_OFFSET  0x04
#define INTS_OFFSET  0x08
#define DATA0_OFFSET 0x0C
#define DATA1_OFFSET 0x10
#define LRADC_CTRL_DEFAULT 0x01000168
#define LRADC_MISC_DEFAULT 0x00000000

#define ADC_250HZ_RATE   0x00
#define ADC_125HZ_RATE   0x01
#define ADC_62_5HZ_RATE  0x02
#define ADC_32_25HZ_RATE 0x03

#define ADC_VOLT_REF_19 0x00
#define ADC_VOLT_REF_18 0x01
#define ADC_VOLT_REF_17 0x02
#define ADC_VOLT_REF_16 0x03

static volatile uint32_t *adc_map;
unsigned volatile page_size, page_offset;

void short_wait(void)
{
    int i;

    for (i=0; i<150; i++) {    // wait 150 cycles
        asm volatile("nop");
    }
}

void adc_reset()
{
    /* write the default values ot the 5 registers */
    *((unsigned *)(adc_map + page_offset + CTRL_OFFSET)) = LRADC_CTRL_DEFAULT;
    *((unsigned *)(adc_map + page_offset + INTC_OFFSET)) = LRADC_MISC_DEFAULT;
    *((unsigned *)(adc_map + page_offset + INTS_OFFSET)) = LRADC_MISC_DEFAULT;
    *((unsigned *)(adc_map + page_offset + DATA0_OFFSET)) = LRADC_MISC_DEFAULT;
    *((unsigned *)(adc_map + page_offset + DATA1_OFFSET)) = LRADC_MISC_DEFAULT;
}

int set_channel(int chan)
{
    int shift = 22;
    int tmp = 0;
    if (chan > 2) {
        return -1;
    } else {
        *(adc_map + page_offset + CTRL_OFFSET) |= (chan << shift);
    }
    return 0;
}

int set_adc_volt_ref(int ref)
{
    int shift = 4;
    if (ref < 0 || ref > 3) {
        return -1;
    } else {
        *(adc_map + page_offset + CTRL_OFFSET) |= (ref << shift);
    }
    return 0;
}

int set_sample_rate(int rate)
{
    int shift = 2;
    if (rate < 0 || rate > 3) {
        return -1;
    } else {
        *(adc_map + page_offset + CTRL_OFFSET) |= (rate << shift);
    }
    return 0;
}

void set_hold_enable(int enable)
{
    int shift = 6;
    if (enable) {
        *(adc_map + page_offset + CTRL_OFFSET) |= (1 << shift);
    } else {
        *(adc_map + page_offset + CTRL_OFFSET) &= ~(1 << shift);
    }
}

int set_key_mode(int mode)
{
    int shift = 12;
    if (mode < 0 || mode > 2) {
        return -1;
    } else {
        *(adc_map + page_offset + CTRL_OFFSET) |= (mode << shift);
    }
    return 0;
}

void enable(int enable)
{
    if (enable) {
        *(adc_map + page_offset + CTRL_OFFSET) |= 1;
    } else {
        *(adc_map + page_offset + CTRL_OFFSET) &= ~1;
    }
}

int read_value(unsigned int chan, float *value)
{
    int offset;
    
    if (chan == 0) {
        offset = DATA0_OFFSET;
    } else if (chan == 1) {
        offset = DATA1_OFFSET;
    } else {
        return -1;
    }

    value = ((float *)(adc_map + page_offset + offset));

    return 0;
}

int main(int argc, char *argv[]) {
	int fd;
	unsigned gpio_addr = LRADC;
	int value = 0;
	unsigned page_addr;

	page_size=sysconf(_SC_PAGESIZE);
	
	/* Open /dev/mem file */
	fd = open ("/dev/mem", O_RDWR|O_SYNC);
	if (fd < 1) {
		return -1;
	}

	/* mmap the device into memory */
	page_addr = (gpio_addr & (~(page_size-1)));
	page_offset = gpio_addr - page_addr;
	adc_map = (uint32_t*)mmap(NULL, page_size, PROT_READ|PROT_WRITE, MAP_SHARED, fd, page_addr);

    //printf("PAGE SIZE:   0x%08X\nPAGE ADDR:   0x%08X\nPAGE OFFSET: 0x%08X\nADC MAP:     0x%08X\n",page_size, page_addr, page_offset, adc_map);

    printf("RESETTING ADC:\n=================\nRUNNING MANUAL ADC SETUP\n");
    adc_reset();
    
    int tmp;
    tmp = set_channel(2);
    short_wait();
    tmp = set_key_mode(0);
    short_wait();
    tmp = set_sample_rate(0);
    short_wait();
    tmp = set_adc_volt_ref(1);
    short_wait();
    set_hold_enable(0);
    short_wait();
    printf("ENABLING ADC\n");
    enable(1);
    short_wait();
    tmp = set_sample_rate(0);
    short_wait();
    tmp = set_adc_volt_ref(1);

    printf("READING ADC REGISTER DATA:\n=================\n");

    value = *((unsigned *)(adc_map + page_offset + CTRL_OFFSET));
    printf("ADDRESS: 0x%08X -> 0x%08X\n", gpio_addr + CTRL_OFFSET, value);

    // BREAK UP THE FIRST REGISTER
    int FIRST_CONCERT_DLY, ADC_CHAN_SELECT, CONTINUE_TIME_SELECT, KEY_MODE_SELECT;
    int LEVELA_B_CNT, LRADC_HOLD_EN, LEVELB_VOL, LRADC_SAMPLE_RATE, LRADC_EN;
    
    FIRST_CONCERT_DLY = (value & 0xFF000000) >> 24;
    ADC_CHAN_SELECT = (value & 0x00C00000) >> 22;
    CONTINUE_TIME_SELECT = (value & 0x000F0000) >> 16;
    KEY_MODE_SELECT = (value & 0x00003000) >> 12;
    LEVELA_B_CNT = (value & 0x00000F00) >> 8;
    LRADC_HOLD_EN = (value & 0x00000040) >> 6;
    LEVELB_VOL = (value & 0x00000030) >> 4;
    LRADC_SAMPLE_RATE = (value & 0x0000000C) >> 2;
    LRADC_EN = value & 0x00000001;
    
    printf("  FIRST_CONCERT_DLY:    0x%02X\n", FIRST_CONCERT_DLY);
    printf("  ADC_CHAN_SELECT:      0x%02X\n", ADC_CHAN_SELECT);
    printf("  CONTINUE_TIME_SELECT: 0x%02X\n", CONTINUE_TIME_SELECT);
    printf("  KEY_MODE_SELECT:      0x%02X\n", KEY_MODE_SELECT);
    printf("  LEVELA_B_CNT:         0x%02X\n", LEVELA_B_CNT);
    printf("  LRADC_HOLD_EN:        0x%02X\n", LRADC_HOLD_EN);
    printf("  LEVELB_VOL:           0x%02X\n", LEVELB_VOL);
    printf("  LRADC_SAMPLE_RATE:    0x%02X\n", LRADC_SAMPLE_RATE);
    printf("  LRADC_EN:             0x%02X\n", LRADC_EN);


    value = *((unsigned *)(adc_map + page_offset + INTC_OFFSET));
    printf("ADDRESS: 0x%08X -> 0x%08X\n", gpio_addr + INTC_OFFSET, value);

    value = *((unsigned *)(adc_map + page_offset + INTS_OFFSET));
    printf("ADDRESS: 0x%08X -> 0x%08X\n", gpio_addr + INTS_OFFSET, value);
    
    value = *((unsigned *)(adc_map + page_offset + DATA0_OFFSET));
    printf("ADDRESS: 0x%08X -> 0x%08X\n", gpio_addr + DATA0_OFFSET, value);
    
    value = *((unsigned *)(adc_map + page_offset + DATA1_OFFSET));
    printf("ADDRESS: 0x%08X -> 0x%08X\n", gpio_addr + DATA1_OFFSET, value);
    
    printf("READING ADC DATA REGISTERS:\n=================\n");
    float *adcvalue;
    int i = 0;
    do {
        //value = *((unsigned *)(adc_map + page_offset + DATA0_OFFSET));
        //printf("ADDRESS: 0x%08X -> 0x%08X\n", gpio_addr + DATA0_OFFSET, value);
    
        //value = *((unsigned *)(adc_map + page_offset + DATA1_OFFSET));
        //printf("ADDRESS: 0x%08X -> 0x%08X\n", gpio_addr + DATA1_OFFSET, value);
    
        tmp = read_value(0, adcvalue);
        printf("DATA0 -> %d\n", (int)adcvalue);
        tmp = read_value(1, adcvalue);
        printf("DATA1 -> %d\n", (int)adcvalue);
        
        //value = *((unsigned *)(adc_map + page_offset + INTC_OFFSET));
        //printf("ADDRESS: 0x%08X -> 0x%08X\n", gpio_addr + INTC_OFFSET, value);

        //value = *((unsigned *)(adc_map + page_offset + INTS_OFFSET));
        //printf("ADDRESS: 0x%08X -> 0x%08X\n", gpio_addr + INTS_OFFSET, value);
    
        sleep(1);
        i += 1;
    } while (i < 100);
    
	/* Read value from the device register */
	//	value = *((unsigned *)(ptr + page_offset));
	//	printf("gpio dev-mem test: input: %08x\n",value);
	//} else {
	///* Write value to the device register */
	//	*((unsigned *)(ptr + page_offset)) = value;
	//}
	
	printf("WRITING ADC REGISTER DATA:\n=================\nADC DISABLE\n");
    //*((unsigned *)(adc_map + page_offset + CTRL_OFFSET)) = 0x18800244;
	enable(0);
	
	munmap((void*)adc_map, page_size);

    printf("=================\n");
    return 0;

}

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