llvm debug hack for virtual registers

llvm-dgb-no-virt-v2.diff

Index: lib/CodeGen/AsmPrinter/DbgValueHistoryCalculator.cpp
===================================================================
--- lib/CodeGen/AsmPrinter/DbgValueHistoryCalculator.cpp	(revision 270942)
+++ lib/CodeGen/AsmPrinter/DbgValueHistoryCalculator.cpp	(working copy)
@@ -164,7 +164,7 @@
       // Look for register defs and register masks. Register masks are
       // typically on calls and they clobber everything not in the mask.
       for (const MachineOperand &MO : MI.operands()) {
-        if (MO.isReg() && MO.isDef() && MO.getReg()) {
+        if (MO.isReg() && MO.isDef() && TargetRegisterInfo::isPhysicalRegister(MO.getReg())) {
           for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid();
                ++AI)
             Regs.set(*AI);
@@ -191,7 +191,7 @@
         // Not a DBG_VALUE instruction. It may clobber registers which describe
         // some variables.
         for (const MachineOperand &MO : MI.operands()) {
-          if (MO.isReg() && MO.isDef() && MO.getReg()) {
+          if (MO.isReg() && MO.isDef() && TargetRegisterInfo::isPhysicalRegister(MO.getReg())) {
             // If this is a register def operand, it may end a debug value
             // range.
             for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid();
@@ -238,7 +238,7 @@
     if (!MBB.empty() && &MBB != &MF->back()) {
       for (auto I = RegVars.begin(), E = RegVars.end(); I != E;) {
         auto CurElem = I++; // CurElem can be erased below.
-        if (ChangingRegs.test(CurElem->first))
+        if (TargetRegisterInfo::isPhysicalRegister(CurElem->first) && ChangingRegs.test(CurElem->first))
           clobberRegisterUses(RegVars, CurElem, Result, MBB.back());
       }
     }
Index: lib/CodeGen/LiveIntervalAnalysis.cpp
===================================================================
--- lib/CodeGen/LiveIntervalAnalysis.cpp	(revision 270942)
+++ lib/CodeGen/LiveIntervalAnalysis.cpp	(working copy)
@@ -1320,6 +1320,8 @@
           continue;
 
         const MachineInstr &MI = *MO.getParent();
+        if (MI.isDebugValue())
+          continue;
         SlotIndex InstSlot = LIS.getSlotIndexes()->getInstructionIndex(MI);
         if (InstSlot > LastUse && InstSlot < OldIdx)
           LastUse = InstSlot.getRegSlot();
Index: lib/CodeGen/LiveRangeCalc.cpp
===================================================================
--- lib/CodeGen/LiveRangeCalc.cpp	(revision 270942)
+++ lib/CodeGen/LiveRangeCalc.cpp	(working copy)
@@ -182,6 +182,9 @@
 
     // Determine the actual place of the use.
     const MachineInstr *MI = MO.getParent();
+    if (TargetRegisterInfo::isVirtualRegister(Reg) && MI->isDebugValue())
+      continue;
+
     unsigned OpNo = (&MO - &MI->getOperand(0));
     SlotIndex UseIdx;
     if (MI->isPHI()) {
Index: lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
===================================================================
--- lib/Target/WebAssembly/WebAssemblyRegStackify.cpp	(revision 270942)
+++ lib/Target/WebAssembly/WebAssemblyRegStackify.cpp	(working copy)
@@ -258,6 +258,9 @@
       LIS.getInstructionIndex(*Def).getRegSlot());
   assert(DefVNI);
   for (auto I : MRI.use_nodbg_operands(Reg)) {
+    if (TargetRegisterInfo::isVirtualRegister(Reg) && I.getParent()->isDebugValue())
+      continue;
+    
     const auto &Result = LI.Query(LIS.getInstructionIndex(*I.getParent()));
     if (Result.valueIn() == DefVNI) {
       if (!Result.isKill())
Index: lib/Target/WebAssembly/WebAssemblyStoreResults.cpp
===================================================================
--- lib/Target/WebAssembly/WebAssemblyStoreResults.cpp	(revision 270942)
+++ lib/Target/WebAssembly/WebAssemblyStoreResults.cpp	(working copy)
@@ -98,6 +98,9 @@
     if (&MI == Where || !MDT.dominates(&MI, Where))
       continue;
 
+    if (Where->isDebugValue())
+      continue;
+
     // If this use gets a different value, skip it.
     SlotIndex WhereIdx = LIS.getInstructionIndex(*Where);
     VNInfo *WhereVNI = FromLI->getVNInfoAt(WhereIdx);

See also http://reviews.llvm.org/D21808