Yichao Yu yuyichao

## agx-coherency-and-tlbs.md

      
        
          
            
              
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                asahilina
                / agx-coherency-and-tlbs.md
            
            
              Last active
              December 17, 2023 01:01
            
          
        
      
        
  
      
    AGX coherency, caching, and TLBs

These are just some notes on my current understanding of the subtleties of the AGX memory model and the TLB/caching issues I'm seeing.
Hypervisor shenanigans

TLBI instructions do not broadcast to the GPU from EL1 with stage 2 translation enabled. That's it. That's what the bug was.
GPU side