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@zlepper
Forked from mathiasbejlegaard/PWM.asm
Last active April 12, 2016 13:09
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PWM
; Pulse width modulation
BANKSEL TRISA ; Set bank
BSF TRISA,5 ; Disable the PWMx pin output driver(s) by setting the associated TRIS bit(s)
BANKSEL PWM5CON ; Set bank
BCF PWM5CON,PWM5POL ; Configure the PWM output polarity by configuring the PWMxPOL bit of the PWMxCON register.
; Load the PR2 register with the PWM period value
BANKSEL PR2 ; Set bank
MOVLW 0x20 ; Calculated with the help of equation 18-1 on page 168
MOVWF PR2
; Load the PWMxDCH register and bits <7:6> of the PWMxDCL register with the PWM duty cycle value
; TODO Flyt MOVLW og slet, til når vi får data - Den power vi indlæser
BANKSEL PWM5DCH ; Set bank
MOVLW B'10000000' ; Beregnet ved hjælp af formel 18-2 side 168
MOVWF PWM5DCH
BANKSEL PWM5DCL ; Set bank
MOVLW B'00000000' ; Beregnet ved hjælp af formel 18-2 side 168
MOVWF PWM5DCL
; Configure and start Timer2
BANKSEL PIR1 ; Set bank
BCF PIR1,TMR2IF
; Sæt en timer prescale value til 1
BANKSEL T2CON ; Set bank
BCF T2CON,0
BCF T2CON,1
; Enable Timer2
BSF T2CON,TMR2ON
BANKSEL PIR1 ; Set bank
WAIT_ON_TIMER BTFSS PIR1,TMR2IF
GOTO WAIT_ON_TIMER
; When the TMR2IF flag bit is set:
; Clear the associated TRIS bit(s) to enable the output driver.
BANKSEL TRISA ; Set bank
BCF TRISA,5
BANKSEL PWM5CON ; Set bank
BSF PWM5CON,PWM5EN ; Enable the PWMx module
GOTO PWM
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