Created
July 22, 2022 17:45
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GCP GCE t2a-standard-4
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dave@dave-arm-dev-1:~$ lscpu | |
Architecture: aarch64 | |
CPU op-mode(s): 64-bit | |
Byte Order: Little Endian | |
CPU(s): 4 | |
On-line CPU(s) list: 0-3 | |
Vendor ID: ARM | |
Model name: Neoverse-N1 | |
Model: 1 | |
Thread(s) per core: 1 | |
Core(s) per socket: 4 | |
Socket(s): 1 | |
Stepping: r3p1 | |
BogoMIPS: 50.00 | |
Flags: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp ssbs | |
NUMA: | |
NUMA node(s): 1 | |
NUMA node0 CPU(s): 0-3 | |
Vulnerabilities: | |
Itlb multihit: Not affected | |
L1tf: Not affected | |
Mds: Not affected | |
Meltdown: Not affected | |
Mmio stale data: Not affected | |
Spec store bypass: Mitigation; Speculative Store Bypass disabled via prctl | |
Spectre v1: Mitigation; __user pointer sanitization | |
Spectre v2: Mitigation; CSV2, BHB | |
Srbds: Not affected | |
Tsx async abort: Not affected |
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