ScienceElectronicsFun

module base(){
    
    
    
    difference(){
        
    translate([0, 0, 0]) rotate([0,0,0]) cube([53, 59, 3]);
    
    translate([53/2, 32, -23.5]) rotate([0,0,0]) cylinder($fn=20, h=25, d=16.4, center=false);

ScienceElectronicsFun

/****

Code for controlling Brushless DC motor with controller
DBLS-01S via Teensy 4.1.

Uses AMT-102V motor encoder to monitor shaft.  AB signals are sent to quadrature decoder LS7084N.
Decoder signals (CLK* and UP/DOWN*) are passed through a level shifter (SN74LVC245AN) and to the Teensy.

The CLK from the decoder triggers an interrupt on the teensy to count pulses, up or down as indicated.

ScienceElectronicsFun

#include <avr/io.h>
#include <avr/interrupt.h>

const int upDown = 32;
volatile long counter = 0;
volatile long counter_buffer = 0;
volatile bool lockBuffer = false;

int ledPin = 13;

ScienceElectronicsFun

/*
 * 
 * USING CODE FROM SmartMatrix and Linked List https://github.com/ivanseidel/LinkedList
 * Modified for Matrix Falling Code effect
 * 
 * This example shows how to display bitmaps that are exported from GIMP and
 * compiled into the sketch and stored in the Teensy's Flash memory
 * See more details here:
 * http://docs.pixelmatix.com/SmartMatrix/library.html#smartmatrix-library-how-to-use-the-library-drawing-raw-bitmaps
 *

ScienceElectronicsFun

set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets klock_IBUF]


set_property -dict { PACKAGE_PIN T5   IOSTANDARD LVCMOS33 } [get_ports { klock }]; #IO_L22N_T3_AD7N_35 Sch=led0_b
set_property -dict { PACKAGE_PIN T6   IOSTANDARD LVCMOS33 } [get_ports { reset }]; #IO_L21P_T3_DQS_AD14P_35 Sch=led0_r

## port_out_00
set_property -dict { PACKAGE_PIN V2   IOSTANDARD LVCMOS33 } [get_ports { port_out_00[0] }]; #IO_L4N_T0_35 Sch=btn[0]
set_property -dict { PACKAGE_PIN V3   IOSTANDARD LVCMOS33 } [get_ports { port_out_00[1] }]; #IO_L4P_T0_35 Sch=btn[1]

ScienceElectronicsFun

`timescale 1ns / 1ps

// Code was provided by Brock J. LaMeres
// See his book "Introduction to Logic Curcuits & Logic Design with Verilog" (2nd edition)
// for more detailed discussions
//
// It was modified for Spartan7 and pared down for simplicity
// Only 3 instructions LDA, STA, and BRA to demonstrate simple program
// Only a single output port to display result

ScienceElectronicsFun

module top(
input button1,
input button2,
input button3,
input button4,
output led1,
output led2
);

assign led1 = button1 & button2 & button3 & button4;

ScienceElectronicsFun

set_property CFGBVS VCCO [current_design]
set_property CONFIG_VOLTAGE 3.3 [current_design]

set_property -dict { PACKAGE_PIN V6   IOSTANDARD LVCMOS33 } [get_ports { led1 }]; #IO_L22N_T3_AD7N_35 Sch=led0_b
set_property -dict { PACKAGE_PIN V7   IOSTANDARD LVCMOS33 } [get_ports { led2 }]; #IO_L21P_T3_DQS_AD14P_35 Sch=led0_r

set_property -dict { PACKAGE_PIN V2   IOSTANDARD LVCMOS33 } [get_ports { button1 }]; #IO_L4N_T0_35 Sch=btn[0]
set_property -dict { PACKAGE_PIN V3   IOSTANDARD LVCMOS33 } [get_ports { button2 }]; #IO_L4P_T0_35 Sch=btn[1]
set_property -dict { PACKAGE_PIN V4   IOSTANDARD LVCMOS33 } [get_ports { button3 }]; #IO_L4N_T0_35 Sch=btn[0]
set_property -dict { PACKAGE_PIN V5   IOSTANDARD LVCMOS33 } [get_ports { button4 }]; #IO_L4P_T0_35 Sch=btn[1]

ScienceElectronicsFun

set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets klock_IBUF]


set_property -dict { PACKAGE_PIN T5   IOSTANDARD LVCMOS33 } [get_ports { klock }]; #IO_L22N_T3_AD7N_35 Sch=led0_b
set_property -dict { PACKAGE_PIN T6   IOSTANDARD LVCMOS33 } [get_ports { reset }]; #IO_L21P_T3_DQS_AD14P_35 Sch=led0_r

## port_out_00
set_property -dict { PACKAGE_PIN V2   IOSTANDARD LVCMOS33 } [get_ports { port_out_00[0] }]; #IO_L4N_T0_35 Sch=btn[0]
set_property -dict { PACKAGE_PIN V3   IOSTANDARD LVCMOS33 } [get_ports { port_out_00[1] }]; #IO_L4P_T0_35 Sch=btn[1]

ScienceElectronicsFun

`timescale 1ns / 1ps

// Code was provided by Brock J. LaMeres
// See his book "Introduction to Logic Curcuits & Logic Design with Verilog" (2nd edition)
// for more detailed discussions
//
// It was modified for Spartan7 and pared down for simplicity
// Only 3 instructions LDA, STA, and BRA to demonstrate simple program
// Only a single output port to display result