blink.vhdl

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity blink is
	port (
		clk:     in  std_logic;
		buttons: in  std_logic_vector(3 downto 0);
		leds:    out std_logic_vector(3 downto 0)
	);
end blink;

architecture blink_arch of blink is
begin
	process (clk, buttons)
		variable btn_inv:  std_logic_vector(3 downto 0);
		variable counter:  natural := 0;
		variable out_temp: std_logic_vector(31 downto 0);
	begin
		btn_inv := not buttons;
		
		if clk'event and clk = '1' and btn_inv(0) = '1' then
			counter := counter + 1;
		end if;
		
		out_temp := std_logic_vector(to_unsigned(counter, out_temp'length));
		leds <= out_temp(25 downto 22);
		
	end process;
end blink_arch;