Created
December 13, 2019 20:41
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module pps2tb; | |
reg [3:0] counter; | |
reg clk; | |
reg o_led; | |
initial clk = 0; | |
always @(*) | |
clk <= #5 !clk; | |
initial counter = 0; | |
always @(posedge clk) | |
counter <= counter + 3; | |
always @(*) | |
o_led = counter[3]; | |
initial begin | |
$dumpfile("test.vcd"); | |
$dumpvars(0,pps2); | |
end | |
reg [7:0] halt_counter = 0; | |
always @(posedge clk) | |
begin | |
halt_counter <= halt_counter + 1; | |
if (halt_counter > 64) | |
begin | |
$display("All done\n"); | |
$finish; | |
end | |
end | |
endmodule | |
/* | |
We set our INCREMENT = 2^32 / CLOCK_RATE_HZ | |
There are CLOCK_RATE_HZ positive clock edges / second | |
With a little math, | |
INCREMENT * (CLOCK_RATE_HZ posedges / second) = 2^32 (units) | |
counter .... + 2^32 => counter because of rollover at integer multiples of 2^32 | |
*/ |
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