debug_stm32f4discover_2.log

$ telnet 127.0.0.1 4444
Trying 127.0.0.1...
Connected to 127.0.0.1.
Escape character is '^]'.
Open On-Chip Debugger
> reset halt
adapter speed: 2000 kHz
target halted due to debug-request, current mode: Thread 
xPSR: 0x01000000 pc: 0x080004b4 msp: 0x20000e18
> exit      
Connection closed by foreign host.
alan@pc:/comum/workspace/NuttX/nuttx/nuttx$ arm-none-eabi-gdb nuttx
GNU gdb (GNU Tools for ARM Embedded Processors) 7.12.0.20161204-git
Copyright (C) 2016 Free Software Foundation, Inc.
License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>
This is free software: you are free to change and redistribute it.
There is NO WARRANTY, to the extent permitted by law.  Type "show copying"
and "show warranty" for details.
This GDB was configured as "--host=x86_64-pc-linux-gnu --target=arm-none-eabi".
Type "show configuration" for configuration details.
For bug reporting instructions, please see:
<http://www.gnu.org/software/gdb/bugs/>.
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For help, type "help".
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Reading symbols from nuttx...done.
(gdb) target remote :3333
Remote debugging using :3333
0x080004b4 in handlers () at chip/gnu/stm32_vectors.S:464
464		ldr		r14, =EXC_RETURN_PRIVTHR	/* Load the special value */
(gdb) monitor reset halt
adapter speed: 2000 kHz
target halted due to debug-request, current mode: Thread 
xPSR: 0x01000000 pc: 0x080004b4 msp: 0x20000e18
(gdb) load
Loading section .text, size 0x176f5 lma 0x8000000
Loading section .ARM.exidx, size 0x8 lma 0x80176f8
Loading section .data, size 0xa8 lma 0x8017700
Start address 0x8000540, load size 96165
Transfer rate: 20 KB/sec, 9616 bytes/write.
(gdb) b __start
Breakpoint 1 at 0x8000546: file chip/stm32_start.c, line 255.
(gdb) step
Note: automatically using hardware breakpoints for read-only addresses.

Breakpoint 1, __start () at chip/stm32_start.c:255
255	  stm32_clockconfig();
(gdb) 
stm32_clockconfig () at chip/stm32_rcc.c:181
181	  rcc_reset();
(gdb) 
rcc_reset () at chip/stm32f40xxx_rcc.c:90
90	  regval = getreg32(STM32_RCC_CR);
(gdb) 
91	  regval |= RCC_CR_HSION;
(gdb) 
92	  putreg32(regval, STM32_RCC_CR);
(gdb) 
96	  putreg32(0x00000000, STM32_RCC_CFGR);
(gdb) 
100	  regval  = getreg32(STM32_RCC_CR);
(gdb) 
101	  regval &= ~(RCC_CR_HSEON | RCC_CR_CSSON | RCC_CR_PLLON);
(gdb) b os_start
Breakpoint 2 at 0x8001d7e: file init/os_start.c, line 380.
(gdb) c
Continuing.

Breakpoint 2, os_start () at init/os_start.c:380
380	  g_os_initstate = OSINIT_BOOT;
(gdb) step
385	  dq_init(&g_readytorun);
(gdb) 
386	  dq_init(&g_pendingtasks);
(gdb) 
387	  dq_init(&g_waitingforsemaphore);
(gdb) 
389	  dq_init(&g_waitingforsignal);
(gdb) 
392	  dq_init(&g_waitingformqnotfull);
(gdb) 
393	  dq_init(&g_waitingformqnotempty);
(gdb) 
398	  dq_init(&g_inactivetasks);
(gdb) 
404	  sq_init(&g_delayed_kufree);
(gdb) 
416	  g_lastpid = 0;
(gdb) 
417	  for (i = 0; i < CONFIG_MAX_TASKS; i++)
(gdb) 
419	      g_pidhash[i].tcb = NULL;
(gdb)