quad

Interceptors Are Functions Too

I could not agree more with my colleague and friend Travis Johnson's opinion that "[INTERCEPTORS ARE SO COOL][iasc]!" In that post, he succinctly describes the [Interceptor pattern][pattern] as used adroitly by [OkHttp][okhttp]. But, as is often the case, I believe a complicated object-oriented pattern obscures the simple functional gem within it.

What is an Interceptor?

I'll quote liberally from [OkHttp's documentation on the topic][okhttp-interceptor]:

Interceptors are a powerful mechanism that can monitor, rewrite, and retry calls. […] >

markshannon

Data structures

typedef struct {
    uint32_t ch_version;
    uint16_t ch_index;
    uint8_t ch_counter;
    uint8_t ch_oparg;
} HotPyVersionAndCounters;

merryhime

GSBASE and FSBASE

When you're running out of registers while writing a JIT, you might resort to more unconventional methods for memory access. You might choose to resort to segment registers if you need a fixed register for memory offsets.

Instructions such as:

lea    rax,gs:[rcx+rdx*8]
mov    rax,gs:[rcx+rdx*8]

would then be available for your use.

jhaberstro

http://courses.cms.caltech.edu/cs179/
http://www.amd.com/Documents/GCN_Architecture_whitepaper.pdf
https://community.arm.com/graphics/b/blog
http://cdn.imgtec.com/sdk-documentation/PowerVR+Hardware.Architecture+Overview+for+Developers.pdf
http://cdn.imgtec.com/sdk-documentation/PowerVR+Series5.Architecture+Guide+for+Developers.pdf
https://www.imgtec.com/blog/a-look-at-the-powervr-graphics-architecture-tile-based-rendering/
https://www.imgtec.com/blog/the-dr-in-tbdr-deferred-rendering-in-rogue/
http://developer.amd.com/tools-and-sdks/opencl-zone/amd-accelerated-parallel-processing-app-sdk/opencl-optimization-guide/#50401334_pgfId-412605
https://fgiesen.wordpress.com/2011/07/09/a-trip-through-the-graphics-pipeline-2011-index/
https://community.arm.com/graphics/b/documents/posts/moving-mobile-graphics#siggraph2015

pervognsen

// A round-robin priority arbiter for valid/ready signaling using carry chain logic.
module arbiter#(parameter N = 2)
(
    input   wire            clk,
    input   wire    [N-1:0] s_valid,
    output  wire    [N-1:0] s_ready,
    output  wire            m_valid,
    input   wire            m_ready
);

pervognsen

There's a nice Xilinx application note from Ken Chapman:

Multiplexer Design Techniques for Datapath Performance with Minimized Routing Resources https://www.xilinx.com/support/documentation/application_notes/xapp522-mux-design-techniques.pdf

The most intriguing part is what he calls a data selector, but which might be more descriptively termed a one-hot mux, since it's a mux where the control signals are one-hot coded:

    onehotmux(data, sel) = (data[0] & sel[0]) | ... | (data[n] & sel[n])

pervognsen

Suppose you are writing a simple one-pass compiler in the Wirth style, and you want to
target non-RISC architectures like the x86 where conditional operations use shared condition state.

Case 1:
  if (x <= y) z = w

  CMP x, y
  JGT skip
  MOV z, w
  skip:

endrift

#!/usr/bin/env python

import struct
import sys

class Instruction:
    def __init__(self, name, *args):
        self.name = name
        self.operands = args

evilactually

if (${CMAKE_HOST_SYSTEM_PROCESSOR} STREQUAL "AMD64")
  set(GLSL_VALIDATOR "$ENV{VULKAN_SDK}/Bin/glslangValidator.exe")
else()
  set(GLSL_VALIDATOR "$ENV{VULKAN_SDK}/Bin32/glslangValidator.exe")
endif()

file(GLOB_RECURSE GLSL_SOURCE_FILES
    "shaders/*.frag"
    "shaders/*.vert"
    )

vurtun

#include <stdio.h>
#include <errno.h>
#include <stdlib.h>
#include <stdint.h>
#include <assert.h>
#include <string.h>
#define streq(a, b) (!strcmp((a), (b)))

#ifndef __USE_GNU
#define __USE_GNU