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apritzel / inject_dt.sh
Created August 4, 2016 09:45
Script to recreate a DT in U-Boot via the serial console
#!/bin/sh
send() {
read -d\# line
echo "$1"
}
# kick u-boot to tickle the prompt and get the state machine going
echo "printenv bootcmd"
read line
sunxi boot monitor v0.1
Allwinner A64 SoC detected.
Booted from FEL
128Mbit SPI flash detected.
(No SD card detection yet.)
(No eMMC detection yet).
Use "help" for a list of commands.
# help
help
@apritzel
apritzel / check_xen_coding_style.sh
Created January 31, 2018 12:24
very simple Xen coding style checker (to catch Linux copy&paste artefacts)
#!/bin/sh
grep -n '^ *'$'\t' "$1" && echo "^^^ tabs"
grep -n 'if(' "$1" && echo "^^^ no space after if"
grep -n 'if ([^ ]' "$1" && echo "^^^ no space after if ("
grep -n 'while(' "$1" && echo "^^^ no space after while"
grep -n 'while ([^ ]' "$1" && echo "^^^ no space after while ("
grep -n 'for(' "$1" && echo "^^^ no space after for"
grep -n 'for ([^ ]' "$1" && echo "^^^ no space after for ("
grep -n '[ ]*[^ ].*{$' "$1" && echo "^^^ opening bracket at the end of line"
@apritzel
apritzel / sunxi-add-SPL-FEL-button.patch
Created April 5, 2018 09:06
check configurable GPIO button in SPL and go to FEL mode if low
From 48be8001e507a0bd431b4f8186a95d11ddc6ee36 Mon Sep 17 00:00:00 2001
From: Andre Przywara <andre.przywara@arm.com>
Date: Wed, 23 Nov 2016 00:35:01 +0000
Subject: [PATCH] sunxi: add SPL FEL button
Some of the newer Allwinner boards that come with SPI flash soldered
are missing an easy way to trigger the USB-OTG FEL boot mode.
On most boards without eMMC FEL mode is entered when there is no SD card
found, boards with eMMC typically feature a hardware FEL button.
Now some boards like newer boards from OrangePi have no eMMC, but have a SPI
@apritzel
apritzel / a64_arch_timer.log
Created May 26, 2018 00:04
Allwinner A64 arch timer monotonicity test
##############################
# test output mainline kernel
##############################
$ ./test_timer
TAP version 13
# number of cores: 4
ok 1 same timer frequency on all cores
# timer frequency is 24000000 Hz (24 MHz)
# time1: eb447fff, time2: eb444000, diff: -16383
# time1: eb44efff, time2: eb44e800, diff: -2047
HELLO! BOOT0 is starting!
boot0 commit : 045061a8bb2580cb3fa02e301f52a015040c158f
boot0 version : 4.0.0
set pll start
set pll end
rtc[0] value = 0x00000000
rtc[1] value = 0x00000000
rtc[2] value = 0x00000000
rtc[3] value = 0x00000000
@apritzel
apritzel / sun50i-a64-pmu.dtsi.patch
Created July 9, 2016 17:42
adding the PMU node to the A64 .dtsi
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 80b0a49..0a7865a 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -54,28 +54,28 @@
#address-cells = <1>;
#size-cells = <0>;
- cpu@0 {
+ cpu0: cpu@0 {
@apritzel
apritzel / sunxi_clk.c
Created January 8, 2019 11:35
recursive implemenation of U-Boot clock driver for Allwinner SoCs
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Amarula Solutions.
* Author: Jagan Teki <jagan@amarulasolutions.com>
*/
#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
@apritzel
apritzel / orangepi_pc2.bootlog.txt
Created November 11, 2016 02:11
Booting 4.9-rc2 on the Allwinner H5 based OrangePi PC 2 (via FEL)
U-Boot SPL 2016.11-rc3-00019-g5c2dad5-dirty (Nov 11 2016 - 01:27:06)
DRAM:DRAM BOOT DRIVE INFO: V0.6
the chip id is 0x1
the chip id is 0x1
the chip id is 0x1
the chip id is 0x1
the chip id is 0x1
DRAM CLK =672 MHZ
DRAM Type =3 (2:DDR2,3:DDR3,6:LPDDR2,7:LPDDR3)
DRAM zq value: 0x3b3bf9
@apritzel
apritzel / firmware_build.md
Created June 19, 2016 20:37
Building instructions for firmware image

Rebuilding the firmware image

The Pine64 firmware consists of four parts:

  • The on-chip boot ROM (BROM), which cannot be changed and does the very first steps in loading code. It is part of the A64 SoC and thus not included here.
  • A secondary program loader (SPL): Its main task is to initialize the DRAM and load the remaining firmware parts. Due to BROM limitations the SPL is limited in size to 32K. The SPL can be a part of U-Boot, but at the moment we lack free source for the DRAM initialization. The alternative is to use Allwinner's boot0, which is a closed source, but redistributable blob serving the same purpose.
  • An EL3 runtime firmware. The task of this code is to provide runtime services like PSCI. It stays resident during the whole time and can be called from an OS like Linux to enable or disable secondary cores or request other services. It also takes care of low level CPU initialization and some errata handling. We use a version of ARM Trusted Firmware, based on the official 1.0 release from