brianredbeard

[bharrington@host10 media]$ pvcreate /dev/md0 
  WARNING: Running as a non-root user. Functionality may be unavailable.
  /run/lvm/lvmetad.socket: access failed: Permission denied
  WARNING: Failed to connect to lvmetad. Falling back to device scanning.
  /run/lock/lvm/P_orphans:aux: open failed: Permission denied
  Can't get lock for orphan PVs.
[bharrington@host10 media]$ sudo pvcreate /dev/md0 
  Physical volume "/dev/md0" successfully created.
[bharrington@host10 media]$ sudo pvcreate /dev/nvme0n1p2 
  Physical volume "/dev/nvme0n1p2" successfully created.

brianredbeard

### Current Directory Structure (micropython submodule pruned)
❯ tree --gitignore
.
├── CMakeLists.txt
├── components
│   └── micropython
├── main
│   ├── CMakeLists.txt
│   ├── idf_component.yml
│   └── mp-test.c

brianredbeard

❯ picocom -b 115200 /dev/ttyUSB0
picocom v3.1

port is        : /dev/ttyUSB0
flowcontrol    : none
baudrate is    : 115200
parity is      : none
databits are   : 8
stopbits are   : 1
escape is      : C-a

brianredbeard

>>> Explain how the vector extension for RISC-V works.  Provide definitions of key concepts and components, how it works, and it's benefits.                                                                  [S][default]

╭─────────────────────────────────────────────────────────────────────────────────────────────── merlinite-7b-lab-Q4_K_M ────────────────────────────────────────────────────────────────────────────────────────────────╮
│ The vector extension for RISC-V is an enhancement to the RISC-V Instruction Set Architecture (ISA) that allows multiple operations to be performed on multiple data elements in parallel, thereby increasing the       │
│ throughput of calculations and improving performance in data-intensive applications. This extension introduces new vector registers, vector instructions, and data alignment concepts to optimize the processing of    │
│ vector data.