gistfile1.c

#include <avr/io.h>
#include <avr/interrupt.h>

void init_clock(void);
void init_io(void);
void init_timers(void);
void load_addr(uint8_t addr);
uint8_t read(void);
void chip_enable(void);
void chip_disable(void);
void write_enable(void);
void write_disable(void);
void timer0_wait(void);
void timer2_wait(void);

int main(void) {
	volatile uint8_t addrdata = 0b00000001;
	init_clock();
	init_io();
	init_timers();
	load_addr(addrdata);
	chip_enable();
	timer2_wait();
	//write_enable();
	timer2_wait();
	//write_disable();
	volatile uint8_t readdata = read();
	chip_disable();
	while (1) {
		uint8_t i = 0;
		for (i = 0; i < 4; i++) {
			if (readdata & (1 << i)) {
				PORTB |= (1 << 0);
			} else {
				PORTB &= ~(1 << 0);
			}
			timer0_wait();
			PORTB &= ~(1 << 0);
			timer0_wait();
		}
		OCR0A = 255;
		timer0_wait();
		OCR0A = 50;
	}
}

void init_clock(void) {
	cli();
	CLKPR = (1 << CLKPCE);
	CLKPR = (1 << CLKPS1) | (1 << CLKPS0); // /8 divider
	sei();
}

void init_io(void) {
	DDRD = 0b11111111; //portd 0-3 address 4-7 data out
	PORTD = 0;
	DDRC = 0b00110000; //portd 0-3 data in 4 cs 5 we
	PORTC = 0b00111111; //cs we high, pullups
	DDRB |= (1 << 0); //data output
	PORTB &= ~(1 << 0);
}

void init_timers(void) {
	TCCR2A |= (1 << WGM21); //initialize timer2 (setup delay)
	OCR0A = 1;
	TCCR2B |= (1 << CS20); 
	TCCR0A |= (1 << WGM01); //initialize timer0 (output delay)
	OCR0A = 50;
	TCCR0B |= (1 << CS00);
}

void load_addr(uint8_t addr) {
	PORTD = addr;
}

uint8_t read(void) {
	volatile uint8_t data = 0;
	data = ~(PINC & 0b00001111);
	return data;
}

void chip_enable(void) {
	PORTC &= ~(1 << 4);
}

void chip_disable(void) {
	PORTC |= (1 << 4);
}
void write_enable(void) {
	PORTC &= ~(1 << 5);
}

void write_disable(void) {
	PORTC |= (1 << 5);
}

void timer0_wait(void) {
	while (!(TIFR0 & (1 << OCF0A))) {};
	TIFR0 = (1 << OCF0A);
}

void timer2_wait(void) {
	while (!(TIFR2 & (1 << OCF2A))) {};
	TIFR2 = (1 << OCF2A);
}