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cbalint13 / litepcie_opt_rom.py
Created December 14, 2022 23:02 — forked from jevinskie/litepcie_opt_rom.py
I have a lazy friend wildcard who needs help creating his FPGA design. Implement a PCIe device with an option rom by using the LiteX Python framework.
from litex.build.generic_platform import *
from litex.build.xilinx import XilinxPlatform
# Create the platform object
platform = XilinxPlatform("my_platform")
# Add the PCIe device to the platform
platform.add_extension([
("pcie_phy", 0,
Subsignal("rst_n", Pins("")),
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cbalint13 / feature.md
Created August 5, 2020 17:46 — forked from merrymercy/feature.md
Feature description for autotvm

Features

Loop-based Feature

For an IterVar (or an axis), it has three kinds of features

  • axis attribute
  • arithmetic feature
  • touch feature

Axis Attribute