Created
January 11, 2018 20:35
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A chisel GCD circuit example
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circuit GCD : | |
module GCD : | |
input clock : Clock | |
input reset : UInt<1> | |
output io : {flip a : UInt<16>, flip b : UInt<16>, flip e : UInt<1>, z : UInt<16>, v : UInt<1>} | |
reg x : UInt, clock @[GCD.scala 15:15] | |
reg y : UInt, clock @[GCD.scala 16:15] | |
node _T_9 = gt(x, y) @[GCD.scala 18:11] | |
when _T_9 : @[GCD.scala 18:16] | |
node _T_10 = sub(x, y) @[GCD.scala 18:25] | |
node _T_11 = asUInt(_T_10) @[GCD.scala 18:25] | |
node _T_12 = tail(_T_11, 1) @[GCD.scala 18:25] | |
x <= _T_12 @[GCD.scala 18:20] | |
skip @[GCD.scala 18:16] | |
else : @[GCD.scala 19:16] | |
node _T_13 = sub(y, x) @[GCD.scala 19:25] | |
node _T_14 = asUInt(_T_13) @[GCD.scala 19:25] | |
node _T_15 = tail(_T_14, 1) @[GCD.scala 19:25] | |
y <= _T_15 @[GCD.scala 19:20] | |
skip @[GCD.scala 19:16] | |
when io.e : @[GCD.scala 21:15] | |
x <= io.a @[GCD.scala 21:19] | |
y <= io.b @[GCD.scala 21:30] | |
skip @[GCD.scala 21:15] | |
io.z <= x @[GCD.scala 22:8] | |
node _T_17 = eq(y, UInt<1>("h00")) @[GCD.scala 23:13] | |
io.v <= _T_17 @[GCD.scala 23:8] |
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