Vivado HLS AXI master read burst

simple_dma.cpp

#include "simple_dma.hpp"

void simpleDma(const InputData* input, hls::stream<OutputStreamData>& outputStream, AddressOffset offset, TransferCount transferCount)
{
#pragma HLS INTERFACE s_axilite port=transferCount bundle=control
#pragma HLS INTERFACE s_axilite port=offset bundle=control
#pragma HLS INTERFACE s_axilite port=return bundle=control
#pragma HLS INTERFACE m_axi depth=TestDataCount port=input offset=off
#pragma HLS INTERFACE axis port=outputStream

	for(size_t index = 0; index < transferCount; ++index) {
#pragma HLS PIPELINE ii=1
		OutputStreamData outputData;
		outputData.data = input[offset + index];
		outputData.user = index == 0 ? 1 : 0;
		outputData.last = index == transferCount-1 ? 1  : 0;
		outputStream.write(outputData);
	}
}