ciniml

 $ edid-decode /sys/class/drm/card1-HDMI-A-2/edid
edid-decode (hex):

00 ff ff ff ff ff ff 00 67 13 66 66 00 00 00 00
1e 20 01 04 82 00 00 78 ee de 50 a3 54 4c 99 26
0f 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 e4 10 90 82 10 00 50 50 32 1e
e4 05 0a c0 00 00 00 18 e4 10 90 82 10 00 50 50
32 1e e4 05 0a c0 00 00 00 18 e4 10 90 82 10 00
50 50 32 1e e4 05 0a c0 00 00 00 18 00 00 00 fc

ciniml

import time
import serial
import struct
from typing import Tuple

s = serial.Serial('COM19', 1000000)
def read_packet(servo_id: int, reg_address: int, reg_length: int) -> Tuple[bytes, int]:
    packet = [0xff, 0xff, servo_id, 0x04, 0x02, reg_address, reg_length]
    packet.append(0xff - (sum(packet[2:]) & 0xff))  # checksum
    response_length = 2 + 1 + 1 + 1 + reg_length + 1 # header, servo_id, packet_length, command, content, checksum

ciniml

名称	ピン	信号名	TN9K	FPGAピン
TX1	1	rmii_txd[1]	J5 1	38
NC	2
TX-EN	3	rmii_txen	J5 2	37
TX0	4	rmii_txd[0]	J5 3	36
RX0	5	rmii_rxd[0]	J5 4	39
RX1	6	rmii_rxd[1]	J5 5	25
REFCLK	7	rmii_txclk	J5 6	26
CRS	8	rmii_crs_dv	J5 7	27

ciniml

SUBSYSTEMS=="usb", ATTRS{idVendor}=="33aa", ATTRS{idProduct}=="0120", GROUP="plugdev", MODE="0660"

ciniml

static constexpr const unsigned char fs_bitstream_rle[] = {
  0x16, 0xff, 0x00, 0x03, 0xa5, 0xc3, 0x06, 0x03, 0x00, 0x00, 0x05, 0x11, 0x00, 0x48, 0x1b, 0x10,
  0x07, 0x00, 0x00, 0x02, 0x51, 0x00, 0x06, 0xff, 0x01, 0x0b, 0x03, 0x00, 0x00, 0x02, 0xd2, 0x00,
  0x02, 0xff, 0x04, 0x00, 0x01, 0x12, 0x03, 0x00, 0x00, 0x05, 0x3b, 0x80, 0x04, 0xc8, 0xf0, 0x1a,
  0x00, 0x00, 0x05, 0xc0, 0x34, 0x10, 0x00, 0x80, 0x12, 0x00, 0x00, 0x02, 0x03, 0x01, 0x05, 0x00,
  0x00, 0x05, 0xc0, 0x34, 0x10, 0x00, 0x80, 0x02, 0x00, 0x00, 0x03, 0x14, 0x03, 0x01, 0x1c, 0x00,
  0x00, 0x04, 0x03, 0x41, 0x00, 0x08, 0x13, 0x00, 0x00, 0x04, 0x34, 0x10, 0x00, 0x80, 0x02, 0x00,
  0x00, 0x05, 0x0c, 0x03, 0x41, 0x00, 0x08, 0x13, 0x00, 0x00, 0x04, 0x34, 0x10, 0x00, 0x80, 0x03,
  0x00, 0x00, 0x04, 0x03, 0x41, 0x00, 0x08, 0x04, 0x00, 0x00, 0x04, 0x34, 0x10, 0x00, 0x80, 0x19,
  0x00, 0x01, 0xc0, 0x06, 0x00, 0x01, 0x0c, 0x16, 0x00, 0x00, 0x05, 0xc0, 0x34, 0x10, 0x00, 0x80,

ciniml

#!/usr/bin/env python3
import svgwrite

pin_type_colors = {
    'gnd': (0x000000, 0xffffff),
    '3v3': (0xc00000, 0xffffff),
    '5v':  (0xc00000, 0xffffff),
    'bat': (0xc0c000, 0x000000),
    'hpwr': (0xc0a000, 0x000000),
    'i2c': (0x003000, 0x000000),

ciniml

from board import *
from busio import I2C
import struct
import time

i2c = I2C(GP21, GP20)
i2c.try_lock()

vm_address = 0x49
cm_address = 0x48

ciniml

#include <M5EPD.h>
#include <Free_Fonts.h>

#include <WiFi.h>
#include <lwip/sockets.h>
#include <lwip/netdb.h>
#include <cstdio>
#include <cstdlib>
#include <cstdint>
#include <cstring>

ciniml

#include <wiring_private.h>

#define PIN_BLE_SERIAL_X_RX (84ul)
#define PIN_BLE_SERIAL_X_TX (85ul)
#define PAD_BLE_SERIAL_X_RX (SERCOM_RX_PAD_2)
#define PAD_BLE_SERIAL_X_TX (UART_TX_PAD_0)
#define SERCOM_BLE_SERIAL_X sercom0

static Uart rtl_uart(&SERCOM_BLE_SERIAL_X, PIN_BLE_SERIAL_X_RX, PIN_BLE_SERIAL_X_TX, PAD_BLE_SERIAL_X_RX, PAD_BLE_SERIAL_X_TX);

ciniml

/dts-v1/;
/ {
    fragment@0 {
        target-path = "/fpga-full";
        __overlay__ {
            firmware-name = "fpga.bin";
        };
    };
};