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Latency numbers every programmer should know

L1 cache reference ......................... 0.5 ns
Branch mispredict ............................ 5 ns
L2 cache reference ........................... 7 ns
Mutex lock/unlock ........................... 25 ns
Main memory reference ...................... 100 ns             
Compress 1K bytes with Zippy ............. 3,000 ns  =   3 µs
Send 2K bytes over 1 Gbps network ....... 20,000 ns  =  20 µs
SSD random read ........................ 150,000 ns  = 150 µs
Read 1 MB sequentially from memory ..... 250,000 ns  = 250 µs
Round trip within same datacenter ...... 500,000 ns  = 0.5 ms
Read 1 MB sequentially from SSD* ..... 1,000,000 ns  =   1 ms
Disk seek ........................... 10,000,000 ns  =  10 ms
Read 1 MB sequentially from disk .... 20,000,000 ns  =  20 ms
Send packet CA->Netherlands->CA .... 150,000,000 ns  = 150 ms

Assuming ~1GB/sec SSD

Visual representation of latencies

Visual chart provided by ayshen

Data by Jeff Dean

Originally by Peter Norvig

Lets multiply all these durations by a billion:

Magnitudes:

Minute:

L1 cache reference                  0.5 s         One heart beat (0.5 s)
Branch mispredict                   5 s           Yawn
L2 cache reference                  7 s           Long yawn
Mutex lock/unlock                   25 s          Making a coffee

Hour:

Main memory reference               100 s         Brushing your teeth
Compress 1K bytes with Zippy        50 min        One episode of a TV show (including ad breaks)

Day:

Send 2K bytes over 1 Gbps network   5.5 hr        From lunch to end of work day

Week

SSD random read                     1.7 days      A normal weekend
Read 1 MB sequentially from memory  2.9 days      A long weekend
Round trip within same datacenter   5.8 days      A medium vacation
Read 1 MB sequentially from SSD    11.6 days      Waiting for almost 2 weeks for a delivery

Year

Disk seek                           16.5 weeks    A semester in university
Read 1 MB sequentially from disk    7.8 months    Almost producing a new human being
The above 2 together                1 year

Decade

Send packet CA->Netherlands->CA     4.8 years     Average time it takes to complete a bachelor's degree

Latency numbers from Systems Performance book Scaled

CPU cycle .................................... 0.3 ns                 1 s
L1 cache reference ........................... 0.9 ns                 3 s
L2 cache reference ........................... 2.8 ns                 9 s
L3 cache reference .......................... 12.9 ns                43 s
Main memory access (DRAM, from CPU) .......... 120 ns                 6 min
SSD I/O (flash memory) .................... 50-150 µs               2-6 days
Rotational disk I/O ......................... 1-10 ms              1-12 months
Internet : San Francisco to New York ...........40 ms                 4 years
Internet : San Francisco to United Kingdom .... 81 ms                 8 years
Internet : San Francisco to Australia ........ 183 ms                19 years
TCP packet retransmit ........................ 1-3 s            105-317 years
OS virtualization system reboot ................ 4 s                423 years
SCSI command time-out ......................... 30 s                  3 millennia
Hardware virtualization system reboot ......... 40 s                  4 millennia
Physical system reboot ......................... 5 min               32 millennia

Assuming 3.3GHz CPU, ~1GB/sec SSD

Data by Brendan Gregg | Systems Performance book via @rzezeski

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