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cyring/gist:f15646816a47a04f8b8f9c3a4cada24c

Created August 3, 2022 09:44
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i9-12900K
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12th Gen Intel(R) Core(TM) i9-12900K
@cyring
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cyring commented Aug 3, 2022 •
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Thanks @rushvora

Processor                                 [12th Gen Intel(R) Core(TM) i9-12900K]
|- Architecture                                                     [Alder Lake]
|- Vendor ID                                                      [GenuineIntel]
|- Microcode                                                        [0x00000026]
|- Signature                                                           [  06_97]
|- Stepping                                                            [      2]
|- Online CPU                                                          [ 24/ 24]
|- Base Clock                                                          [ 99.598]
|- Frequency            (MHz)                      Ratio                        
                 Min    796.79                    <   8 >                       
                 Max   3187.14                    <  32 >                       
|- Factory                                                             [100.000]
                       3200                       [  32 ]                       
|- Performance                                                                  
   |- P-State                                                                   
                 TGT   1095.58                    <  11 >                       
   |- HWP                                                                       
                 Min   1095.58                    <  11 >                       
                 Max   6473.89                    <  65 >                       
                 TGT      AUTO                    <   0 >                       
|- Turbo Boost                                                         [ UNLOCK]
                  1C   5179.11                    <  52 >                       
                  2C   5079.51                    <  51 >                       
                  3C   4979.91                    <  50 >                       
                  4C   4979.91                    <  50 >                       
                  5C   4880.32                    <  49 >                       
                  6C   4880.32                    <  49 >                       
                  7C   4880.32                    <  49 >                       
                  8C   4880.32                    <  49 >                       
|- Hybrid                                                              [ UNLOCK]
                  1C   3884.36                    <  39 >                       
                  2C   3884.36                    <  39 >                       
                  3C   3884.36                    <  39 >                       
                  4C   3884.36                    <  39 >                       
                  5C   3685.17                    <  37 >                       
                  6C   3685.17                    <  37 >                       
                  7C   3685.17                    <  37 >                       
                  8C   3685.17                    <  37 >                       
|- Uncore                                                              [ UNLOCK]
                 Min    796.79                    <   8 >                       
                 Max   5179.15                    <  52 >                       
|- TDP                                                           Level [  0:3  ]
   |- Programmable                                                     [ UNLOCK]
   |- Configuration                                                    [   LOCK]
   |- Turbo Activation                                                 [ UNLOCK]
             Nominal   3187.14                    [  32 ]                       
               Turbo      AUTO                    <   0 >                       
                                                                                
Instruction Set Extensions                                                      
|- 3DNow!/Ext [N/N]          ADX [Y]          AES [Y]  AVX/AVX2 [Y/Y] 
|- AVX512-F     [N]    AVX512-DQ [N]  AVX512-IFMA [N]   AVX512-PF [N] 
|- AVX512-ER    [N]    AVX512-CD [N]    AVX512-BW [N]   AVX512-VL [N] 
|- AVX512-VBMI  [N] AVX512-VBMI2 [N]  AVX512-VNNI [N]  AVX512-ALG [N] 
|- AVX512-VPOP  [N] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N] 
|- AVX512-BF16  [N] AVX-VNNI-VEX [Y]      MOVDIRI [Y]   MOVDIR64B [Y] 
|- BMI1/BMI2  [Y/Y]         CLWB [Y]      CLFLUSH [Y] CLFLUSH-OPT [Y] 
|- CLAC-STAC    [Y]         CMOV [Y]    CMPXCHG8B [Y]  CMPXCHG16B [Y] 
|- F16C         [Y]          FPU [Y]         FXSR [Y]   LAHF-SAHF [Y] 
|- ENQCMD       [N]         GFNI [Y]        OSPKE [Y]     WAITPKG [Y] 
|- MMX/Ext    [Y/N] MON/MWAITX [Y/N]        MOVBE [Y]   PCLMULQDQ [Y] 
|- POPCNT       [Y]       RDRAND [Y]       RDSEED [Y]      RDTSCP [Y] 
|- SEP          [Y]          SHA [Y]          SSE [Y]        SSE2 [Y] 
|- SSE3         [Y]        SSSE3 [Y]  SSE4.1/4A [Y/N]      SSE4.2 [Y] 
|- SERIALIZE    [Y]      SYSCALL [Y]        RDPID [Y]         SGX [N] 
|- VAES         [Y]   VPCLMULQDQ [Y]   PREFETCH/W [Y]       LZCNT [Y] 
                                                                                
Features                                                                        
|- 1 GB Pages Support                                      1GB-PAGES   [Capable]
|- Advanced Configuration & Power Interface                     ACPI   [Capable]
|- Advanced Programmable Interrupt Controller                   APIC   [Capable]
|- APIC Timer Invariance                                        ARAT   [Capable]
|- Core Multi-Processing                                  CMP Legacy   [Missing]
|- L1 Data Cache Context ID                                  CNXT-ID   [Missing]
|- Direct Cache Access                                           DCA   [Missing]
|- Debugging Extension                                            DE   [Capable]
|- Debug Store & Precise Event Based Sampling               DS, PEBS   [Capable]
|- CPL Qualified Debug Store                                  DS-CPL   [Capable]
|- 64-Bit Debug Store                                         DTES64   [Capable]
|- Fast Short REP CMPSB                                         FSRC   [Missing]
|- Fast Short REP MOVSB                                         FSRM   [Capable]
|- Fast Short REP STOSB                                         FSRS   [Capable]
|- Fast Zero-length REP MOVSB                                   FZRM   [Missing]
|- Fast-String Operation                                        ERMS   [Capable]
|- Fused Multiply Add                                     FMA | FMA4   [Capable]
|- Hardware Feedback Interface                                   HFI   [Capable]
|- Hardware Lock Elision                                         HLE   [Missing]
|- History Reset                                              HRESET   [Capable]
|- Hybrid part processor                                      HYBRID   [Capable]
|- Instruction Based Sampling                                    IBS   [Missing]
|- Instruction INVPCID                                       INVPCID   [Capable]
|- Long Mode 64 bits                                       IA64 | LM   [Capable]
|- Linear Address Masking                                        LAM   [Missing]
|- LightWeight Profiling                                         LWP   [Missing]
|- Machine-Check Architecture                                    MCA   [Capable]
|- Memory Protection Extensions                                  MPX   [Missing]
|- Model Specific Registers                                      MSR   [Capable]
|- Memory Type Range Registers                                  MTRR   [Capable]
|- OS-Enabled Ext. State Management                          OSXSAVE   [Capable]
|- Physical Address Extension                                    PAE   [Capable]
|- Page Attribute Table                                          PAT   [Capable]
|- Pending Break Enable                                          PBE   [Capable]
|- Platform Configuration                                    PCONFIG   [Capable]
|- Process Context Identifiers                                  PCID   [Capable]
|- Perfmon and Debug Capability                                 PDCM   [Capable]
|- Page Global Enable                                            PGE   [Capable]
|- Page Size Extension                                           PSE   [Capable]
|- 36-bit Page Size Extension                                  PSE36   [Capable]
|- Processor Serial Number                                       PSN   [Missing]
|- Write Data to a Processor Trace Packet                    PTWRITE   [Capable]
|- Resource Director Technology/PQE                            RDT-A   [Missing]
|- Resource Director Technology/PQM                            RDT-M   [Missing]
|- Restricted Transactional Memory                               RTM   [Missing]
|- Safer Mode Extensions                                         SMX   [Capable]
|- Self-Snoop                                                     SS   [Capable]
|- Supervisor-Mode Access Prevention                            SMAP   [Capable]
|- Supervisor-Mode Execution Prevention                         SMEP   [Capable]
|- Thread Director                                                TD   [Capable]
|- Time Stamp Counter                                            TSC [Invariant]
|- Time Stamp Counter Deadline                          TSC-DEADLINE   [Capable]
|- TSX Force Abort MSR Register                            TSX-ABORT   [Missing]
|- TSX Suspend Load Address Tracking                       TSX-LDTRK   [Missing]
|- User-Mode Instruction Prevention                             UMIP   [Capable]
|- Virtual Mode Extension                                        VME   [Capable]
|- Virtual Machine Extensions                                    VMX   [Capable]
|- Write Back & Do Not Invalidate Cache                     WBNOINVD   [Missing]
|- Extended xAPIC Support                                     x2APIC   [ x2APIC]
|- Execution Disable Bit Support                              XD-Bit   [Capable]
|- XSAVE/XSTOR States                                          XSAVE   [Capable]
|- xTPR Update Control                                          xTPR   [Capable]
Mitigation mechanisms                                                           
|- Indirect Branch Restricted Speculation                       IBRS   [ Enable]
|- Indirect Branch Prediction Barrier                           IBPB   [Capable]
|- Single Thread Indirect Branch Predictor                     STIBP   [Capable]
|- Speculative Store Bypass Disable                             SSBD   [Capable]
|- Writeback & invalidate the L1 data cache                L1D-FLUSH   [Capable]
|- Hypervisor - No flush L1D on VM entry            L1DFL_VMENTRY_NO   [ Enable]
|- Arch - Buffer Overwriting                                MD-CLEAR   [Capable]
|- Arch - No Rogue Data Cache Load                           RDCL_NO   [ Enable]
|- Arch - Enhanced IBRS                                     IBRS_ALL   [ Enable]
|- Arch - Return Stack Buffer Alternate                         RSBA   [Capable]
|- Arch - No Speculative Store Bypass                         SSB_NO   [Capable]
|- Arch - No Microarchitectural Data Sampling                 MDS_NO   [ Enable]
|- Arch - No TSX Asynchronous Abort                           TAA_NO   [ Enable]
|- Arch - No Page Size Change MCE                     PSCHANGE_MC_NO   [ Enable]
|- Arch - STLB QoS                                              STLB   [ Enable]
|- Arch - Functional Safety Island                              FuSa   [ Enable]
|- Arch - RSM in CPL0 only                                       RSM   [ Enable]
|- Arch - Split Locked Access Exception                         SPLA   [ Enable]
|- Arch - Snoop Filter QoS Mask                         SNOOP_FILTER   [ Enable]
|- Arch - No Fast Predictive Store Forwarding                   PSFD   [Capable]
|- Arch - Data Operand Independent Timing Mode                 DOITM   [Capable]
|- Arch - Not affected by SBDR or SSDP                  SBDR_SSDP_NO   [ Enable]
|- Arch - No Fill Buffer Stale Data Propagator              FBSDP_NO   [ Enable]
|- Arch - No Primary Stale Data Propagator                   PSDP_NO   [ Enable]
|- Arch - Overwrite Fill Buffer values                      FB_CLEAR   [Capable]
|- Arch - Special Register Buffer Data Sampling                SRBDS   [ Unable]
   |- RDRAND and RDSEED mitigation                             RNGDS   [ Unable]
   |- Restricted Transactional Memory                            RTM   [ Unable]
   |- Verify Segment for Writing instruction                    VERW   [ Unable]
|- Arch - Restricted RSB Alternate                             RRSBA   [ Enable]
|- Arch - No Branch Target Injection                          BHI_NO   [Capable]
|- Arch - Legacy xAPIC Disable                             XAPIC_DIS   [ Unable]
|- Arch - No Post-Barrier Return Stack Buffer               PBRSB_NO   [Capable]
|- Arch - IPRED disabled for CPL3                        IPRED_DIS_U   [Capable]
|- Arch - IPRED disabled for CPL0/1/2                    IPRED_DIS_S   [Capable]
|- Arch - RRSBA disabled for CPL3                        RRSBA_DIS_U   [Capable]
|- Arch - RRSBA disabled for CPL0/1/2                    RRSBA_DIS_S   [Capable]
|- Arch - BHI disabled for CPL0/1/2                        BHI_DIS_S   [Capable]
|- No MXCSR Configuration Dependent Timing                   MCDT_NO   [ Unable]
Security Features                                                               
|- CPUID Key Locker                                               KL   [Capable]
|- AES Key Locker instructions                                AESKLE   [Missing]
|- AES Wide Key Locker instructions                          WIDE_KL   [Capable]
|- Software Guard SGX1 Extensions                               SGX1   [Missing]
|- Software Guard SGX2 Extensions                               SGX2   [Missing]
                                                                                
Technologies                                                                    
|- Data Cache Unit                                                              
   |- L1 Prefetcher                                                L1 HW   < ON>
   |- L1 IP Prefetcher                                          L1 HW IP   < ON>
   |- L2 Prefetcher                                                L2 HW   < ON>
   |- L2 Line Prefetcher                                        L2 HW CL   < ON>
|- System Management Mode                                       SMM-Dual   [ ON]
|- Hyper-Threading                                                   HTT   [ ON]
|- SpeedStep                                                        EIST   < ON>
|- Dynamic Acceleration                                              IDA   [ ON]
|- Turbo Boost Max 3.0                                             TURBO   < ON>
|- Energy Efficiency Optimization                                    EEO   <OFF>
|- Race To Halt Optimization                                         R2H   <OFF>
|- Watchdog Timer                                                    TCO   <OFF>
|- Virtualization                                                    VMX   [ ON]
   |- I/O MMU                                                       VT-d   [ ON]
   |- Version                                                     [         4.0]
   |- Hypervisor                                                           [OFF]
   |- Vendor ID                                                   [         N/A]
                                                                                
Performance Monitoring                                                          
|- Version                                                        PM       [  5]
|- Counters:          General                   Fixed                           
|           {  6,  0,  0 } x 48 bits            3 x 48 bits                     
|- Enhanced Halt State                                           C1E       < ON>
|- C1 Auto Demotion                                              C1A       < ON>
|- C3 Auto Demotion                                              C3A       <OFF>
|- C1 UnDemotion                                                 C1U       < ON>
|- C3 UnDemotion                                                 C3U       <OFF>
|- C6 Core Demotion                                              CC6       <OFF>
|- C6 Module Demotion                                            MC6       <OFF>
|- Legacy Frequency ID control                                   FID       [OFF]
|- Legacy Voltage ID control                                     VID       [OFF]
|- P-State Hardware Coordination Feedback                MPERF/APERF       [ ON]
|- Hardware Duty Cycling                                         HDC       [OFF]
|- Package C-States                                                             
   |- Configuration Control                                   CONFIG   [   LOCK]
   |- Lowest C-State                                           LIMIT   <     C0>
   |- I/O MWAIT Redirection                                  IOMWAIT   <Disable>
   |- Max C-State Inclusion                                    RANGE   <     C1>
|- Core C-States                                                                
   |- C-States Base Address                                      BAR   [ 0x1814]
|- ACPI Processor C-States                                      _CST   [      2]
|- MONITOR/MWAIT                                                                
   |- State index:    #0    #1    #2    #3    #4    #5    #6    #7              
   |- Sub C-State:     0     2     0     2     0     1     0     1              
|- Core Cycles                                                         [Capable]
|- Instructions Retired                                                [Capable]
|- Reference Cycles                                                    [Capable]
|- Last Level Cache References                                         [Capable]
|- Last Level Cache Misses                                             [Capable]
|- Branch Instructions Retired                                         [Capable]
|- Branch Mispredicts Retired                                          [Capable]
|- Top-down slots Counter                                              [Capable]
|- Processor Performance Control                                _PCT   [ Enable]
|- Performance Supported States                                 _PSS   [      0]
|- Performance Present Capabilities                             _PPC   [      0]
                                                                                
Power, Current & Thermal                                                        
|- Temperature Offset:Junction                                 TjMax <  0:100 C>
|- Clock Modulation                                             ODCM   <Disable>
   |- DutyCycle                                                        [  0.00%]
|- Power Management                                         PWR MGMT   [   LOCK]
   |- Energy Policy                                        Bias Hint   [      0]
   |- Energy Policy                                          HWP EPP   <    128>
|- Digital Thermal Sensor                                        DTS   [Capable]
|- Power Limit Notification                                      PLN   [Capable]
|- Package Thermal Management                                    PTM   [Capable]
|- Thermal Monitor 1                                             TM1   [ Enable]
|- Thermal Monitor 2                                             TM2   [Capable]
|- Thermal Design Power                                          TDP   [  125 W]
   |- Minimum Power                                              Min   [Missing]
   |- Maximum Power                                              Max   [Missing]
|- Thermal Design Power                                      Package   < Enable>
   |- Power Limit                                                PL1   < 4095 W>
   |- Time Window                                                TW1   <   56 s>
   |- Power Limit                                                PL2   < 4095 W>
   |- Time Window                                                TW2   <   2 ms>
|- Thermal Design Power                                         Core   <Disable>
   |- Power Limit                                                PL1   <    0 W>
   |- Time Window                                                TW1   < 976 us>
|- Thermal Design Power                                       Uncore   <Disable>
   |- Power Limit                                                PL1   <    0 W>
   |- Time Window                                                TW1   < 976 us>
|- Thermal Design Power                                         DRAM   <Disable>
   |- Power Limit                                                PL1   <    0 W>
   |- Time Window                                                TW1   < 976 us>
|- Thermal Design Power                                     Platform   <Disable>
   |- Power Limit                                                PL1   <    0 W>
   |- Time Window                                                TW1   <   28 s>
   |- Power Limit                                                PL2   <    0 W>
   |- Time Window                                                TW2   < 976 us>
|- Electrical Design Current                                     EDC   [Missing]
|- Thermal Design Current                                        TDC   [Missing]
|- Core Thermal Point                                                           
   |- DTS Threshold #1                                     Threshold   [Missing]
   |- DTS Threshold #2                                     Threshold   [Missing]
|- Package Thermal Point                                                        
   |- DTS Threshold #1                                     Threshold   [Missing]
   |- DTS Threshold #2                                     Threshold   [Missing]
|- Units                                                                        
   |- Power                                               watt   [  0.125000000]
   |- Energy                                             joule   [  0.000061035]
   |- Window                                            second   [  0.000976562]

CPU Pkg  Apic  Core/Thread  Caches      (w)rite-Back (i)nclusive              
 #   ID   ID  Hybrid ID/ID L1-Inst Way  L1-Data Way      L2  Way      L3  Way 
000:BSP    0  P   1   0  0   32768  8     49152 12   1310720 10  31457280 12  
001:  0    1  P   1   0  1   32768  8     49152 12   1310720 10  31457280 12  
002:  0    8  P   1   4  0   32768  8     49152 12   1310720 10  31457280 12  
003:  0    9  P   1   4  1   32768  8     49152 12   1310720 10  31457280 12  
004:  0   16  P   1   8  0   32768  8     49152 12   1310720 10  31457280 12  
005:  0   17  P   1   8  1   32768  8     49152 12   1310720 10  31457280 12  
006:  0   24  P   1  12  0   32768  8     49152 12   1310720 10  31457280 12  
007:  0   25  P   1  12  1   32768  8     49152 12   1310720 10  31457280 12  
008:  0   32  P   1  16  0   32768  8     49152 12   1310720 10  31457280 12  
009:  0   33  P   1  16  1   32768  8     49152 12   1310720 10  31457280 12  
010:  0   40  P   1  20  0   32768  8     49152 12   1310720 10  31457280 12  
011:  0   41  P   1  20  1   32768  8     49152 12   1310720 10  31457280 12  
012:  0   48  P   1  24  0   32768  8     49152 12   1310720 10  31457280 12  
013:  0   49  P   1  24  1   32768  8     49152 12   1310720 10  31457280 12  
014:  0   56  P   1  28  0   32768  8     49152 12   1310720 10  31457280 12  
015:  0   57  P   1  28  1   32768  8     49152 12   1310720 10  31457280 12  
016:  0   64  E   1  32  0   65536  8     32768  8   2097152 16  31457280 12  
017:  0   66  E   1  33  0   65536  8     32768  8   2097152 16  31457280 12  
018:  0   68  E   1  34  0   65536  8     32768  8   2097152 16  31457280 12  
019:  0   70  E   1  35  0   65536  8     32768  8   2097152 16  31457280 12  
020:  0   72  E   1  36  0   65536  8     32768  8   2097152 16  31457280 12  
021:  0   74  E   1  37  0   65536  8     32768  8   2097152 16  31457280 12  
022:  0   76  E   1  38  0   65536  8     32768  8   2097152 16  31457280 12  
023:  0   78  E   1  39  0   65536  8     32768  8   2097152 16  31457280 12  

CPU Freq(MHz) Ratio  Turbo  C0(%)  C1(%)  C3(%)  C6(%)  C7(%)  Min TMP:TS  Max
000   60.88 ( 0.61)   1.91   4.26  73.21   0.00   0.71  20.79  29 / 30:70 / 33
001    4.73 ( 0.05)   0.15   0.43  73.21   0.00   0.71  20.79  29 / 30:70 / 33
002  125.12 ( 1.26)   3.93   7.81  54.28   0.00   1.53  35.07  28 / 31:69 / 33
003   10.06 ( 0.10)   0.32   0.58  54.28   0.00   1.53  35.07  28 / 31:69 / 33
004  204.30 ( 2.05)   6.41  11.82  87.85   0.00   0.00   0.00  27 / 29:71 / 34
005    6.93 ( 0.07)   0.22   0.41  87.85   0.00   0.00   0.00  27 / 29:71 / 34
006  138.32 ( 1.39)   4.34   8.46  82.70   0.00   0.59   7.93  27 / 28:72 / 35
007    0.45 ( 0.00)   0.01   0.03  82.70   0.00   0.59   7.93  27 / 28:72 / 35
008  579.78 ( 5.82)  18.19  33.67  45.45   0.00   0.99  18.90  27 / 30:70 / 43
009    4.11 ( 0.04)   0.13   0.29  45.45   0.00   0.99  18.90  27 / 30:70 / 43
010  318.40 ( 3.20)   9.99  19.22  80.40   0.00   0.00   0.00  25 / 25:75 / 37
011    4.68 ( 0.05)   0.15   0.38  80.40   0.00   0.00   0.00  25 / 25:75 / 37
012  424.02 ( 4.26)  13.30  23.78  52.87   0.00   1.15  21.37  28 / 29:71 / 38
013    1.57 ( 0.02)   0.05   0.13  52.87   0.00   1.15  21.37  28 / 29:71 / 38
014  222.49 ( 2.23)   6.98  13.68  80.28   0.00   0.39   4.95  25 / 26:74 / 30
015    7.66 ( 0.08)   0.24   0.60  80.28   0.00   0.39   4.95  25 / 26:74 / 30
016   94.66 ( 0.95)   2.97   7.40  69.00   0.00  23.08   0.00  28 / 28:72 / 31
017   76.20 ( 0.77)   2.39   5.67  59.05   0.00  34.51   0.00  28 / 28:72 / 31
018   50.72 ( 0.51)   1.59   4.08  95.79   0.00   0.00   0.00  28 / 28:72 / 31
019  102.62 ( 1.03)   3.22   8.04  29.63   0.00  61.48   0.00  28 / 28:72 / 31
020   38.65 ( 0.39)   1.21   3.25   8.25   0.00  87.02   0.00  30 / 31:69 / 34
021   15.82 ( 0.16)   0.50   1.30   3.78   0.00  94.26   0.00  30 / 31:69 / 34
022   18.19 ( 0.18)   0.57   1.56   1.13   0.00  96.45   0.00  30 / 31:69 / 34
023   23.72 ( 0.24)   0.74   1.67  13.77   0.00  84.07   0.00  30 / 31:69 / 34

    Averages:        Turbo  C0(%)  C1(%)  C3(%)  C6(%)  C7(%)    TjMax:    Pkg:
                      3.31   6.60  58.10   0.00  20.48   9.08     100 C    34 C


Linux:                                                                          
|- Release                                                       [6.1.6-arch1-1]
|- Version              [#1 SMP PREEMPT_DYNAMIC Sat, 14 Jan 2023 13:09:35 +0000]
|- Machine                                                              [x86_64]
Memory:                                                                         
|- Total RAM                                                         32651652 KB
|- Shared RAM                                                          615400 KB
|- Free RAM                                                           3712472 KB
|- Buffer RAM                                                            1084 KB
|- Total High                                                               0 KB
|- Free High                                                                0 KB
Clock Source                                                  <             tsc>
CPU-Freq driver                                               [    intel_pstate]
Governor                                                      [         Missing]
CPU-Idle driver                                               [      intel_idle]
|- Idle Limit                                                 [             C10]
   |- State        POLL     C1E      C6      C8     C10                         
   |-           CPUIDLE MWAIT 0 MWAIT 0 MWAIT 0 MWAIT 0                         
   |- Power          -1       0       0       0       0                         
   |- Latency         0       2     220     280     680                         
   |- Residency       0       4     600     800    2000                         

[ 0] American Megatrends International, LLC.                                    
[ 1] 1.70                                                                       
[ 2] 07/04/2022                                                                 
[ 3] Micro-Star International Co., Ltd.                                         
[ 4] MS-7D32                                                                    
[ 5] 1.0                                                                        
[ 6] D---u---s---n-                                                             
[ 7] Default string                                                             
[ 8] Default string                                                             
[ 9] Micro-Star International Co., Ltd.                                         
[10] MAG Z690 TOMAHAWK WIFI DDR4 (MS-7D32)                                      
[11] 1.0                                                                        
[12] 0---2---L---4---3-                                                         
[13] Number Of Devices:4\Maximum Capacity:134217728 bytes                       
[14]                                                                            
[15] Controller0-DIMMA2\BANK 0                                                  
[16]                                                                            
[17] Controller1-DIMMB2\BANK 0                                                  
[18]                                                                            
[19] G Skill Intl                                                               
[20]                                                                            
[21] G Skill Intl                                                               
[22]                                                                            
[23] F4-3600C16-16GTZNC                                                         
[24]                                                                            
[25] F4-3600C16-16GTZNC

@cyring
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cyring commented Jan 31, 2023 

                             Intel Z690  [7A84]                            
Controller #0                                                Dual Channel  
 Bus Rate  3600 MHz       Bus Speed 3585 MHz           DDR4 Speed 3585 MHz 
                                                                           
 Cha    CL RCDr RCDw   RP  RAS RRDs RRDl  FAW   WR RTPr WTPr  CWL  CKE  CMD
  #0    16   19   19   19   39    4    9   44   24   12   44   16    7   2T
  #1     0    0    0    0    0    0    0    0    0    0    0    0    0   1T
      sgRR dgRR drRR ddRR      sgRW dgRW drRW ddRW      sgWR dgWR drWR ddWR
  #0     7    4   12   12        14   15   15   15        34   27    7    7
  #1     0    0    0    0         0    0    0    0         0    0    0    0
      sgWW dgWW drWW ddWW                REFI  RFC  XS   XP CPDED GEAR  ECC
  #0     7    4   12   12               14055  630  648   11    4    1    0
  #1     0    0    0    0                   0    0    0    0    0    1    0
                                                                           
 DIMM Geometry for channel #0                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0                                                                  
       #1    16    2     65536      1024          16384  F4-3600C16-16GTZNC
 DIMM Geometry for channel #1                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0                                                                  
       #1                                                                  
                                                                           
Controller #1                                                Dual Channel  
 Bus Rate  3600 MHz       Bus Speed 3585 MHz           DDR4 Speed 3585 MHz 
                                                                           
 Cha    CL RCDr RCDw   RP  RAS RRDs RRDl  FAW   WR RTPr WTPr  CWL  CKE  CMD
  #0    16   19   19   19   39    4    9   44   24   12   44   16    7   2T
  #1     0    0    0    0    0    0    0    0    0    0    0    0    0   1T
      sgRR dgRR drRR ddRR      sgRW dgRW drRW ddRW      sgWR dgWR drWR ddWR
  #0     7    4   12   12        14   15   15   15        34   27    7    7
  #1     0    0    0    0         0    0    0    0         0    0    0    0
      sgWW dgWW drWW ddWW                REFI  RFC  XS   XP CPDED GEAR  ECC
  #0     7    4   12   12               14055  630  648   11    4    1    0
  #1     0    0    0    0                   0    0    0    0    0    1    0
                                                                           
 DIMM Geometry for channel #0                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0                                                                  
       #1    16    2     65536      1024          16384  F4-3600C16-16GTZNC
 DIMM Geometry for channel #1                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0                                                                  
       #1

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