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/ rules.txt
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May 8, 2024 01:19
— forked from denniskupec/rules.txt
KiCad DRC rules for JLCPCB, 2 & 4-layer PCB
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| (version 1) | |
| #Kicad 7 | |
| # 2-layer, 1oz copper | |
| (rule "Minimum Trace Width (outer layer)" | |
| (constraint track_width (min 5mil)) | |
| (layer outer) | |
| (condition "A.Type == 'track'")) | |
| (rule "Minimum Trace Spacing (outer layer)" |