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// loads a port for CPU to read | |
void load16(uint8_t address, uint8_t data) | |
{ | |
// put the address and data onto STM32-CPLD bus | |
uint16_t value = 0; | |
value = (address & 0xf) << 8; | |
value = value | data; | |
CPLD_DATA_PORT->ODR &= 0xf000; | |
CPLD_DATA_PORT->ODR |= value; | |
data_output(); |
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// STM32 pin change interrupt handler | |
void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) | |
{ | |
// IOWR interrupt | |
if(GPIO_Pin == IOWR_Pin) | |
{ | |
// switch to input | |
data_input(); | |
addr_input(); | |
// enable address and data latch outputs |
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void interrupt_activate(uint8_t vector) | |
{ | |
// put the interrupt vector on STM32-CPLD bus | |
CPLD_DATA_PORT->ODR &= 0xff00; | |
CPLD_DATA_PORT->ODR |= vector; | |
// load the interrupt vector latch inside CPLD | |
data_output(); | |
vect_load_activate(); | |
vect_load_deactivate(); | |
data_input(); |
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module decoder_4to16 ( | |
input enable, | |
input [3:0] binary_in, | |
output reg [15:0] decoder_out | |
); | |
always @ (enable or binary_in) | |
begin | |
if (enable) begin | |
case (binary_in) |
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module dlatch8( | |
input wire [7:0] data, | |
input wire LE_H, | |
input wire OE_L, | |
output reg [7:0] q | |
); | |
reg [7:0] q_internal; | |
// activates when LE_H or OE_L changes |
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import serial | |
NINTENDO_LOGO = [206, 237, 102, 102, 204, 13, 0, 11, 3, 115, 0, 131, 0, 12, 0, 13, 0, 8, 17, 31, 136, 137, 0, 14, 220, 204, 110, 230, 221, 221, 217, 153, 187, 187, 103, 99, 110, 14, 236, 204, 221, 220, 153, 159, 187, 185, 51, 62] | |
gcb_flag_dict = {0x80:"GB compatible GBC game", 0xc0:"GBC only game"} | |
cart_type_dict = {0x00:"ROM ONLY", 0x01:"MBC1", 0x02:"MBC1+RAM", 0x03:"MBC1+RAM+BATTERY", 0x05:"MBC2", 0x06:"MBC2+BATTERY", 0x08:"ROM+RAM", 0x09:"ROM+RAM+BATTERY", 0x0B:"MMM01", 0x0C:"MMM01+RAM", 0x0D:"MMM01+RAM+BATTERY", 0x0F:"MBC3+TIMER+BATTERY", 0x10:"MBC3+TIMER+RAM+BATTERY", 0x11:"MBC3", 0x12:"MBC3+RAM", 0x13:"MBC3+RAM+BATTERY", 0x15:"MBC4", 0x16:"MBC4+RAM", 0x17:"MBC4+RAM+BATTERY", 0x19:"MBC5", 0x1A:"MBC5+RAM", 0x1B:"MBC5+RAM+BATTERY", 0x1C:"MBC5+RUMBLE", 0x1D:"MBC5+RUMBLE+RAM", 0x1E:"MBC5+RUMBLE+RAM+BATTERY", 0xFC:"POCKET CAMERA", 0xFD:"BANDAI TAMA5", 0xFE:"HuC3", 0xFF:"HuC1+RAM+BATTERY"} | |
ROM_size_dict = {0x00:"32KByte (no ROM banking)", 0x01:"64KByte (4 banks)", 0x02:"128KByte (8 banks)", 0x0 |
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int main(void) | |
{ | |
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */ | |
HAL_Init(); | |
/* Configure the system clock */ | |
SystemClock_Config(); | |
/* Initialize all configured peripherals */ | |
MX_GPIO_Init(); | |
MX_USART1_UART_Init(); | |
MX_USART3_UART_Init(); |
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include helper.z80 | |
org 0x0 | |
jmp program_start | |
org 0x10 ; interrupt vector table | |
.dw 0x3000 ; keyboard interrupt at 0x3000 | |
org 0x100 | |
program_start: |
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vram_char_base_addr .equ 0x8000 | |
vram_attri_base_addr .equ 0x8960 | |
org 0x0 | |
xor b | |
xor c | |
xor d | |
xor e | |
ld sp, 0x7fff |
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module cpu_vreg( | |
input wire clk, | |
input wire copy_in_progress, | |
input wire close_to_vlank, | |
input wire cpu_rd, | |
input wire cpu_wr, | |
input wire cpu_mreq, | |
output reg [7:0] copy_enable, | |
input wire [15:0] cpu_addr, |
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