Created
March 9, 2016 20:45
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virtual register of FAP video card
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module cpu_vreg( | |
input wire clk, | |
input wire copy_in_progress, | |
input wire cpu_rd, | |
input wire cpu_wr, | |
input wire cpu_mreq, | |
input wire [15:0] cpu_addr, | |
inout wire [7:0] cpu_data, | |
output reg back_vram_wr_low, | |
output reg [12:0] back_vram_addr, | |
output reg [7:0] back_vram_data | |
); | |
always @(posedge clk) | |
begin | |
if(copy_in_progress == 0 && cpu_wr == 0 && cpu_mreq == 0 && cpu_addr >= 16'h8000) begin | |
back_vram_addr = cpu_addr[12:0]; | |
back_vram_data = cpu_data; | |
back_vram_wr_low = 0; | |
end | |
else begin | |
back_vram_wr_low = 1; | |
back_vram_addr = 13'bzzzzzzzzzzzzz; | |
back_vram_data = 8'bzzzzzzzz; | |
end | |
end | |
endmodule |
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