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1: 0aafe2dc5d1f ! 1: a669660cae99 phy: cadence: cdns-dphy: Fix PLL lock and O_CMN_READY polling | |
@@ Commit message | |
phy: cadence: cdns-dphy: Fix PLL lock and O_CMN_READY polling | |
PLL lockup and O_CMN_READY assertion can only happen after common state | |
- machine gets enabled (by programming DPHY_CMN_SSM register), but driver was | |
- polling them before the common state machine was enabled. To fix this : | |
+ machine gets enabled by programming DPHY_CMN_SSM register, but driver was | |
+ polling them before the common state machine was enabled which is | |
+ incorrect. This is as per the DPHY initialization sequence as mentioned in |
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root@am62lxx-evm:~# cat /sys/kernel/tracing/trace | |
# tracer: nop | |
# | |
# entries-in-buffer/entries-written: 8/8 #P:2 | |
# | |
# _-----=> irqs-off/BH-disabled | |
# / _----=> need-resched | |
# | / _---=> hardirq/softirq | |
# || / _--=> preempt-depth | |
# ||| / _-=> migrate-disable |
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1: f36a4c3b069f = 1: e7e7e99be4dc dt-bindings: display: ti,am65x-dss: Add support for AM62L DSS | |
2: 7d6ce8735b92 ! 2: 5bdec3be79d8 drm/tidss: Update infrastructure to support K3 DSS cut-down versions | |
@@ drivers/gpu/drm/tidss/tidss_crtc.c: static void tidss_crtc_atomic_disable(struct | |
* the layers here as a work-around. | |
*/ | |
- for (u32 layer = 0; layer < tidss->feat->num_planes; layer++) | |
-- dispc_ovr_enable_layer(tidss->dispc, tcrtc->hw_videoport, layer, | |
-- false); | |
-+ for (u32 layer = 0; layer < tidss->feat->num_vids; layer++) { | |
-+ u32 hw_id = tidss->feat->vid_info[layer].hw_id; |
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root@am62lxx-evm:~# kmsprint | |
Connector 0 (41) HDMI-A-1 (connected) | |
Encoder 0 (40) NONE | |
Crtc 0 (39) 1920x1080@59.72 138.000 1920/48/32/80/+ 1080/2/5/24/- 60 (59.72) 0x9 0x48 | |
Plane 0 (32) fb-id: 43 (crtcs: 0) 0,0 1920x1080 -> 0,0 1920x1080 (AR12 AB12 RA12 RG16 BG16 AR15 AB15 AR24 AB24 RA24 BA24 RG24 BG24 AR30 AB30 XR12 XB12 RX12 XR15 XB15 XR24 XB24 RX24 BX24 XR30 XB30 YUYV UYVY | |
NV12) | |
FB 43 1920x1080 | |
root@am62lxx-evm:~# kmstest | |
Connector 0/@41: HDMI-A-1 | |
Crtc 0/@39: 1920x1080@59.72 138.000 1920/48/32/80/+ 1080/2/5/24/- 60 (59.72) 0x9 0x48 |
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1: cfab76afd827 ! 1: 1c09e1b86bbb phy: cadence: cdns-dphy: Fix PLL lock and O_CMN_READY polling | |
@@ Commit message | |
phy: cadence: cdns-dphy: Fix PLL lock and O_CMN_READY polling | |
PLL lockup and O_CMN_READY assertion can only happen after common state | |
- machine gets enabled, but driver was polling them before the common state | |
- machine was enabled. To fix this, add new function callbacks polling on PLL | |
- lock and O_CMN_READY assertion and call them only after common state | |
- machine gets enabled. | |
+ machine gets enabled (by programming DPHY_CMN_SSM register), but driver was |
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1: 82ccc24826a8 ! 1: 7d6ce8735b92 drm/tidss: Update infrastructure to support K3 DSS cut-down versions | |
@@ drivers/gpu/drm/tidss/tidss_crtc.c: static void tidss_crtc_atomic_disable(struct | |
- for (u32 layer = 0; layer < tidss->feat->num_planes; layer++) | |
- dispc_ovr_enable_layer(tidss->dispc, tcrtc->hw_videoport, layer, | |
- false); | |
-+ for (u32 layer = 0; layer < tidss->feat->num_vids; layer++) | |
++ for (u32 layer = 0; layer < tidss->feat->num_vids; layer++) { | |
++ u32 hw_id = tidss->feat->vid_info[layer].hw_id; | |
++ | |
+ dispc_ovr_enable_layer(tidss->dispc, tcrtc->hw_videoport, |
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root@am62pxx-evm:~# kmsprint --device="/dev/dri/card1" | |
Connector 0 (41) DSI-1 (connected) | |
Encoder 0 (40) NONE | |
Crtc 0 (39) 800x480@60.00 28.569 800/48/32/80/- 480/3/7/6/- 60 (60.00) 0xa 0x48 | |
Plane 0 (32) fb-id: 49 (crtcs: 0) 0,0 800x480 -> 0,0 800x480 (AR12 AB12 RA12 RG16 BG16 AR15 AB15 AR24 AB24 RA24 BA24 RG24 BG24 AR30 AB30 XR12 XB12 RX12 XR15 XB15 XR24 XB24 RX24 BX24 XR30 XB30 YUYV UYVY NV1 | |
2) | |
FB 49 800x480 | |
root@am62pxx-evm:~# kmstest | |
press enter to exit | |
^C |
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##########AM62A######### | |
root@am62axx-evm:~# | |
root@am62axx-evm:~# uname -r | |
6.15.0-rc4-next-20250428-00003-g2694e8611bbf-dirty | |
modetest -M tidss -s 41@39:1920x1080 -P 42@39:1280x720 -w 42:zpos:0 -w 32:zpos:1 -w 32:alpha:44444 -v | |
setting mode 1920x1080-59.72Hz on connectors 41, crtc 39 | |
testing 1280x720@XR24 overlay plane 42 | |
freq: 60.64Hz | |
freq: 59.72Hz |
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Only diff for: drm/tidss: Update infrastructure to support K3 DSS cut-down versions | |
diff --git a/drivers/gpu/drm/tidss/tidss_crtc.c b/drivers/gpu/drm/tidss/tidss_crtc.c | |
index 0e08d2242c90..6db100b81482 100644 | |
--- a/drivers/gpu/drm/tidss/tidss_crtc.c | |
+++ b/drivers/gpu/drm/tidss/tidss_crtc.c | |
@@ -130,7 +130,7 @@ static void tidss_crtc_position_planes(struct tidss_device *tidss, | |
!to_tidss_crtc_state(cstate)->plane_pos_changed) | |
return; | |
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1: ce42e04b8c4e ! 1: 0ac25605edfe drm/tidss: Update infra to support DSS7 cut-down versions | |
@@ Metadata | |
Author: Devarsh Thakkar <devarsht@ti.com> | |
## Commit message ## | |
- drm/tidss: Update infra to support DSS7 cut-down versions | |
+ drm/tidss: Update infrastructure to support K3 DSS cut-down versions | |
SoCs like AM62Lx support cut-down version of DSS7 where | |
although same register space is supported as in other |
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