MCP23017 Register Code Database as cson file

registers_MCP23017.cson

# ww1.microchip.com/downloads/en/DeviceDoc/21952b.pdf
# see table 1.6 and details in sections 1.6.x following
# follow with two bytes to set both banks/ports  A and B
# adding 1 to value will address bank/port B with a single byte, as long as bit 7 of IOCON = 0
registers: [
	{
  name:'IODIR'
  alias:'DIRECTION'
  value: 0x00
  desc: 'When a bit is set, the corresponding pin becomes an input. When a bit is clear, the corresponding pin becomes an output.'
  }
  {
  name:'IOPOL'
  alias:'INVERT'
  value: 0x02
  desc: 'If a bit is set, the corresponding GPIO register bit will reflect the inverted value on the pin.'
  }
  {
  name:'GPINTEN'
  alias:'CHANGE'
  value: 0x04
  desc: 'If a bit is set, the corresponding pin is enabled for interrupt-on-change. The DEFVAL and INTCON registers must also be configured if any pins are enabled for interrupt-on-change.'
  }
  {
  name:'DEFVAL'
  alias:'DCOMPARE'
  value: 0x06
  desc: 'The default comparison value is configured in the DEFVAL register. If enabled (via GPINTEN and INTCON) to compare against the DEFVAL register, an opposite value on the associated pin will cause an interrupt to occur.'
  }
  {
  name:'INTCON'
  alias:'INTCON'
  value: 0x08
  desc: 'The INTCON register controls how the associated pin value is compared for the interrupt-on-change feature. If a bit is set, the corresponding I/O pin is compared against the associated bit in the DEFVAL register. If a bit value is clear, the corresponding I/O pin is compared against the previous value.'
  }
  {
  name:'IOCON' #page 18
  alias:'IOCON'
  value: 0x0A
  desc: 'Contains a byte of bits for configuring the 23017'
  byte: ['NULL','INTPOL','ODR','HAEN','DISSLW','SEQOP','MIRROR','BANK'] # see page 18 of datasheet (url above) for details of 7 settings)
  }
  {
  name:'GPPU' # used for setting up contact closure pins, page19
  alias:'PULLUP'
  value: 0x0C
  desc: 'If a bit is set AND the corresponding pin is configured as an input (IODIR), the corresponding port pin is internally pulled up with a 100 kΩ resistor.'
  }
  {
  name:'INTF' # page20
  alias:'IFLAG'
  value: 0x0E
  desc: 'READ ONLY, The INTF register reflects the interrupt condition on the port pins of any pin that is enabled for interrupts via the GPINTEN register. A ‘set’ bit indicates that the associated pin caused the interrupt'
  }
  {
  name:'INTCAP' # page21
  alias:'IFLAG'
  value: 0x10
  desc: 'READ ONLY, The INTCAP register captures the GPIO port value at the time the interrupt occurred. The register is ‘read only’ and is updated only when an interrupt occurs. The register will remain unchanged until the interrupt is cleared via a read of INTCAP or GPIO.'
  }
  {
  name:'GPIO' # page22
  alias:'RW'
  value: 0x12
  desc: 'The GPIO register reflects the value on the port. Reading from this register reads the port. Writing to this register modifies the Output Latch (OLAT) register.'
  }
  {
  name:'OLAT' # page23
  alias:'RW'
  value: 0x12
  desc: 'The OLAT register provides access to the output latches. A read from this register results in a read of the OLAT and not the port itself. A write to this register modifies the output latches that modifies the pins configured as outputs.'
  }
]