Skip to content

Instantly share code, notes, and snippets.

View flaviusb's full-sized avatar

Justin Marsh (:flaviusb) flaviusb

View GitHub Profile
@flaviusb
flaviusb / .profile
Last active September 26, 2023 00:35 — forked from changx03/change_cache_dir.sh
Change Ubuntu cache directory on remove server
#!/bin/bash
export XDG_CACHE_HOME="/data/${USER}/.cache"
export PIP_CACHE_DIR="/data/${USER}/.cache"
@flaviusb
flaviusb / array.txt
Last active December 12, 2022 07:55
Array notes
array
q?
length {...}
ith get $n {...}
ith set $n {} {...}
ith insert $n {} {...}
ith pop $n {...}
ith remove $n {...}
slice get $n $n {...}
slice set {...} $n {...}
// This version imagines a define_chip macro that has been enhanced with do_with_in; I'm looking at how to do this through providing an annotation macro to wrap other proc macros
define_chip! {
$(fn stall(name, args: {}, check: []) {
CheckStall <- 0 (instruction @ super::super::Instruction::$name::(super::super::Instructions::$name($args)), mems) => {
$(if $check is not empty {
let ($(for $j in $check { stalled_$j, })) = ($(for $j in $check { get_stalled($j, mems) }));
if !($(for $k in $check { $k | }) false) {
return super::super::Work::Computing { progress: 0, instruction, mem: mems };
} else {
@flaviusb
flaviusb / .config
Created August 15, 2019 02:21
rebuild kernel etc plus .config
#
# Automatically generated file; DO NOT EDIT.
# Linux/x86 4.14.65-gentoo Kernel Configuration
#
#
# Gentoo Linux
#
CONFIG_GENTOO_LINUX=y
CONFIG_GENTOO_LINUX_UDEV=y

Foreward

This document was originally written several years ago. At the time I was working as an execution core verification engineer at Arm. The following points are coloured heavily by working in and around the execution cores of various processors. Apply a pinch of salt; points contain varying degrees of opinion.

It is still my opinion that RISC-V could be much better designed; though I will also say that if I was building a 32 or 64-bit CPU today I'd likely implement the architecture to benefit from the existing tooling.

Mostly based upon the RISC-V ISA spec v2.0. Some updates have been made for v2.2

Original Foreword: Some Opinion

The RISC-V ISA has pursued minimalism to a fault. There is a large emphasis on minimizing instruction count, normalizing encoding, etc. This pursuit of minimalism has resulted in false orthogonalities (such as reusing the same instruction for branches, calls and returns) and a requirement for superfluous instructions which impacts code density both in terms of size and

More democracy
- Elections (for public offices, yes, but what kinds? Eg I don't really want elected judges or elected bureaucrats)
- Reasonably frequent elections
- Biproportional allotment, as close to PR as possible etc
- Clean elections
- Public funding
- Automatic enrollment
- Auditable results
- Private voting
- No gerrymandering
desc 'Generate tags page'
task :tags do
puts "Generating tags..."
require 'rubygems'
require 'jekyll'
include Jekyll::Filters
options = Jekyll.configuration({})
site = Jekyll::Site.new(options)
site.read_posts('')