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@gregdavill
Created January 10, 2022 06:37
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A simple python script to extract tracks/vias from a PADS ASCII file
# MIT License
# Copyright (c) 2022 Greg Davill <greg.davill@gmail.com>
# Permission is hereby granted, free of charge, to any person obtaining a copy
# of this software and associated documentation files (the "Software"), to deal
# in the Software without restriction, including without limitation the rights
# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
# copies of the Software, and to permit persons to whom the Software is
# furnished to do so, subject to the following conditions:
# The above copyright notice and this permission notice shall be included in all
# copies or substantial portions of the Software.
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
# SOFTWARE.
# Script to collect tracks/vias from a PADs file
# !PADS-POWERPCB-V5.0-BASIC! DESIGN DATABASE ASCII FILE 1.0
# *PCB* GENERAL PARAMETERS OF THE PCB DESIGN
import re
from pcbnew import *
pcb = CreateEmptyBoard()
pcb.GetDesignSettings().SetCopperLayerCount(6)
divisor = ((10000)*150)
# Test.txt contains just the *ROUTE* data that looks like this:
'''
*ROUTE*
*REMARK* *SIGNAL* SIGNAME SIGFLAG COLOR
*REMARK* REFNM.PIN .REUSE. INSTANCE RSIG REFNM.PIN .REUSE. INSTANCE RSIG
*REMARK* XLOC YLOC LAYER SEGMENTWIDTH FLAGS [ARCDIR/VIANAME] [TEARDROP [P WID LEN [FLAGS]] [N WID LEN [FLAGS]]] [JMPNM JMPFLAG] REUSE INST RSIG
*SIGNAL* GND 2 -2
UU1.AG8 UU1.AF15
-9750171 4499991 1 381000 1280 THERMAL TEARDROP N 90 90
-10594848 4499991 1 381000 1536
-10865358 4770501 0 152400 768 VIA8X16 THERMAL TEARDROP P 90 90
-10566273 -1143381 1 152400 1280 VIA8X16 THERMAL TEARDROP N 90 90
-10522839 -1186815 1 152400 1536
-9436608 -1186815 1 152400 1536
-8999982 -750189 65 152400 768 THERMAL TEARDROP P 90 90
UU1.AE9 UU1.AG8
-8250174 3750183 1 381000 1280 THERMAL TEARDROP N 90 90
-8250174 4412361 1 381000 1536
-8299323 4461510 1 381000 1536
-8299323 4481322 0 152400 768 VIA8X16 THERMAL TEARDROP P 90 90
-9750171 4499991 65 152400 1792 THERMAL
UU1.AE7 UU1.AG8
-8250174 5250180 1 381000 1280 THERMAL TEARDROP N 90 90
-8250174 4560189 1 381000 1536
-8299323 4511040 1 381000 1536
-8299323 4481322 0 152400 768 VIA8X16 THERMAL TEARDROP P 90 90
-9750171 4499991 65 152400 1792 THERMAL
'''
with open("test.txt") as f:
data = f.read()
signal_filter = re.compile(r"\n\*SIGNAL\*.+((?:\n.+)+)", re.MULTILINE)
l = [
F_Cu,
In1_Cu,
In2_Cu,
In3_Cu,
In4_Cu,
In5_Cu,
B_Cu,
]
for trace in signal_filter.findall(data):
c = []
for line in trace.split("\n"):
fields = line.split()
if len(fields) >= 5:
x,y,width = [int(i)/divisor for i in [fields[0],fields[1],fields[3]]]
layer = int(fields[2])
if layer == 65:
layer = 6
if "VIA8X16" in line:
v = PCB_VIA(pcb)
pcb.Add(v)
v.SetWidth(FromMM(0.4))
v.SetDrill(FromMM(0.2))
v.SetPosition(wxPoint(FromMM(-x), FromMM(y)))
#print(f"via: {x:.3f}mm,{y:.3f}mm ")
#print(f"{x:.3f}mm,{y:.3f}mm [{width:.2f}][{layer}]")
c += [(-x,y,width, layer)]
for i in range(len(c) - 1):
t = PCB_TRACK(pcb)
if c[i][3] == 0:
continue
t.SetLayer(l[c[i][3] - 1])
t.SetWidth(FromMM(c[i][2]))
t.SetStart(wxPoint(FromMM(c[i][0]),FromMM(c[i][1])))
t.SetEnd(wxPoint(FromMM(c[i+1][0]),FromMM(c[i+1][1])))
pcb.Add(t)
pcb.Save("test.kicad_pcb")
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