Greg Davill gregdavill
gregdavill
/ asc_2_kicad.py
Created
January 10, 2022 06:37
A simple python script to extract tracks/vias from a PADS ASCII file
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| # MIT License | |
| # Copyright (c) 2022 Greg Davill <greg.davill@gmail.com> | |
| # Permission is hereby granted, free of charge, to any person obtaining a copy | |
| # of this software and associated documentation files (the "Software"), to deal | |
| # in the Software without restriction, including without limitation the rights | |
| # to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
| # copies of the Software, and to permit persons to whom the Software is | |
| # furnished to do so, subject to the following conditions: |
gregdavill
/ luna_bom_r0.4_20210410.csv
Created
April 10, 2021 03:02
Sources for the BOM for a Luna r0.4 board
We can make this file beautiful and searchable if this error is corrected: It looks like row 2 should actually have 2 columns, instead of 1. in line 1.
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| Sources for the BOM for a Luna r0.4 board. Ordered 2021-04-10, stock levels may change. | |
| Learn more: https://github.com/greatscottgadgets/luna | |
| DigiKey: | |
| "Index","Quantity","Part Number","Manufacturer Part Number","Description","Customer Reference","Available","Backorder","Unit Price","Extended Price AUD" | |
| "1","2","2073-USB1125-GF-B-ND","USB1125-GF-B","USB TYPE-A RECEPT HI-LIFE RA SHO","","2","0","0.70000","1.40" | |
| "2","4","1727-7895-1-ND","74AUP2G126GS,115","IC BUFFER NON-INVERT 3.6V 8XSON","","4","0","0.84000","3.36" | |
| "3","6","AP22804AW5-7DICT-ND","AP22804AW5-7","IC PWR SWITCH P-CHAN 1:1 SOT25","","6","0","0.73000","4.38" | |
| "4","2","TCR2EF115LM(CTCT-ND","TCR2EF115,LM(CT","IC REG LINEAR 1.15V 200MA SMV","","2","0","0.43000","0.86" |
gregdavill
/ import_x3d.py
Created
September 20, 2020 07:01
Blender 2.82a import_x3d.py KiCad Material fix.
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| # ##### BEGIN GPL LICENSE BLOCK ##### | |
| # | |
| # This program is free software; you can redistribute it and/or | |
| # modify it under the terms of the GNU General Public License | |
| # as published by the Free Software Foundation; either version 2 | |
| # of the License, or (at your option) any later version. | |
| # | |
| # This program is distributed in the hope that it will be useful, | |
| # but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
gregdavill
/ foboot-v3.0-orangecrab-r0.2-85F.svf
Created
April 14, 2020 13:51
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| STATE RESET; | |
| HDR 0; | |
| HIR 0; | |
| TDR 0; | |
| TIR 0; | |
| ENDDR DRPAUSE; | |
| ENDIR IRPAUSE; | |
| STATE IDLE; | |
gregdavill
/ OrangeCrab r0.1 LiteX SoC DDR3
Created
February 22, 2020 12:28
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| HDR 0; | |
| HIR 0; | |
| TDR 0; | |
| TIR 0; | |
| ENDDR DRPAUSE; | |
| ENDIR IRPAUSE; | |
| STATE IDLE; | |
| SIR 8 TDI (E0); | |
| SDR 32 TDI (00000000) | |
| TDO (41111043) |
gregdavill
/ OrangeCrab_ddr3test_20200123_001.svf
Created
January 23, 2020 13:27
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| HDR 0; | |
| HIR 0; | |
| TDR 0; | |
| TIR 0; | |
| ENDDR DRPAUSE; | |
| ENDIR IRPAUSE; | |
| STATE IDLE; | |
| SIR 8 TDI (E0); | |
| SDR 32 TDI (00000000) | |
| TDO (41111043) |
gregdavill
/ OrangeCrab_ddr3test_20191202_001.svf
Created
December 5, 2019 10:27
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| HDR 0; | |
| HIR 0; | |
| TDR 0; | |
| TIR 0; | |
| ENDDR DRPAUSE; | |
| ENDIR IRPAUSE; | |
| STATE IDLE; | |
gregdavill
/ ecp5_swap_idcode.py
Created
October 1, 2019 12:25
Script for use with prjtrellis to swap the IDCODE of a ECP5 bitstream
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| #!/usr/bin/env python3 | |
| """ | |
| This simple example uses PyTrellis to unpack, change the IDCODE, and pack a bitstream | |
| """ | |
| import pytrellis | |
| pytrellis.load_database("/usr/share/trellis/database") | |
| bs = pytrellis.Bitstream.read_bit("build/gateware/impl/top_impl.bit") | |
| chip = bs.deserialise_chip() |
gregdavill
/ background_spi_test.py
Created
January 16, 2019 11:38
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| #!/usr/bin/env python3 | |
| import sys | |
| import textwrap | |
| # Very basic bitstream to SVF converter, tested with the ULX3S WiFi interface | |
| flash_page_size = 256 | |
| erase_block_size = 64*1024 |
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| module top(); | |
| wire disp_clk_en, disp_clkp_bias_en, disp_clkn_bias_en; | |
| wire disp_datap_bias_en, disp_datan_bias_en; | |
| wire disp_data0, disp_data1; | |
| wire disp_clk_tri,disp_data_tri; | |
| wire disp_reset; | |
| simpleLCD slcd ( | |
| .resetn( resetn), |
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