1-1. The CPI of a single cycle design is always less than or equal to the CPI of a pipelined implementation.
True. singly cycle design 에서 CPI는 무조건 1. 파이프라인에서는 ideally 1, 실제로는 더 커질 수 있음.
1-2. Since RISC can access the memory only through load and store instructions, RISC must support many different addressing modes to satisfy various memory access needs by different applications.
False. 우리가 배운 MIPS만 보더라도 displacement mode 하나밖에 없음.