luojia65

/// A memory mapping from virtual address space to physical ones.
pub trait AddressMapping {
    /// Iterator of physical parts on this memory mapping system.
    type Window<P>: Iterator<Item = P>;
    /// Address translation errors, e.g. page faults.
    type Error;
    /// Maps reference of a virtual object into a set of physical parts.
    fn map<P: Virtual>(&self, virt_ref: P) -> Result<Self::Window<Part<P>>, Self::Error>;
}

luojia65

## -- modules --
axi // bus
uart
spi
i2c
usb
radio

## -- structs --
McuSystem { uart: &'static Uart, }

luojia65

From 249a3b13d121523be55c3262ba7e7defd446f368 Mon Sep 17 00:00:00 2001
From: Phil Edworthy <phil.edworthy@renesas.com>
Date: Wed, 2 Nov 2016 11:14:36 +0000
Subject: [PATCH] ddr: Add driver for Cadence DDR Controller

The controller supports DDR2 and DDR3 using 8 or 16-bit bus width.
When using 16-bit wide data, the controller can be configured to
use 8-bit data and 8-bit ECC.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>

luojia65

#!/usr/bin/env bash
# Original author: @junkdog. Modified by @luojia65.

#     --slave /usr/bin/$1 $1 /usr/bin/$1-\${version} \\

function register_clang_version {
    local version=$1
    local priority=$2

    update-alternatives \

luojia65

/// Runtime dynamic SIMD value
/// 
/// This structure a wrap of an unsized slice, whose memory layout varies by architecture
/// under #[repr(simd)].
/// 
/// In RISC-V, this type represents a group of elements to be processed in application,
/// or VL number of T values. Length of current vector is placed in separate vector length
/// CSR register `vl`.
#[repr(simd)]
pub struct DynSimd<T>([T]);

luojia65

{
    "arch": "riscv32",
    "atomic-cas": false,
    "cpu": "generic-rv32",
    "data-layout": "e-m:e-p:32:32-i64:64-n32-S128",
    "eh-frame-header": false,
    "emit-debug-gdb-scripts": false,
    "executables": true,
    "features": "+e,+m,+c",
    "linker": "rust-lld",

luojia65

有些时候我们要探测一些更细的RISC-V指令集，比如Zks、Zkn，而不是K。

Linux下使用Auxvec可以探测粗略的指令集。但是细致的指令集原理上可以通过捕捉sigill信号的方式去检测。

比如这个指令集包含sm4ed这个指令，我就试着用它，如果发生了非法指令，说明sm4ed指令不存在，那么就没有Zks扩展。 如果指令返回的结果正确，说明sm4ed指令是存在的。

这样的原理在ARM架构下的OpenSSL里有一定的体现。

luojia65

//! RISC-V intrinsics

use crate::arch::asm;

/// Generates the `PAUSE` instruction
///
/// The PAUSE instruction is a HINT that indicates the current hart's rate of instruction retirement
/// should be temporarily reduced or paused. The duration of its effect must be bounded and may be zero.
#[inline]
pub fn pause() {

luojia65

// -- 调用者（操作系统内核）

extern "sbicall" fn sbi_call(param: [usize; 6], a6: usize, a7: usize) -> (usize, usize);
// 最后两个参数必须是两个usize类型，a6: usize和a7: usize
// 除了最后两个参数，前面的参数必须是usize、[usize; N]或(usize, usize, ..)类型
// 依次会被填写到a0, a1, ..., a5寄存器中。

// 返回值可以是(usize, usize), [usize; 2]或者SbiRet（包含两个usize的结构体）

fn kernel() {

luojia65

const RD_SHIFT: usize = 7;
const RS1_SHIFT: usize = 15;
const RS2_SHIFT: usize = 20;
const XREG_A0: usize = 10;
const XREG_A1: usize = 11;

// rd = rd1 + (rs2 << imm2)
pub fn addsl<const I1: u8>(rs1: usize, rs2: usize) -> usize {
    assert!(I1 <= 0b11);
    const fn addsl_instruction<const I: u8>() -> usize {