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Andrew mcandre

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@mcandre
mcandre / yaesu-ft-70dr-cheatsheet.md
Last active Mar 6, 2022
Yaesu FT-70DR Cheatsheet
View yaesu-ft-70dr-cheatsheet.md

Yaesu FT-70DR Cheatsheet

Belt Clip

Yaesu sells handheld transceivers with an optional belt clip, detached by default. To attach the clip, remove any battery. Then firmly insert the two belt clip screws with an appropriate screwdriver. My radio came with two small Phillips head screws.

Charging

The battery charges via a barrel plug located on the right side of the radio.

@mcandre
mcandre / baofeng-uv-5x3-cheatsheet.md
Last active Feb 19, 2022
Baofeng UV-5x3 Cheatsheet
View baofeng-uv-5x3-cheatsheet.md

Baofeng UV-5x3 Cheatsheet

SUMMARY

A growing list of notes, bugs, issues, problems, design flaws, oddities, quirks, bad UX, nonintuitivity, challenges, frequently asked questions, gotchas, glitches, and errors with the Baofeng UV-5x3 amateur radio transceiver.

WARNING

DO NOT TRANSMIT ON THE RADIO WHILE THE ANTENNA IS DISCONNECTED, UNFOLDED, OR DAMAGED; DOING SO MAY RESULT IN PAINFUL BURNS FROM SPURIOUS RADIO FREQUENCY EMISSIONS.

@mcandre
mcandre / How to install Homebrew Casks
Created Dec 2, 2021
how-to-install-homebrew-casks.md
View How to install Homebrew Casks
Homebrew keeps changing the syntax to install casks.
As of this writing, the syntax is `brew install homebrew/cask/<formula>`.
View shrink-wsl.md
  1. Backup any critical data.
  2. Launch an administrative PowerShell session.
  3. Change directory like cd "C:\Users\andrew\AppData\Local\Packages\CanonicalGroupLimited.UbuntuonWindows_79rhkp1fndgsc\LocalState"
  4. Run optimize-vhd -Path ext4.vhdx -Mode full
  5. Wait a few minutes for the process to complete.
  6. Relaunch WSL.
View fulladder_chain.sv
`include "fulladder.sv"
module fulladder_chain #(parameter WIDTH)(input carry_in, [WIDTH-1:0] a, [WIDTH-1:0] b, output carry_out, [WIDTH-1:0] sum);
const int sizes[] = {WIDTH-2, 0};
const int CARRY_WIDTH = sizes.max;
wire [CARRY_WIDTH:0] carries;
@mcandre
mcandre / verilator-build-error.log
Last active Oct 9, 2021
verilator build error
View verilator-build-error.log
$ make
------------------------------------------------------------
making verilator in src
make -C src
make[1]: Entering directory '/home/ubuntu/go/src/github.com/verilator/verilator/src'
mkdir -p obj_dbg
make -C obj_dbg -j 1 TGT=../../bin/verilator_bin_dbg VL_DEBUG=1 -f ../Makefile_obj serial
make[2]: Entering directory '/home/ubuntu/go/src/github.com/verilator/verilator/src/obj_dbg'
View half_adder.v
module half_adder(
input clk,
a,
b,
output reg [0:0] sum,
carry
);
always @(posedge clk)
begin
sum <= a ^ b;
@mcandre
mcandre / half_adder.sv
Created Sep 28, 2021
half_adder SystemVerilog
View half_adder.sv
module half_adder(
input clk,
a,
b,
output reg sum,
carry
);
always @(posedge clk)
begin
sum <= a ^ b;
@mcandre
mcandre / cmake.log
Last active Sep 24, 2021
cmake build error log
View cmake.log
$ conan install -s compiler.cppstd=17 -s compiler=clang -s compiler.version=7.0 --build missing .
Configuration:
[settings]
arch=armv7
arch_build=armv7
build_type=Release
compiler=clang
compiler.cppstd=17
View show-binary-dependencies.md

General UNIX/Linux

$ ldd <binary>

macOS

$ otool -L