scan

gistfile1.txt

$ cat join1/join1.abs.myhuge.sb.perf.hw.scan.range100.pk1.1.sorted
col-1   col-2   col-3   col-4
INF     INF     INF     INF     alignment-faults
0.947   0.981   1.053   0.980   branches
0.896   0.969   1.049   0.937   branch-misses
0.667   1.000   1.000   1.000   branch-miss-pct
1.000   1.000   1.000   1.000   bus-cycles
0.928   1.054   1.094   0.989   cache-misses
0.937   1.139   1.215   1.266   cache-miss-pct
0.990   0.924   0.900   0.780   cache-references
1.057   0.969   1.010   1.044   context-switches
0.997   0.999   1.001   1.004   cycles
0.864   0.937   1.008   0.879   dTLB-load-misses
1.209   1.016   1.297   1.475   dTLB-load-miss-pct
0.715   0.922   0.778   0.596   dTLB-loads
1.000   1.000   1.000   1.000   dTLB-store-misses
1.000   1.000   1.000   1.000   dTLB-stores
INF     INF     INF     INF     faults
1.000   1.000   1.000   1.000   GHz
0.938   0.981   1.053   0.971   instructions
0.940   0.983   1.053   0.967   ipc
1.127   1.064   0.584   0.549   iTLB-load-misses
7.306   0.296   14883.602       19614.815       iTLB-load-miss-pct
0.154   3.579   0.000   0.000   iTLB-loads
1.008   0.924   0.882   0.785   L1-dcache-load-misses
1.147   0.951   0.833   0.863   L1-dcache-load-miss-pct
0.875   0.972   1.057   0.908   L1-dcache-loads
1.000   1.000   1.000   1.000   L1-dcache-stores
1.920   7.400   5.720   0.440   L1-icache-load-miss-pct
1.462   0.146   0.160   1.930   L1-icache-loads
2.826   1.089   0.926   0.870   L1-icache-loads-misses
1.000   1.000   1.000   1.000   LLC-load-misses
1.000   1.000   1.000   1.000   LLC-loads
1.000   1.000   1.000   1.000   LLC-prefetches
1.000   1.000   1.000   1.000   LLC-store-misses
1.000   1.000   1.000   1.000   LLC-stores
INF     INF     INF     INF     major-faults
2.000   1.000   0.000   1.000   migratons
INF     INF     INF     INF     minor-faults
1.014   0.416   0.983   1.323   stalled-cycles-backend
1.595   2.480   0.988   0.456   stalled-cycles-frontend

$ cat join1/join1.abs.myhuge.sb.perf.hw.scan.range100.pk1.1.sorted
(base col-1 col-2 col-3 col-4)
alignment-faults 0 0 0 0 0
branches 11574287482 10961659776 11352741885 12183086742 11346460042
branch-misses 3030466 2714901 2935051 3179251 2839773
branch-miss-pct 0.03 0.02 0.03 0.03 0.03
bus-cycles -1 -1 -1 -1 -1
cache-misses 13058655 12121233 13761590 14287699 12911650
cache-miss-pct 2.37 2.22 2.70 2.88 3.00
cache-references 551564414 545806128 509707245 496339873 430051703
context-switches 387 409 375 391 404
cycles 20037079495 19972306086 20018040737 20061552509 20114948917
dTLB-load-misses 1600950 1383256 1499778 1613244 1407803
dTLB-load-miss-pct 13.38 16.18 13.60 17.35 19.74
dTLB-loads 11961168 8547324 11025188 9300155 7131833
dTLB-store-misses -1 -1 -1 -1 -1
dTLB-stores -1 -1 -1 -1 -1
faults 0 0 0 0 0
GHz 2.010 2.010 2.010 2.011 2.010
instructions 60533604600 56770549260 59374735137 63721853164 58762172345
ipc 3.02 2.84 2.97 3.18 2.92
iTLB-load-misses 9641 10862 10261 5626 5296
iTLB-load-miss-pct 1.08 7.89 0.32 16074.29 21184.00
iTLB-loads 891707 137606 3191629 35 25
L1-dcache-load-misses 317578349 319968764 293306096 280098340 249410468
L1-dcache-load-miss-pct 1.02 1.17 0.97 0.85 0.88
L1-dcache-loads 31167473662 27286728757 30288396097 32940957127 28285721386
L1-dcache-stores -1 -1 -1 -1 -1
L1-icache-load-miss-pct 0.25 0.48 1.85 1.43 0.11
L1-icache-loads 3654723274 5344227458 533078880 584426326 7051846752
L1-icache-loads-misses 9033499 25526864 9841528 8363984 7856189
LLC-load-misses -1 -1 -1 -1 -1
LLC-loads -1 -1 -1 -1 -1
LLC-prefetches -1 -1 -1 -1 -1
LLC-store-misses -1 -1 -1 -1 -1
LLC-stores -1 -1 -1 -1 -1
major-faults 0 0 0 0 0
migratons 1 2 1 0 1
minor-faults 0 0 0 0 0
stalled-cycles-backend 3257351567 3301916514 1354576978 3202124880 4308267503
stalled-cycles-frontend 112439299 179297415 278868667 111058367 51248298