Created
October 6, 2024 19:58
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-- relative values for -O2 | |
INF alignment-faults | |
0.947 branches | |
0.896 branch-misses | |
0.667 branch-miss-pct | |
1.000 bus-cycles | |
0.928 cache-misses | |
0.937 cache-miss-pct | |
0.990 cache-references | |
1.057 context-switches | |
0.997 cycles | |
0.864 dTLB-load-misses | |
1.209 dTLB-load-miss-pct | |
0.715 dTLB-loads | |
1.000 dTLB-store-misses | |
1.000 dTLB-stores | |
INF faults | |
1.000 GHz | |
0.938 instructions | |
0.940 ipc | |
1.127 iTLB-load-misses | |
7.306 iTLB-load-miss-pct | |
0.154 iTLB-loads | |
1.008 L1-dcache-load-misses | |
1.147 L1-dcache-load-miss-pct | |
0.875 L1-dcache-loads | |
1.000 L1-dcache-stores | |
1.920 L1-icache-load-miss-pct | |
1.462 L1-icache-loads | |
2.826 L1-icache-loads-misses | |
1.000 LLC-load-misses | |
1.000 LLC-loads | |
1.000 LLC-prefetches | |
1.000 LLC-store-misses | |
1.000 LLC-stores | |
INF major-faults | |
2.000 migratons | |
INF minor-faults | |
1.014 stalled-cycles-backend | |
1.595 stalled-cycles-frontend | |
-- relative values for -O3 | |
INF alignment-faults | |
0.911 branches | |
0.850 branch-misses | |
1.000 branch-miss-pct | |
1.000 bus-cycles | |
0.894 cache-misses | |
1.058 cache-miss-pct | |
0.845 cache-references | |
0.968 context-switches | |
1.005 cycles | |
0.901 dTLB-load-misses | |
1.129 dTLB-load-miss-pct | |
0.798 dTLB-loads | |
1.000 dTLB-store-misses | |
1.000 dTLB-stores | |
INF faults | |
1.000 GHz | |
0.926 instructions | |
0.921 ipc | |
0.990 iTLB-load-misses | |
4.959 iTLB-load-miss-pct | |
0.200 iTLB-loads | |
0.901 L1-dcache-load-misses | |
1.000 L1-dcache-load-miss-pct | |
0.905 L1-dcache-loads | |
1.000 L1-dcache-stores | |
0.679 L1-icache-load-miss-pct | |
0.877 L1-icache-loads | |
0.595 L1-icache-loads-misses | |
1.000 LLC-load-misses | |
1.000 LLC-loads | |
1.000 LLC-prefetches | |
1.000 LLC-store-misses | |
1.000 LLC-stores | |
INF major-faults | |
3.000 migratons | |
INF minor-faults | |
0.664 stalled-cycles-backend | |
2.259 stalled-cycles-frontend |
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