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ngreatorex / lspci-after-oops.txt
Last active August 29, 2015 13:57
lspci -vvv on Mirabox after PCI rescan and oops
mirabox ~ # lspci -vvv
00:01.0 PCI bridge: Marvell Technology Group Ltd. Device 6710 (rev 01) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=01, subordinate=02, sec-latency=0
I/O behind bridge: 00010000-00010fff
Memory behind bridge: e0300000-e05fffff
Prefetchable memory behind bridge: 00000000-000fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
@ngreatorex
ngreatorex / pci-rescan.txt
Last active August 29, 2015 13:57
PCI rescan on Mirabox
[ 474.335413] pci_bus 0000:00: scanning bus
[ 474.335455] pci 0000:00:01.0: scanning [bus 01-01] behind bridge, pass 0
[ 474.335470] pci 0000:00:02.0: scanning [bus 02-02] behind bridge, pass 0
[ 474.335480] pci 0000:00:01.0: scanning [bus 00-00] behind bridge, pass 1
[ 474.335490] pci_bus 0000:01: scanning bus
[ 474.335535] pci 0000:01:00.0: [8086:1521] type 00 class 0x020000
[ 474.335567] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x0007ffff]
[ 474.335594] pci 0000:01:00.0: reg 0x18: [io 0x0000-0x001f]
[ 474.335611] pci 0000:01:00.0: reg 0x1c: [mem 0x00000000-0x00003fff]
[ 474.335646] pci 0000:01:00.0: reg 0x30: [mem 0x00000000-0x0007ffff pref]
@ngreatorex
ngreatorex / dmesg-boot.txt
Last active August 29, 2015 13:57
dmesg after boot on Mirabox
mirabox ~ # dmesg
[ 0.160867] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
[ 0.160878] pci 0000:00:02.0: scanning [bus 00-00] behind bridge, pass 1
[ 0.161899] pci_bus 0000:02: scanning bus
[ 0.161942] pci 0000:02:00.0: [1b73:1009] type 00 class 0x0c0330
[ 0.161980] pci 0000:02:00.0: reg 0x10: [mem 0x42000000-0x4200ffff 64bit]
[ 0.162004] pci 0000:02:00.0: reg 0x18: [mem 0x42010000-0x42010fff 64bit]
[ 0.162028] pci 0000:02:00.0: reg 0x20: [mem 0x42011000-0x42011fff 64bit]
[ 0.162056] pci 0000:02:00.0: calling pci_fixup_ide_bases+0x0/0x3c
[ 0.162130] pci 0000:02:00.0: supports D1
@ngreatorex
ngreatorex / lspci-boot.txt
Created March 25, 2014 19:44
lspci -vvv on Mirabox after boot
mirabox ~ # lspci -vvv
00:01.0 PCI bridge: Marvell Technology Group Ltd. Device 6710 (rev 01) (prog-if 00 [Normal decode])
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fff00000-000fffff
Prefetchable memory behind bridge: 00000000-000fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
@ngreatorex
ngreatorex / console-boot
Created March 25, 2014 21:36
Console output with mdelay(1000) in pci-mvebu.c
[ 0.131919] TCP: reno registered
[ 0.131927] UDP hash table entries: 512 (order: 2, 16384 bytes)
[ 0.131947] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes)
[ 0.132090] NET: Registered protocol family 1
[ 0.132325] RPC: Registered named UNIX socket transport module.
[ 0.132333] RPC: Registered udp transport module.
[ 0.132337] RPC: Registered tcp transport module.
[ 0.132342] RPC: Registered tcp NFSv4.1 backchannel transport module.
[ 0.133625] futex hash table entries: 256 (order: 2, 16384 bytes)
[ 0.133967] bounce pool size: 64 pages
@ngreatorex
ngreatorex / lspci-delayed.txt
Created March 25, 2014 21:38
lspci -vvv on Mirabox with mdelay(1000) in pci-mvebu.c
mirabox ~ # lspci -vvv
00:01.0 PCI bridge: Marvell Technology Group Ltd. Device 6710 (rev 01) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=01, subordinate=02, sec-latency=0
I/O behind bridge: 00010000-00010fff
Memory behind bridge: e0000000-e02fffff
Prefetchable memory behind bridge: 00000000-000fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
@ngreatorex
ngreatorex / lspci-delayed-blacklisted
Created March 25, 2014 21:52
lspci -vvv on Mirabox with mdelay(1000) in pci-mvebu.c but with igb blacklisted
00:01.0 PCI bridge: Marvell Technology Group Ltd. Device 6710 (rev 01) (prog-if 00 [Normal decode])
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Bus: primary=00, secondary=01, subordinate=02, sec-latency=0
I/O behind bridge: 00010000-00010fff
Memory behind bridge: e0000000-e02fffff
Prefetchable memory behind bridge: 00000000-000fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
[ 0.000000] Booting Linux on physical CPU 0x0
[ 0.000000] Linux version 3.14.0-rc8-00001-g5d29234a (neil@vroombuntu) (gcc version 4.8.1 (Ubuntu/Linaro 4.8.1-10ubuntu7) ) #16 SMP Wed Mar 26 18:04:49 GMT 2014
[ 0.000000] CPU: ARMv7 Processor [561f5811] revision 1 (ARMv7), cr=10c53c7d
[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache
[ 0.000000] Machine model: Globalscale Mirabox
[ 0.000000] Memory policy: Data cache writeback
[ 0.000000] On node 0 totalpages: 262144
[ 0.000000] free_area_init_node: node 0, pgdat c05e7dc0, node_mem_map eeffa000
[ 0.000000] Normal zone: 1520 pages used for memmap
[ 0.000000] Normal zone: 0 pages reserved
[ 0.000000] Booting Linux on physical CPU 0x0
[ 0.000000] Linux version 3.14.0-rc8-00001-gaf6efa8 (neil@vroombuntu) (gcc version 4.8.1 (Ubuntu/Linaro 4.8.1-10ubuntu7) ) #19 SMP Wed Mar 26 20:19:06 GMT 2014
[ 0.000000] CPU: ARMv7 Processor [561f5811] revision 1 (ARMv7), cr=10c53c7d
[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache
[ 0.000000] Machine model: Globalscale Mirabox
[ 0.000000] Memory policy: Data cache writeback
[ 0.000000] On node 0 totalpages: 262144
[ 0.000000] free_area_init_node: node 0, pgdat c05e7dc0, node_mem_map eeffa000
[ 0.000000] Normal zone: 1520 pages used for memmap
[ 0.000000] Normal zone: 0 pages reserved
[ 0.000000] Booting Linux on physical CPU 0x0
[ 0.000000] Linux version 3.14.0-rc8-00001-gc83e727 (neil@vroombuntu) (gcc version 4.8.1 (Ubuntu/Linaro 4.8.1-10ubuntu7) ) #27 SMP Wed Mar 26 23:05:27 GMT 2014
[ 0.000000] CPU: ARMv7 Processor [561f5811] revision 1 (ARMv7), cr=10c53c7d
[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache
[ 0.000000] Machine model: Globalscale Mirabox
[ 0.000000] Memory policy: Data cache writeback
[ 0.000000] On node 0 totalpages: 262144
[ 0.000000] free_area_init_node: node 0, pgdat c05e7dc0, node_mem_map eeffa000
[ 0.000000] Normal zone: 1520 pages used for memmap
[ 0.000000] Normal zone: 0 pages reserved