CrystalGamma

RK3399 SGRF Documentation

Rockchip does not publish documentation about the contents of the (PMU)SGRF register block in the RK3399. This document attempts to compile what is known through various documents, code drops and experiments.

Conventions

Unless otherwise noted, SGRF registers are 16 bits wide and are accessed with 32-bit accesses (and 4-byte alignment), where the upper half is a write mask. Registers are identified by their offset, e. g. R0x1C would refer to the 8th register in the block. Bit ranges such as R0x40[10:13] are inclusive. Bit positions are counted from 0, the least significant bit.

jbsulli

Windows Registry Editor Version 5.00

[HKEY_CLASSES_ROOT\Directory\Background\shell\OpenWithCMD]
@="Open with CMD"
"Icon"="C:\\WINDOWS\\system32\\cmd.exe"

[HKEY_CLASSES_ROOT\Directory\Background\shell\OpenWithCMD\command]
@="cmd.exe /k cd %V"

[HKEY_CLASSES_ROOT\Directory\shell\OpenWithCMD]

maluta

#!/usr/bin/python 

import sys
import subprocess

def usage():
		return "  \n Misssing config file, you must create a file called ~/.blocklist-dd and insert which device dd should avoid \n\n \
Ex: \n \
$ echo \"/dev/sda\" > ~/.blocklist-dd \n  \
$ echo \"/dev/sdb\" >> ~/.blocklist-dd \n  \