by Miles, age 32¾
- Big computations aren't just array-munging any more
- Profile-driven compilation: still really hard
- Heterogeneous multicore programming: kill me now
- FPGAs: buy our toolchain and we can make it less hateful, honest
- GPUs rock for HPC
- high-level tools = high overhead
- we badly need scalable GPU libraries
- must be done by hand - nothing is affine any more!
- prove CUDA/OpenCL code free of data races
- compiles CUDA to Boogie IR
- Boogie invokes an SMT solver
- doesn't work if results used as indices
Understanding Fundamental Design Choices in Single-ISA Heterogeneous Multi-Core Architectures - Van Craeynest et al, U. Ghent
- Exhaustive design-space exploration with analytical model (MPPM)
Understanding Fundamental Design Choices in Single-ISA Heterogeneous Multi-Core Architectures - Van Craeynest et al, U. Ghent
- Identification of Pareto frontier
- It's mostly made up of heterogeneous designs
Profile-guided Floating- to Fixed-point Conversion for Hybrid FPGA-Processor Applications - Doris Chen, Altera Corporation
- LLVM plugin
- decimal point alignment = shift = just wires in FPGA
- 2x-3x reduction in logic on some benchmarks
- Go big or go home
- power limits mean multicore is over
- specialisation is the new hotness
- "direct" architecture work, eg Kinect, vs "indirect" (traditional)
- we won't know if we're irrelevant - ten-year pipeline!
- to simulate error correction, must inject errors at many times true rate
- hence our results are full of lies
- by 2016, all single event upsets will flip >1 bit
- block-level SECDED is overkill
- single-bit parity checks are not-enough kill
- world's most trivial JIT
- otherwise much like ArcSim
- totally awesome benchmarking/visualisation toolchain
- we should steal it
