viglioni

// Typescript playground of this gist: https://www.typescriptlang.org/play?#code/PTAEBUE8AcFMGcCwAoFAXGtQDkD2A7AUQFtoMB5AIwCsAecAPlAF5QBvFUL7nrgbQDSoAJb5QAa1iRcAMwgBdAFygACsIDG4+gBpQAhp15cAvn0nS54eShvIMcHARJlIAQQBO7gIaR6TVnzgugB0oeB88vIA3Lb2WHhEpBh+LI6JLh7evoygAD5pzhQ0frYgoIQAHl6kADYIoLGYoADCBGhe6mipHMg8sMRewjXK8GjuogDm2oZc0AAWBLAjY5PTyMalwLg0oLjiKOoEo6BeoMoJhb6t+O2d-lxs84vKAERe8AAmLxvIh-jHlDOBSSVzaHTQ9zY-UGw1Ab0+3wORy66iBFxBtGutwh3Se+CWcPeX100KGryJiNQyBA22ooFgnlw7kUSP+XQ+aKcGKx4MhPz+xyw5y5LkxYLu3UoNS85IRPxQZRqwmOewav2RoDkwvSyXwAFdiJQGfc+KAAIygXQAJlA1nVbNAE05Ot8o3G+AmJrhZpelrhVt9doVYCVo1ODPcTJZ9uOc2dl1o+sNxtSprtAq6wnjGLdky9FvkQA

// My two references:
// for lists: https://stackoverflow.com/questions/56006111/is-it-possible-to-define-a-non-empty-array-type-in-typescript
// for objs: https://stackoverflow.com/questions/40510611/typescript-interface-require-one-of-two-properties-to-exist


// Special thanks to @CaioCSdev https://github.com/CaioCSdev

/*

erincandescent

Foreward

This document was originally written several years ago. At the time I was working as an execution core verification engineer at Arm. The following points are coloured heavily by working in and around the execution cores of various processors. Apply a pinch of salt; points contain varying degrees of opinion.

It is still my opinion that RISC-V could be much better designed; though I will also say that if I was building a 32 or 64-bit CPU today I'd likely implement the architecture to benefit from the existing tooling.

Mostly based upon the RISC-V ISA spec v2.0. Some updates have been made for v2.2

Original Foreword: Some Opinion

The RISC-V ISA has pursued minimalism to a fault. There is a large emphasis on minimizing instruction count, normalizing encoding, etc. This pursuit of minimalism has resulted in false orthogonalities (such as reusing the same instruction for branches, calls and returns) and a requirement for superfluous instructions which impacts code density both in terms of size and