Add a help target to a Makefile that will allow all targets to be self documenting

Makefile

# Add the following 'help' target to your Makefile
# And add help text after each target name starting with '\#\#'
 
help:           ## Show this help.
	@fgrep -h "##" $(MAKEFILE_LIST) | fgrep -v fgrep | sed -e 's/\\$$//' | sed -e 's/##//'
 
# Everything below is an example
 
target00:       ## This message will show up when typing 'make help'
	@echo does nothing
 
target01:       ## This message will also show up when typing 'make help'
	@echo does something
 
# Remember that targets can have multiple entries (if your target specifications are very long, etc.)
target02:       ## This message will show up too!!!
target02: target00 target01
	@echo does even more

@Windowsfreak @BlackHole1 no need for gawk, just replace pass with empty printf and problem solved. BSD awk does not know pass command.

		if($$2 == "") \
-			pass; \
+			printf ""; \

$ PATH="/usr/bin:/usr/sbin:/bin:/sbin" make help

Usage: make <command>

Clean build files commands

    kernel-%-clean       Clean kernel build files with specified architecture
                         e.g. kernel-amd64-clean / kernel-arm64-clean

    rootfs-%-clean       Clean rootfs build files with specified architecture
                         e.g. rootfs-amd64-clean / rootfs-arm64-clean

    clean                Clean all build files

Misc commands

    help                 (Default) Print listing of key targets with their descriptions

Many good suggestions.
I felt the help syntax a bit ugly when having several target dependancies.
99% of my targets are non-files, and therefor PHONY targets. So I put the check on the PHONY targets only.

This doesn't fit everyone, but maybe gives some one some thougths.

PHONY: help ## Show this help.
help:
	@grep -he '^PHONY:.*##' $(MAKEFILE_LIST) | sed -e 's/ *##/:\t/' | sed -e 's/^PHONY: *//'

I think writing a "makefile-helper <makefile_list>" in perl will be my next approach. I got many Makefiles, and copy/paste any advanced script into each Makefile is just bad.

@kjellericson you could use include /absolute/or/relative/path/to/*.mk instead of embedding it into each Makefile directly.

Hi, just discovered this gist/conversation from a google search. The solution by @BlackHole1 (Oct 26, 2023) meets my needs 90%.
But in some of our makefiles we have a dependency after the target, like this:

app: $(APP_FILE2).exe $(APP_FILE2).exe ##@ Build the applications

The items after the ":" are displayed in the help, and I really don't want this.

I am not conversant enough in awk/gawk to figure out how to suppress the display of the items after the ":"
Can anyone give me advice?

Thanks!

Hi @chrissv, you can repeat the target twice. Once for the help comment and the other one for the list of dependencies. With your example:

app: ##@ Build the applications
app: $(APP_FILE2).exe $(APP_FILE2).exe

Hi @chrissv, you can repeat the target twice. Once for the help comment and the other one for the list of dependencies. With your example:

app: ##@ Build the applications
app: $(APP_FILE2).exe $(APP_FILE2).exe

That's a great suggestion, thanks!