glit filter for JTAG

gistfile1.txt

   ////////////////////////////////////////
     // Bus Interface Unit
   // It is assumed that the BIU has internal registers, and will
   // latch address, operation, and write data on rising clock edge
   // when strobe is asserted

   // We implement a glitch filter....
   wire biu_clr_err_dly;
   wire biu_clr_err_filtered;


   primitive_very_long_delay
     #(.LIB(TC1_LIB),.STAGES(4))
            U_VLD(.i(biu_clr_err),.z(biu_clr_err_dly));

   primitive_and2 #(.LIB(TC1_LIB)) U_AND2 (.z(biu_clr_err_filtered), .i0(biu_clr_err_dly), .i1(biu_clr_err));
   primitive_or2 #(.LIB(TC1_LIB)) U_OR2 (.z(biu_rst), .i0(rst_i), .i1(biu_clr_err_filtered));


   // assign biu_rst = rst_i | biu_clr_err;