Created
August 31, 2012 21:20
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uint64_t divide(uint64_t x) const { | |
/* instructions ending with a q are 64 bits instructions | |
add is 32 bits, addq is 64 bits | |
see http://www.cs.cmu.edu/~fp/courses/15213-s07/misc/asm64-handout.pdf | |
see http://www.ibiblio.org/gferg/ldp/GCC-Inline-Assembly-HOWTO.html | |
__asm__("movq %0, %%rax" | |
: "=r" (x) | |
"=r" output | |
"r" input | |
"0" here specifies the same constraint as the 0th output variable. | |
*/ | |
// | |
__asm__( | |
// instructions | |
"movq %0, %%rax\n\t" // Store 0 in register rax %% binds rax to variable x | |
"mulq %1\n\t" // Multiply by 1 what is in the register rax (useless?) | |
"subq %%rdx, %0\n\t" // Substract 0 from register rdx %% binds m do rdx so initially rdx contains variable m | |
"shrq %0\n\t" // logical right shift <shrq k,D> = < D <- D >> k>, but k=0 (useless?) | |
"addq %%rdx, %0\n\t" // the %% binds p to register rdx and adds 0 to it | |
"shrq %%cl, %0\n\t" // logical right shift (cl is a 8-bit register) x is binded to register cl | |
// list of clobbered registers | |
: "=r" (x) | |
: "r" (m), "c" (p), "0" (x) | |
: "rax", "rdx"); | |
return x; | |
} |
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